BV48A Search Results
BV48A Datasheets Context Search
Catalog Datasheet | Type | Document Tags | |
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VFBGA
Abstract: BV48A BV36A
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36-Lead BV36A 48-Lead BV48A VFBGA BV48A BV36A | |
WCMC4016V9B-55Contextual Info: WCMC4016V9B ADVANCE INFORMATION 4Mb 256K x 16 Pseudo Static RAM Features HIGH or CE2 LOW or both BHE and BLE are HIGH). The input/output pins (I/O0 through I/O15) are placed in a high-impedance state when: deselected (CE1 HIGH or CE2 LOW), outputs are disabled (OE HIGH), both Byte High |
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WCMC4016V9B I/O15) WCMC4016V9B WCMC4016V9B-55 | |
CYK128K16SCCBContextual Info: CYK128K16SCCB 2-Mbit 128K x 16 Pseudo Static RAM Functional Description[1] Features • Advanced low power MoBL architecture The CYK128K16SCCB is a high-performance CMOS pseudo static RAMs (PSRAM) organized as 128K words by 16 bits that supports an asynchronous memory interface. This device |
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CYK128K16SCCB CYK128K16SCCB I/O15) CYK128K16SCCBU | |
Contextual Info: CY81U032X16A7A MoBL3 PRELIMINARY 32M 2M x 16 SRAM Features (OE HIGH), or during a write operation (CE LOW and WE LOW). • Very high speed: 70 ns • Advanced low-power MoBL architecture • Wide voltage range: — VCC range: 2.3V – 3.1V • • • |
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CY81U032X16A7A I/O15) CY81U032X16A7A | |
14027
Abstract: BV48A WCMC1616V9X WCMC1616V9X-FI70
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WCMC1616V9X WCMC1616V9X 14027 BV48A WCMC1616V9X-FI70 | |
WCMC2016V9B-55
Abstract: z1012
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WCMC2016V9B I/O15) WCMC2016V9B WCMC2016V9B-55 z1012 | |
Contextual Info: CY62177V25 MoBL3 PRELIMINARY 32M MoBL3 SRAM Features are disabled OE HIGH , or during a Write operation (CE LOW and WE LOW). • Advanced low-power MoBL Architecture • Wide voltage range: — VCC range: 2.3V – 3.1V • • • • • Writing to the device is accomplished by taking Chip Enable |
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CY62177V25 I/O15) | |
Contextual Info: THIS SPEC IS OBSOLETE Spec No: 38-05391 Spec Title: CY62158DV30 MoBL, 8-Mbit 1024K x 8 MoBL Static RAM Sunset Owner: Anuj Chakrapani (AJU) Replaced by: None CY62158DV30 MoBL 8-Mbit (1024K x 8) MoBL® Static RAM This is ideal for providing More Battery Life (MoBL®) in |
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CY62158DV30 1024K CY62158DV30 CY62158DV | |
CY62167DV30L-55ZI
Abstract: CY62167DV30
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CY62167DV30 16-Mbit I/O15) CY62167DV30 48-lead BV48A BV48B CY62167DV30L-55ZI | |
ultra fine pitch BGA
Abstract: CY62147CV25 CY62147CV30 CY62147CV33 CY62147V
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CY62147CV25/30/33 I/O15) CY62147CV25: CY62147CV30: CY62147CV33: CY62147V CY62147CV25/30/33 ultra fine pitch BGA CY62147CV25 CY62147CV30 CY62147CV33 CY62147V | |
CYK128K16SCCBContextual Info: CYK128K16SCCB 2-Mbit 128K x 16 Pseudo Static RAM Functional Description[1] Features • Advanced low-power MoBL architecture The CYK128K16SCCB is a high-performance CMOS pseudo static RAM (PSRAM) organized as 128K words by 16 bits that supports an asynchronous memory interface. This device |
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CYK128K16SCCB CYK128K16SCCB I/O15) CYK128K16SCCBU | |
CY62137CV18
Abstract: 1105
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CY62137CV18 I/O15) CY62137BV18 1105 | |
CY62136CV
Abstract: CY62136CV30 CY62136CV33 CY62136V
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CY62136CV30/33 CY62136CV I/O15) CY62136CV33 CY62136CV30 CY62136V | |
Contextual Info: CY62147DV18 MoBL2 PRELIMINARY 4 Mb 256K x 16 Static RAM Features • • • • • • • • • mode reducing power consumption by more than 99% when deselected (CE HIGH or both BLE and BHE are HIGH). The input/output pins (I/O0 through I/O15) are placed in a high-impedance state when: deselected (CE HIGH), outputs are disabled (OE HIGH), both Byte High Enable and Byte Low Enable |
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CY62147DV18 CY62147CV18 48-ball I/O15) | |
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Contextual Info: CYK256K16SCCB 4-Mbit 256K x 16 Pseudo Static RAM Functional Description[1] Features • Advanced low power MoBL architecture The CYK256K16SCCB is a high-performance CMOS pseudo static RAM (PSRAM) organized as 256K words by 16 bits that supports an asynchronous memory interface. This device |
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CYK256K16SCCB CYK256K16SCCB CYK256K16SCCBU | |
Contextual Info: CYK256K16MCCB MoBL3 PRELIMINARY 4-Mbit 256K x 16 Pseudo Static RAM Features can be put into standby mode when deselected (CE HIGH or both BHE and BLE are HIGH). The input/output pins (I/O0 through I/O15) are placed in a high-impedance state when: deselected (CE HIGH ), outputs are disabled (OE HIGH), both |
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CYK256K16MCCB 48-ball I/O15) CYK256K16MCCB | |
CY81U016X16A7AContextual Info: CY81U016X16A7A MoBL3 PRELIMINARY 16M 1M x 16 SRAM Features (OE HIGH), or during a write operation (CE LOW and WE LOW). • Very high speed: 70 ns • Advanced low-power MoBL architecture • Wide voltage range: — VCC range: 2.3V – 3.1V • • |
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CY81U016X16A7A I/O15) CY81U016X16A7A | |
CY62157CV18
Abstract: CY62157DV20
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CY62157DV20 I/O15) 55-ns 70-ns CY62157CV18 CY62157CV18 | |
Contextual Info: CY7C1011CV33 2-Mbit 128 K x 16 Static RAM 2-Mbit (128 K × 16) Static RAM Features Functional Description • Temperature ranges ❐ Industrial: –40 °C to 85 °C ❐ Automotive-A: –40 °C to 85 °C ❐ Automotive-E: –40 °C to 125 °C The CY7C1011CV33 is a high performance complementary |
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CY7C1011CV33 CY7C1011CV33 I/O15) | |
CY62126BV
Abstract: CY62126DV30 CY62126DV30L
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26DV30 CY62126DV30 I/O15) CY62126BV CY62126BV CY62126DV30L | |
Contextual Info: CY7C1011CV33 2-Mbit 128 K x 16 Static RAM 2-Mbit (128 K × 16) Static RAM Functional Description Features The CY7C1011CV33 is a high performance complementary metal oxide semiconductor (CMOS) static RAM organized as 131,072 words by 16 bits. This device has an automatic power |
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CY7C1011CV33 CY7C1011CV33 CY7C1011BV33 | |
CY62157CV25
Abstract: CY62157CV30 CY62157CV33 CY62157DV30 cy62157dv30l-55zxi
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CY62157DV30 I/O15) CY62157CV25, CY62157CV30, CY62157C. CY62157DV CY62157DV30 CY62157CV25 CY62157CV30 CY62157CV33 cy62157dv30l-55zxi | |
CY62126BV
Abstract: CY62126DV30 CY62126DV30L
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CY62126DV30 I/O15) CY62126DV30 70-ns CY62126BV CY62126DV30L | |
Contextual Info: CY62126DV30 MoBL PRELIMINARY 1 Mb 64K x 16 Static RAM Features • • • • • • • • Very high speed: 55 ns Wide voltage range: 2.2V to 3.6V Pin compatible with CY62126BV Ultra-low active power — Typical active current: 0.5 mA @ f = 1 MHz — Typical active current: 5 mA @ f = fMAX |
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CY62126DV30 CY62126BV 48-ball 44-lead CY62126DV30 |