WCMC2016V9B Search Results
WCMC2016V9B Datasheets (2)
| Part | ECAD Model | Manufacturer | Description | Curated | Datasheet Type | |
|---|---|---|---|---|---|---|
| WCMC2016V9B-FVI55 | Weida Semiconductor | IC SRAM CHIP ASYNC SINGLE 3.3V 2MBIT 128K x 16 55NS 48FBGA | Original | |||
| WCMC2016V9B-FVI70 | Weida Semiconductor | IC SRAM CHIP ASYNC SINGLE 3.3V 2MBIT 128K x 16 70NS 48FBGA | Original |
WCMC2016V9B Datasheets Context Search
| Catalog Datasheet | Type | Document Tags | |
|---|---|---|---|
WCMC2016V9B-55
Abstract: z1012
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Original |
WCMC2016V9B I/O15) WCMC2016V9B WCMC2016V9B-55 z1012 | |
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Contextual Info: WCMC2016V9B ADVANCE INFORMATION 2Mb 128K x 16 Pseudo Static RAM Features can also be put into standby mode when deselected (CE1 HIGH or CE2 LOW or both BHE and BLE are HIGH). The input/output pins (I/O0 through I/O15) are placed in a high-impedance state when: deselected (CE1 HIGH or CE2 |
Original |
WCMC2016V9B I/O15) WCMC2016V9B |