Untitled
Abstract: No abstract text available
Text: Product Obsolete/Under Obsolescence R XC4000XLA Family Field Programmable Gate Arrays Package Pinouts XC4013XLA Pinout Table XC4013XLA Pinout Table Continued XC4013XLA Pinout Table PAD NAME PQ160 PQ208 PQ240 I/O – – P21 BG256 H1 PAD NAME PQ160 PQ208
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XC4000XLA
XC4013XLA
PQ160
PQ208
PQ240
BG256
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PQ208
Abstract: HQ240 HQFP HQ208 PQ160 HQ160 PQ240 PQ-44
Text: Package Drawings PQ/HQFP Packages - PQ44, PQ160, PQ208, PQ240, HQ160, HQ208, HQ240 10-30 November 13, 1997 Version 1.2
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PQ160,
PQ208,
PQ240,
HQ160,
HQ208,
HQ240
PQ208
HQ240
HQFP
HQ208
PQ160
HQ160
PQ240
PQ-44
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HQ240
Abstract: HQFP HQ160 HQ208 PK007 PQ160 PQ208 PQ240
Text: R PK007 v1.0 June 1, 2000 PQFP (PQ44, PQ160, PQ208, PQ240) Packages HQFP (Heat Sink) (HQ160, HQ208, HQ240) Packages 2000 Xilinx, Inc. All rights reserved. All Xilinx trademarks, registered trademarks, patents, and disclaimers are as listed at http://www.xilinx.com/legal.htm.
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PK007
PQ160,
PQ208,
PQ240)
HQ160,
HQ208,
HQ240)
HQ240
HQFP
HQ160
HQ208
PK007
PQ160
PQ208
PQ240
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HQ240
Abstract: PQ208 HQ240 XILINX
Text: R PK007 v1.1 April 6, 2001 PQFP (PQ44, PQ160, PQ208, PQ240) Heat Sink PQFP (HQ160, HQ208, HQ240) Package 2001 Xilinx, Inc. All rights reserved. All Xilinx trademarks, registered trademarks, patents, and disclaimers are as listed at http://www.xilinx.com/legal.htm.
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PK007
PQ160,
PQ208,
PQ240)
HQ160,
HQ208,
HQ240)
HQ240
PQ208
HQ240 XILINX
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CQ208
Abstract: PQFP208 MEB2 SY-PQ208-1
Text: EIA Standard Board Layout of Soldered Pad for QFP Devices Md e e e Ze Me b2 e I2 Zd Board Layout Soldered Pads Dimension for both CQ208 and PQ208 and prototype socket packages: (note: The following recommended dimension will take PQFP208, Prototype socket and CQ208 package
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CQ208
PQ208
PQFP208,
PQ/RQ208/CQ208*
SY-PQ208-1
PQFP208
MEB2
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Pl84
Abstract: No abstract text available
Text: Component Selector Guide April 1999 1999 Actel Corporation 1 Package Speed Grade SRAM Bits JTAG I/O 3.3 Volt 5 Volt PCI 5.0 Volt Tolerant at 3.3V VQ100 Std, –1, –2, –3 78 8,000 256 512 — — Yes Yes — — Yes PQ208 Std, –1, –2, –3 129 8,000
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A54SX08
VQ100
PQ208
TQ144
TQ176
Pl84
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1.2 micron cmos
Abstract: 1.2 Micron CMOS Process Family Datasheet Toolkit Military Plastic pASIC 3 Family pASIC 1 Family PQ208
Text: pASIC ORDERING INFORMATION pASIC device ordering part numbers are composed as follows: QL 3025 R -1 PQ208 C Operating Range C = Commercial I = Industrial M = Military Temperature M/883C = MIL-STD-883D Class B QuickLogic pASIC device prefix pASIC device part number
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PQ208
M/883C
MIL-STD-883D
1.2 micron cmos
1.2 Micron CMOS Process Family
Datasheet Toolkit
Military Plastic pASIC 3 Family
pASIC 1 Family
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pqg208
Abstract: PQ208 PK007 v1-2
Text: R PQFP PQ208/PQG208 Package PK007 (v1.2) June 18, 2004 2004 Xilinx, Inc. All rights reserved. All Xilinx trademarks, registered trademarks, patents, and disclaimers are as listed at http://www.xilinx.com/legal.htm. All other trademarks and registered trademarks are the property of their respective owners. All specifications are subject to change without notice.
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PQ208/PQG208)
PK007
pqg208
PQ208
PK007
v1-2
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SPARTAN-II xc2s200 pq208
Abstract: XC2S200 FG256 FG456 xc2s200 pq208 xc2s30 pq208 VQ100 PQ208 CS144 P156
Text: Xilinx June 1, 2000 Errata for the Pinout Tables in the Spartan-II Datasheet Ver. 1.1 This document describes errata found in the Spartan-II datasheet, ver. 1.1. These errata will be corrected in the next version of the datasheet. 1. Page 63, “XC2S30 Device Pinouts” table: P76 on the VQ100 package and P156 on the PQ208
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XC2S30
VQ100
PQ208
VQ100
TQ144
CS144
CS144
FG456
SPARTAN-II xc2s200 pq208
XC2S200
FG256
FG456
xc2s200 pq208
xc2s30 pq208
PQ208
P156
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UT6325
Abstract: 484-CLGA CL484 CQFP 208 datasheet PBGA 484P UT-SG-CQ208 CQ208 QT-SG-PS484
Text: RadHard Eclipse Devices UT6325-W* 208-PQFP 9 N/A UT8RHEEB-208PC UT8RHE-SKT208P N/A N/A QT-SG-PQ208 9 UT6325-X* 208-CQFP 9 9 UT8RHEEB-208PC UT8RHE-SKT208C UT8RHE-SKT208P with proper land pads 9 UT-SG-CQ208 9 UT6325-P* 280-PBGA 9 N/A UT8RHEEB-288PC UT8RHE-SKT280P
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UT6325-W*
208-PQFP
UT8RHEEB-208PC
UT8RHE-SKT208P
UT8RHE-SKT208C
UT8RHEEB-288PC
UT8RHE-SKT280P
UT6325
484-CLGA
CL484
CQFP 208 datasheet
PBGA 484P
UT-SG-CQ208
CQ208
QT-SG-PS484
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RT54SX72SCQ208
Abstract: A42MX16 RT54SX32S-CQ208 CQ208 CQ256
Text: v3.0 Component Selector Guide PCI 5.0 Volt Tolerant — 5 Volt I/O — Yes Yes Yes — — Yes 3.3 Volt I/O 3,000 2.5 Volt I/O Gates 36 JTAG I/O User I/O C, I SRAM Bits Screening –F, Std, –P Wide Decodes Speed Grade CS49 Flip-Flops/Dedicated Max Package
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CS128
TQ100
eX128
eX256
CS180
A54SX08A
RT54SX72SCQ208
A42MX16
RT54SX32S-CQ208
CQ208
CQ256
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C4466
Abstract: FG484 CQ256 FG144 D1425 ACTEL SI-SXA-APATQ100-A-KIT SI-SX72-ACQ256SFG484 A54SX72A C4002
Text: 0HFKDQLFDO 'UDZLQJV IRU WKH $GDSWHU %RDUG S/N Package Device Actel Part Number 1 CQ256 to FG484 For A54SX72A and RT54SX72S devices SI-SX72-ACQ256SFG484 Ironwood Electronics Part Number: CQ256 to FG484 adapter for SX32 And SX72.pdf C4002
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CQ256
FG484
A54SX72A
RT54SX72S
SI-SX72-ACQ256SFG484
FG484
C4002
com/docs/sockets/CQ256FG484adaptSX32
C4466
FG144
D1425
ACTEL
SI-SXA-APATQ100-A-KIT
SI-SX72-ACQ256SFG484
C4002
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b13193
Abstract: XCR3256XL 614E-13 CS280 DS012 DS013 PQ208 TQ144 208pin T1648
Text: R DS013 v1.2 May 3, 2000 XCR3256XL 256 Macrocell CPLD 14 Preliminary Product Specification Features Description • 7.5 ns pin-to-pin logic delays • System frequencies up to 140 MHz • 256 macrocells with 6,000 usable gates • Available in small footprint packages
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DS013
XCR3256XL
208-pin
144-pin
280-ball
280-pin
TQ144
PQ208
b13193
614E-13
CS280
DS012
DS013
PQ208
TQ144
208pin
T1648
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PL84
Abstract: CG144 QD-PL6884 QL16X24BL QD-DF-PF144 QD-PQ208 QD-PF100144 Programmer PB256 PF100
Text: DeskFabTM Programming Kit and Adapters HIGHLIGHTS DeskFab Programmer supports all QuickLogic devices, including ESP and FPGA devices. Universal adapters support all devices in a given pin/package type. DeskFab Programmer can be “ganged” in chains of up to 8 for
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includQD-PL44
QD-PL6884
QD-PF100144
QD-CG6884
PL84
CG144
QD-PL6884
QL16X24BL
QD-DF-PF144
QD-PQ208
QD-PF100144
Programmer
PB256
PF100
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Untitled
Abstract: No abstract text available
Text: u XC95288XV High-Performance CPLD R DS050 v2.6 April 15, 2005 5 Features • • • • • • • • 288 macrocells with 6,400 usable gates Available in small footprint packages - 144-pin TQFP (117 user I/O pins) - 208-pin PQFP (168 user I/O pins) - 280-pin CSP (192 user I/O pins)
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XC95288XV
DS050
XC9500XV
220oC.
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DSA0092
Abstract: No abstract text available
Text: u XC95288XV High-Performance CPLD R DS050 v2.3 June 24, 2002 5 Features • • • • • • • • 288 macrocells with 6,400 usable gates Available in small footprint packages - 144-pin TQFP (117 user I/O pins) - 208-pin PQFP (168 user I/O pins) - 280-pin CSP (192 user I/O pins)
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XC95288XV
DS050
XC9500XV
DSA0092
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XC95288XL pinout
Abstract: XC95288XL XC95288XL-7PQ208I XC95288XL-7TQ144I XC95288XL-10PQ208I XC95288XL-10TQ144I marking G18 XC95288XL-10-PQ208 XC95288XL-6FG256C XAPP114
Text: XC95288XL High Performance CPLD DS055 v1.7 August 21, 2003 5 Features • • • • • • • • • • • 6 ns pin-to-pin logic delays System frequency up to 208 MHz 288 macrocells with 6,400 usable gates Available in small footprint packages - 144-pin TQFP (117 user I/O pins)
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XC95288XL
DS055
144-pin
208-pin
256-pin
280-pin
BG256
BG352)
CS280
XC95288XL pinout
XC95288XL-7PQ208I
XC95288XL-7TQ144I
XC95288XL-10PQ208I
XC95288XL-10TQ144I
marking G18
XC95288XL-10-PQ208
XC95288XL-6FG256C
XAPP114
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TQ144
Abstract: XAPP361 XC9500XV XC95288XV XC95288XV-10 XC95288XV-7
Text: u XC95288XV High-Performance CPLD R DS050 v2.5 August 21, 2003 5 Features • • • • • • • • 288 macrocells with 6,400 usable gates Available in small footprint packages - 144-pin TQFP (117 user I/O pins) - 208-pin PQFP (168 user I/O pins) - 280-pin CSP (192 user I/O pins)
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XC95288XV
DS050
144-pin
208-pin
280-pin
256-pin
54-input
220oC.
TQ144
XAPP361
XC9500XV
XC95288XV-10
XC95288XV-7
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Untitled
Abstract: No abstract text available
Text: R DS013 v1.4 December 11, 2000 XCR3256XL 256 Macrocell CPLD 14 Preliminary Product Specification Features Description • 7.5 ns pin-to-pin logic delays • System frequencies up to 140 MHz • 256 macrocells with 6,400 usable gates • Available in small footprint packages
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DS013
XCR3256XL
144-pin
208-pin
280-ball
TQ144
PQ208
CS280
XCR3256XL
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Untitled
Abstract: No abstract text available
Text: XC95288XL High Performance CPLD DS055 v1.6 May 27, 2003 5 Features • • • • • • • • • • • 6 ns pin-to-pin logic delays System frequency up to 208 MHz 288 macrocells with 6,400 usable gates Available in small footprint packages - 144-pin TQFP (117 user I/O pins)
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XC95288XL
DS055
144-pin
208-pin
256-pin
280-pin
BG256
BG352)
CS280
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XC95288XL10TQG144I pinout
Abstract: XC95288XL PQG208 XC95288XL pinout XC95288XL-10TQG144C fgg256 XC95288XL XC95288XL-7CS280C XC95288XL-10FGG256I XC95288XL-7TQ144I pqg208
Text: XC95288XL High Performance CPLD R DS055 v2.1 April 3, 2007 5 Features • • • • • • • • • • • 6 ns pin-to-pin logic delays System frequency up to 208 MHz 288 macrocells with 6,400 usable gates Available in small footprint packages - 144-pin TQFP (117 user I/O pins
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XC95288XL
DS055
144-pin
208-pin
256-pin
280-pin
220oC.
XC95288XL10TQG144I pinout
XC95288XL PQG208
XC95288XL pinout
XC95288XL-10TQG144C
fgg256
XC95288XL-7CS280C
XC95288XL-10FGG256I
XC95288XL-7TQ144I
pqg208
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Untitled
Abstract: No abstract text available
Text: R DS013 v1.5 January 17, 2001 XCR3256XL 256 Macrocell CPLD 14 Preliminary Product Specification Features Description • 7.5 ns pin-to-pin logic delays • System frequencies up to 140 MHz • 256 macrocells with 6,400 usable gates • Available in small footprint packages
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XCR3256XL
DS013
144-pin
208-pin
280-ball
XCR3256XL
TQ144
PQ208
CS280
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XC95288XL pinout
Abstract: XC95288XL-7TQG144I xc95288xl-10tqg144 XC95288XL-10TQ144C
Text: XC95288XL High Performance CPLD DS055 v2.0 March 22, 2006 5 Features • • • • • • • • • • • 6 ns pin-to-pin logic delays System frequency up to 208 MHz 288 macrocells with 6,400 usable gates Available in small footprint packages - 144-pin TQFP (117 user I/O pins)
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XC95288XL
DS055
144-pin
208-pin
256-pin
280-pin
BG256
BG352)
CS280
XC95288XL pinout
XC95288XL-7TQG144I
xc95288xl-10tqg144
XC95288XL-10TQ144C
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CQ256
Abstract: CQ208 4PMX 4pm smd
Text: te /e • / Speed Grade JTAG I/O 3.3 Volt 5 Volt PCI 5.0 Volt Tolerant at 3.3V VQ100 Std, - 1 , - 2 , - 3 129 8,000 256 512 - — Yes Yes — — Yes PQ208 Std, - 1 , - 2 , - 3 129 8,000 256 512 — — Yes Yes — — Yes TQ144 Std, - 1 , - 2 , - 3 129 8,000
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OCR Scan
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A54SX08
VQ100
PQ208
TQ144
TQ176
1P1280A
RP14100A
RT1020
RT1280A
RT1425A
CQ256
CQ208
4PMX
4pm smd
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