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    LV132A Search Results

    LV132A Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    74LV132ATELL-E Renesas Electronics Corporation HD74LV-A Series Visit Renesas Electronics Corporation
    74LV132AFPEL-E Renesas Electronics Corporation HD74LV-A Series Visit Renesas Electronics Corporation
    SN74LV132APWR Texas Instruments Quadruple Positive-Nand Gates With Schmitt-Trigger Inputs 14-TSSOP -40 to 125 Visit Texas Instruments Buy
    SN74LV132ADR Texas Instruments Quadruple Positive-Nand Gates With Schmitt-Trigger Inputs 14-SOIC -40 to 125 Visit Texas Instruments Buy
    SN74LV132ADGVR Texas Instruments Quadruple Positive-Nand Gates With Schmitt-Trigger Inputs 14-TVSOP -40 to 125 Visit Texas Instruments Buy
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    LV132A Price and Stock

    Texas Instruments SN74LV132ADR

    IC GATE NAND 4CH 2-INP 14SOIC
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    DigiKey SN74LV132ADR Digi-Reel 16,358 1
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    SN74LV132ADR Cut Tape 16,358 1
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    SN74LV132ADR Reel 7,500 2,500
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    Mouser Electronics SN74LV132ADR 4,034
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    Bristol Electronics SN74LV132ADR 820
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    Rochester Electronics SN74LV132ADR 620 1
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    Diodes Incorporated 74LV132AT14-13

    IC GATE NAND 4CH 2-INP 14TSSOP
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    DigiKey 74LV132AT14-13 Cut Tape 4,990 1
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    74LV132AT14-13 Digi-Reel 4,990 1
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    Avnet Americas 74LV132AT14-13 Reel 8 Weeks 2,500
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    Mouser Electronics 74LV132AT14-13 2,280
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    Bristol Electronics 74LV132AT14-13 2,226
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    TME 74LV132AT14-13 5
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    Avnet Silica 74LV132AT14-13 10 Weeks 2,500
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    Texas Instruments SN74LV132AD

    IC GATE NAND 4CH 2-INP 14SOIC
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    DigiKey SN74LV132AD Tube 3,286 1
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    Bristol Electronics SN74LV132AD 2,000
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    SN74LV132AD 568
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    Rochester Electronics SN74LV132AD 15,641 1
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    ComSIT USA SN74LV132AD 140
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    Chip1Stop SN74LV132AD Tube 1
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    Diodes Incorporated 74LV132AS14-13

    IC GATE NAND SCHMIT 4CH 2IN 14SO
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    DigiKey 74LV132AS14-13 Digi-Reel 2,109 1
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    74LV132AS14-13 Cut Tape 2,109 1
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    Avnet Americas 74LV132AS14-13 Reel 8 Weeks 2,500
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    Mouser Electronics 74LV132AS14-13 1,436
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    RS 74LV132AS14-13 Bulk 50
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    Bristol Electronics 74LV132AS14-13 595
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    TME 74LV132AS14-13 1
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    Avnet Silica 74LV132AS14-13 2,500 10 Weeks 2,500
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    New Advantage Corporation 74LV132AS14-13 2,500 1
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    Texas Instruments SN74LV132ADBR

    IC GATE NAND 4CH 2-INP 14SSOP
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    DigiKey SN74LV132ADBR Cut Tape 1,990 1
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    SN74LV132ADBR Digi-Reel 1,990 1
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    Mouser Electronics SN74LV132ADBR 1,860
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    Rochester Electronics SN74LV132ADBR 20,564 1
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    LV132A Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    SN74LV132APWR

    Abstract: A115-A C101 LV132A SN54LV132A SN74LV132A
    Text: LV132A, LV132A QUADRUPLE POSITIVEĆNAND GATES WITH SCHMITTĆTRIGGER INPUTS SCLS394H − APRIL 1998 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 9 ns at 5 V D Typical VOLP Output Ground Bounce D D D <0.8 V at VCC = 3.3 V, TA = 25°C


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    PDF SN54LV132A, SN74LV132A SCLS394H 000-V A114-A) A115-A) SN54LV132A SN74LV132APWR A115-A C101 LV132A SN54LV132A SN74LV132A

    LV132A

    Abstract: SN54LV132A SN74LV132A
    Text: LV132A, LV132A QUADRUPLE POSITIVE-NAND GATES WITH SCHMITT-TRIGGER INPUTS SCLS394B – APRIL 1998 – REVISED AUGUST 1998 D D D D D EPIC  Enhanced-Performance Implanted CMOS Process Typical VOLP (Output Ground Bounce) < 0.8 V at VCC, TA = 25°C


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    PDF SN54LV132A, SN74LV132A SCLS394B MIL-STD-883, SN54LV132A LV132A SN54LV132A SN74LV132A

    texas instruments package marking

    Abstract: lv02a LV273A lv132a 74LV273A 74lv540a 74LV175A LV05A SN74LV02ANSR SN74LV05ANS
    Text: TEXAS INSTRUMENTS Informational Notification for the Symbolization Change of Select Devices in ‘NS’ Package November 5, 1998 Abstract Texas Instruments Inc., Standard Linear and Logic products SLL is in the process of converting topside symbolization on a few select devices in the ‘NS’ package to show the ‘74’ prefix before the


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    PDF SN74LV139ANSR SN74LV174ANS SN74LV174ANSR SN74LV175ANS SN74LV175ANSR SN74LV273ANS SN74LV273ANSR SN74LV540ANS SN74LV540ANSR SN74LV573ANS texas instruments package marking lv02a LV273A lv132a 74LV273A 74lv540a 74LV175A LV05A SN74LV02ANSR SN74LV05ANS

    7054F

    Abstract: BC564A HA13563 AC123A HITACHI microcontroller H8 534 manual IC 74LS47 AC538 BC245A 2SK3235 HA13557
    Text: INDEX General General Information Semiconductor Packages Sales Locations Microcontroller Microcontroller General MultiChipModules Smart Card Micro. Overview Micro. Shortform Micro. Hardware Manual Micro. Program. Manual Micro. Application Notes LCD Controller / Driver


    Original
    PDF 2sc4537 2sc454. 2sc4591 2sc4592 2sc4593 2sc460. 2sc4628 2sc4629 2sc4643 2sc4680 7054F BC564A HA13563 AC123A HITACHI microcontroller H8 534 manual IC 74LS47 AC538 BC245A 2SK3235 HA13557

    A115-A

    Abstract: C101 LV132A SN54LV132A SN74LV132A
    Text: LV132A, LV132A QUADRUPLE POSITIVEĆNAND GATES WITH SCHMITTĆTRIGGER INPUTS SCLS394H − APRIL 1998 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 9 ns at 5 V D Typical VOLP Output Ground Bounce D D D <0.8 V at VCC = 3.3 V, TA = 25°C


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    PDF SN54LV132A, SN74LV132A SCLS394H 000-V A114-A) A115-A) SN54LV132A A115-A C101 LV132A SN54LV132A SN74LV132A

    SN74 schmitt trigger

    Abstract: SDYU001 SN54LV00A SN54LV02A SN54LV04A SN54LV05A SN54LV08A SN54LV14A SN54LV32A SN54LV74A
    Text: LVC and LV LowĆVoltage CMOS Logic Data Book 1998 Logic Products General Information LVC Gates and MSI LVC Octals LVC Widebus LVC 3.3-V to 5-V Translators and Cable Drivers LV Gates and MSI LV Octals Application Reports Mechanical Data LVC and LV Low-Voltage CMOS Logic


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    PDF MIL-STD-1835 GDFP2-F20 SN74 schmitt trigger SDYU001 SN54LV00A SN54LV02A SN54LV04A SN54LV05A SN54LV08A SN54LV14A SN54LV32A SN54LV74A

    A115-A

    Abstract: C101 LV132A SN54LV132A SN74LV132A
    Text: LV132A, LV132A www.ti.com SCLS394I – APRIL 1999 – REVISED JUNE 2010 QUADRUPLE POSITIVE-NAND GATES WITH SCHMITT-TRIGGER INPUTS Check for Samples: LV132A, LV132A FEATURES 1 • • • • 2-V to 5.5-V VCC Operation Max tpd of 9 ns at 5 V


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    PDF SN54LV132A, SN74LV132A SCLS394I 000-V A114-A) A115-A) SN54LV132A. A115-A C101 LV132A SN54LV132A SN74LV132A

    Untitled

    Abstract: No abstract text available
    Text: LV132A, LV132A QUADRUPLE POSITIVE-NAND GATES WITH SCHMITT-TRIGGER INPUTS SCLS394C – APRIL 1998 – REVISED MAY 2000 D D D D D D D EPIC  Enhanced-Performance Implanted CMOS Process Typical VOLP (Output Ground Bounce) <0.8 V at VCC = 3.3 V, TA = 25°C


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    PDF SN54LV132A, SN74LV132A SCLS394C MIL-STD-883, SN74LV132A, ////roarer/root/data13/imaging/BIT. /08032000/TXII/08022000/sn74lv132a SDYU001M, SCAU001A, SCEM128,

    Untitled

    Abstract: No abstract text available
    Text: LV132A, LV132A QUADRUPLE POSITIVEĆNAND GATES WITH SCHMITTĆTRIGGER INPUTS SCLS394H − APRIL 1998 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 9 ns at 5 V D Typical VOLP Output Ground Bounce D D D <0.8 V at VCC = 3.3 V, TA = 25°C


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    PDF SN54LV132A, SN74LV132A SCLS394H 000-V A114-A) A115-A) SN54LV132A

    A115-A

    Abstract: C101 LV132A SN54LV132A SN74LV132A
    Text: LV132A, LV132A QUADRUPLE POSITIVE-NAND GATES WITH SCHMITT-TRIGGER INPUTS SCLS394D – APRIL 1998 – REVISED JANUARY 2001 D D D D LV132A . . . J OR W PACKAGE LV132A . . . D, DB, DGV, NS, OR PW PACKAGE TOP VIEW 2-V to 5.5-V VCC Operation Typical VOLP (Output Ground Bounce)


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    PDF SN54LV132A, SN74LV132A SCLS394D SN54LV132A 000-V A114-A) A115-A) A115-A C101 LV132A SN54LV132A SN74LV132A

    Untitled

    Abstract: No abstract text available
    Text: LV132A, LV132A QUADRUPLE POSITIVEĆNAND GATES WITH SCHMITTĆTRIGGER INPUTS SCLS394H − APRIL 1998 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 9 ns at 5 V D Typical VOLP Output Ground Bounce D D D <0.8 V at VCC = 3.3 V, TA = 25°C


    Original
    PDF SN54LV132A, SN74LV132A SCLS394H SN54LV132A SN74LV132A LV132A

    Untitled

    Abstract: No abstract text available
    Text: LV132A, LV132A QUADRUPLE POSITIVEĆNAND GATES WITH SCHMITTĆTRIGGER INPUTS SCLS394H − APRIL 1998 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 9 ns at 5 V D Typical VOLP Output Ground Bounce D D D <0.8 V at VCC = 3.3 V, TA = 25°C


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    PDF SN54LV132A, SN74LV132A SCLS394H SN54LV132A SN74LV132A LV132A

    LV132A

    Abstract: A115-A C101 SN54LV132A SN74LV132A
    Text: LV132A, LV132A QUADRUPLE POSITIVE-NAND GATES WITH SCHMITT-TRIGGER INPUTS SCLS394D – APRIL 1998 – REVISED JANUARY 2001 D D D D LV132A . . . J OR W PACKAGE LV132A . . . D, DB, DGV, NS, OR PW PACKAGE TOP VIEW 2-V to 5.5-V VCC Operation Typical VOLP (Output Ground Bounce)


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    PDF SN54LV132A, SN74LV132A SCLS394D SN54LV132A 000-V A114-A) A115-A) LV132A A115-A C101 SN54LV132A SN74LV132A

    A115-A

    Abstract: C101 LV132A SN54LV132A SN74LV132A
    Text: LV132A, LV132A QUADRUPLE POSITIVE-NAND GATES WITH SCHMITT-TRIGGER INPUTS SCLS394D – APRIL 1998 – REVISED JANUARY 2001 D D D D LV132A . . . J OR W PACKAGE LV132A . . . D, DB, DGV, NS, OR PW PACKAGE TOP VIEW 2-V to 5.5-V VCC Operation Typical VOLP (Output Ground Bounce)


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    PDF SN54LV132A, SN74LV132A SCLS394D SN54LV132A 000-V A114-A) A115-A) A115-A C101 LV132A SN54LV132A SN74LV132A

    A115-A

    Abstract: C101 LV132A SN54LV132A SN74LV132A
    Text: LV132A, LV132A QUADRUPLE POSITIVEĆNAND GATES WITH SCHMITTĆTRIGGER INPUTS SCLS394H − APRIL 1998 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 9 ns at 5 V D Typical VOLP Output Ground Bounce D D D <0.8 V at VCC = 3.3 V, TA = 25°C


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    PDF SN54LV132A, SN74LV132A SCLS394H 000-V A114-A) A115-A) SN54LV132A A115-A C101 LV132A SN54LV132A SN74LV132A

    lvc16244

    Abstract: BC240 2sk3174 CBT1G125 LV2GT14A HC32 Hitachi HA13557A transistor 2SC1162 H8 hitachi programming manual 30204SP
    Text: HITACHI ELECTRONIC COMPONENTS DATABOOK 2003 INDEX General Informations Multi Perpose Products Safety Considerations Hitachi Semiconductor Package Databook HITACHI Sales Locations Diodes Microcontroller Microcontroller General Microcontroller Overview List


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    PDF HD49323A HA12134A HA12141N HA12155N HA12163 HA12167F HA12173 HA12179F HA12181F HA12187F lvc16244 BC240 2sk3174 CBT1G125 LV2GT14A HC32 Hitachi HA13557A transistor 2SC1162 H8 hitachi programming manual 30204SP

    Untitled

    Abstract: No abstract text available
    Text: LV132A, LV132A www.ti.com SCLS394I – APRIL 1999 – REVISED JUNE 2010 QUADRUPLE POSITIVE-NAND GATES WITH SCHMITT-TRIGGER INPUTS Check for Samples: LV132A, LV132A FEATURES 1 • • • • 2-V to 5.5-V VCC Operation Max tpd of 9 ns at 5 V


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    PDF SN54LV132A, SN74LV132A SCLS394I 000-V A114-A) A115-A) SN54LV132A.

    Untitled

    Abstract: No abstract text available
    Text: LV132A, LV132A www.ti.com SCLS394I – APRIL 1999 – REVISED JUNE 2010 QUADRUPLE POSITIVE-NAND GATES WITH SCHMITT-TRIGGER INPUTS Check for Samples: LV132A, LV132A FEATURES 1 • • • • 2-V to 5.5-V VCC Operation Max tpd of 9 ns at 5 V


    Original
    PDF SN54LV132A, SN74LV132A SCLS394I 000-V A114-A) A115-A) SN54LV132A.

    Untitled

    Abstract: No abstract text available
    Text: LV132A, LV132A QUADRUPLE POSITIVEĆNAND GATES WITH SCHMITTĆTRIGGER INPUTS SCLS394H − APRIL 1998 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 9 ns at 5 V D Typical VOLP Output Ground Bounce D D D <0.8 V at VCC = 3.3 V, TA = 25°C


    Original
    PDF SN54LV132A, SN74LV132A SCLS394H SN54LV132A SN74LV132A LV132A

    Untitled

    Abstract: No abstract text available
    Text: LV132A, LV132A QUADRUPLE POSITIVEĆNAND GATES WITH SCHMITTĆTRIGGER INPUTS SCLS394H − APRIL 1998 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 9 ns at 5 V D Typical VOLP Output Ground Bounce D D D <0.8 V at VCC = 3.3 V, TA = 25°C


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    PDF SN54LV132A, SN74LV132A SCLS394H SN54LV132A SN74LV132A LV132A

    LV132A

    Abstract: A115-A C101 SN54LV132A SN74LV132A
    Text: LV132A, LV132A QUADRUPLE POSITIVEĆNAND GATES WITH SCHMITTĆTRIGGER INPUTS SCLS394G − APRIL 1998 − REVISED DECEMBER 2004 D 2-V to 5.5-V VCC Operation D Max tpd of 9 ns at 5 V D Typical VOLP Output Ground Bounce D D D <0.8 V at VCC = 3.3 V, TA = 25°C


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    PDF SN54LV132A, SN74LV132A SCLS394G 000-V A114-A) A115-A) SN54LV132A LV132A A115-A C101 SN54LV132A SN74LV132A

    Untitled

    Abstract: No abstract text available
    Text: LV132A, LV132A QUADRUPLE POSITIVEĆNAND GATES WITH SCHMITTĆTRIGGER INPUTS SCLS394H − APRIL 1998 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 9 ns at 5 V D Typical VOLP Output Ground Bounce D D D <0.8 V at VCC = 3.3 V, TA = 25°C


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    PDF SN54LV132A, SN74LV132A SCLS394H SN54LV132A SN74LV132A LV132A

    LV132A

    Abstract: SN54LV132A SN74LV132A SN74LV132AD SN74LV132ADBR SN74LV132ADR SN74LV132ANSR SN74LV132APW SN74LV132APWR SN74LV132APWT
    Text: LV132A, LV132A QUADRUPLE POSITIVE-NAND GATES WITH SCHMITT-TRIGGER INPUTS SCLS394E – APRIL 1998 – REVISED JULY 2003 D D D D LV132A . . . J OR W PACKAGE LV132A . . . D, DB, DGV, NS, OR PW PACKAGE TOP VIEW 2-V to 5.5-V VCC Operation Max tpd of 9 ns at 5 V


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    PDF SN54LV132A, SN74LV132A SCLS394E SN54LV132A 000-V A114-A) A115-A) LV132A SN54LV132A SN74LV132A SN74LV132AD SN74LV132ADBR SN74LV132ADR SN74LV132ANSR SN74LV132APW SN74LV132APWR SN74LV132APWT

    39-4B

    Abstract: No abstract text available
    Text: LV132A, LV132A QUADRUPLE POSITIVE-NAND GATES WITH SCHMITT-TRIGGER INPUTS S C LS 394B - A P R IL 1998 - R EVISED A U G U S T 1998 EPIC Enhanced-Performance Implanted CMOS Process LV132A . . . J OR W PACKAGE LV132A . . . D, DB, DGV, NS, OR PW PACKAGE


    OCR Scan
    PDF SN54LV132A, SN74LV132A MIL-STD-883, SN54LV132A SN74LV1m 39-4B