C10C11 Search Results

12a g1 battery fuse

Abstract: MO-222 phase selector 68-PIN LTM4608AV
Contextual Info: LTM4608A Low VIN, 8A DC/DC µModule with Tracking, Margining, and Frequency Synchronization FEATURES • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ DESCRIPTION Complete Standalone Power Supply ±1.75% Total DC Output Error –55°C to 125°C

Sony IMX 183

Abstract: Sony sony cmos sensor imx 178 Sony imx 214 Sony ImX 252 sony cmos sensor imx 226 Sony IMX 219 CMOS Sony "IMX 219" CMOS sony IMX 322 cmos sony cmos sensor imx 185
Contextual Info: i.MX 6Solo/6DualLite Applications Processor Reference Manual Document Number: IMX6SDLRM Rev. 1, 04/2013 i.MX 6Solo/6DualLite Applications Processor Reference Manual, Rev. 1, 04/2013 2 Freescale Semiconductor, Inc. Contents Section number Title Page Chapter 1

063-inch

Abstract: STPS3L40U k 385m mosfet BAT54 EEFUE0D331R L6995 L6995D L6995DTR LM317LD ETQP6F
Contextual Info: L6995 STEP DOWN CONTROLLER FOR HIGH DIFFERENTIAL INPUT-OUTPUT CONVERSION FEATURE • CONSTANT ON TIME TOPOLOGY ALLOWS OPERATION WITH LOWER DUTY THAN PWM TOPOLOGY ■ VERY FAST LOAD TRANSIENTS ■ 5V Vcc SUPPLY ■ 1.5V TO 28V INPUT VOLTAGE RANGE ■ 0.9V ±1% VREF

Contextual Info: PROPOSED RFLA3022 RFLA3022 Low Noise, High Linearity Amplifier 1500MHz to 3000MHz RFMD’s RFLA3022 is a Low Noise, High Linearity Amplifier housed in a 2.0mm x 2.0mm DFN package. The VBIAS pin can be used to adjust bias current of the LNA. Noise figure of 0.45dB and

KTA 3-25

Abstract: verilog code for 8254 timer MCF5204 so-8 marking code cyle
Contextual Info: ColdFire 2/2M Integrated Microprocessor User’s Manual Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and

bobbin EER35

Abstract: ECK-D3A472KBN YC-3508 EER-3541 CIRCUIT DIAGRAM TOP247Y eer35 TOP247Y ELC08D3R3E mfr-25fbf TOP247
Contextual Info: Design Example Report Title 20W Dual Output Power Supply using TOP247Y Specification Input: 85-265 VAC Output: 12V/1.25A, -14V/0.4A Application Cooking Range Author Power Integrations Applications Department Document Number DER-53 Date April 20, 2005 Revision

DS92LV1021

Abstract: DS92LV1023 DS92LV8028 PRBS-15 SCAN926260 SCAN926260TUF SCAN926260TUFX UJB196A
Contextual Info: SCAN926260 Six 1 to 10 Bus LVDS Deserializers with IEEE 1149.1 and At-Speed BIST General Description Features The SCAN926260 integrates six 10-bit deserializer devices into a single chip. The SCAN926260 can simultaneously deserialize up to six data streams that have been serialized

LTM4608AV

Abstract: LTM4608AMPV 68-PIN 10ce100fh LTM80
Contextual Info: LTM4608A Low VIN, 8A DC/DC µModule with Tracking, Margining, and Frequency Synchronization FEATURES • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ DESCRIPTION Complete Standalone Power Supply ±1.75% Total DC Output Error –55°C to 125°C

LTM4608

Abstract: 10ce100fh LTM4608V LTM4608EV 10CE1 68-PIN E11VOUT
Contextual Info: LTM4608 Low VIN, 8A DC/DC TM µModule with Tracking, Margining, and Frequency Synchronization FEATURES • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ DESCRIPTION Complete Standalone Power Supply ±1.5% Output Voltage Regulation 2.375V to 5.5V Input Voltage Range

capacitor cross reference

Abstract: SMD capacitor tantalum datasheet vishay SY58031 SY58031U SY58032U SY58033U
Contextual Info: Ultra-Precision 1:8 CML and LVPECL Fanout Buffer w/ Internal Termination SY58031/2/3U Evaluation Board General Description Features The SY58031U, SY58032U and SY58033U evaluation boards are designed for convenient setup and quick evaluation of the respective devices. The

Fuse N75

Contextual Info: LTM4608A Low VIN, 8A DC/DC µModule Regulator with Tracking, Margining, and Frequency Synchronization DESCRIPTION FEATURES Complete Standalone Power Supply n ±1.75% Total DC Output Error –55°C to 125°C n 2.7V to 5.5V Input Voltage Range n 8A DC, 10A Peak Output Current

Contextual Info: HSP43168 Data Sheet July 27, 2009 FN2808.12 Dual FIR Filter Features The HSP43168 Dual FIR Filter consists of two independent 8-tap FIR filters. Each filter supports decimation from 1 to 16 and provides on-board storage for 32 sets of coefficients. The Block Diagram shows two FIR cells each fed by a

CY37512P208-100UMB

Abstract: CY37512P208-100UM CY37032VP44-100AI CY37256P160-83UM CY37064P44-154YMB CY37256P160-125UMB CERAMIC leaded CHIP CARRIER CLCC 68
Contextual Info: Family PRELIMINARY Ultra37000 CPLD Family 5V, 3.3V, ISR™ High-Performance CPLDs Features General Description • In-System Reprogrammable ISR™ CMOS CPLDs — JTAG interface for reconfigurability — Design changes don’t cause pinout changes — Design changes don’t cause timing changes

CY37032VP44-100AI

Abstract: CY37064P44-154YMB CY37512P208-100UMB
Contextual Info: Family Ultra37000 CPLD Family 5V, 3.3V, ISR™ High-Performance CPLDs Features General Description • In-System Reprogrammable™ ISR™ CMOS CPLDs — JTAG interface for reconfigurability — Design changes don’t cause pinout changes — Design changes don’t cause timing changes

ina328

Abstract: HSP43168 HSP43168JC-33 HSP43168VC-45 Q100 INA822
Contextual Info: HSP43168 Data Sheet July 2004 Dual FIR Filter FN2808.10 configuration of the device is controlled through a standard microprocessor interface. The HSP43168 Dual FIR Filter consists of two independent 8-tap FIR filters. Each filter supports decimation from 1 to 16

J-STD-003

Abstract: Hitachi FR4 MCL-E-679 MCL-E-679 hitachi omega 600 TUC722 IPC-6012 ipc 840 z1p 10 IPC 6012 SMD MARKING CODE l6
Contextual Info: VIC O R C O N FID E N TIA L REV. THIS DOCUMENT AND THE D ATA DISCLOSED HEREIN OR HEREWITH IS NOT TO B E REPRODUCED. USED, OR DISCLOSED IN WHOLE OR IN PART TO ANYONE WITHOUT PERMISSION OF VICOR CORP. #1 CHAMFER .06 4 PL FINISH ED C O P PER WEIGHT AN D M A T E R IA L

GRM36

Abstract: HK1005 HK1608 NJG1709KC1
Contextual Info: NJG1709KC1 1.5/1.9GHz BAND FRONT-END GaAs MMIC •GENERAL DESCRIPTION NJG1709KC1 is a front-end GaAs MMIC including a LNA, a local amplifier and a mixer, designed mainly for 1.5 or 1.9GHz band cellular phone. The ultra small & ultra thin FLP10 package is applied.

MOSFET a5gnd

Abstract: LTM4608 LTM4608EV LTM4608V 10CE100FH A5GND LTC460
Contextual Info: LTM4608 Low VIN, 8A DC/DC µModule Regulator with Tracking, Margining, and Frequency Synchronization DESCRIPTION FEATURES Complete Standalone Power Supply n ±1.5% Output Voltage Regulation n 2.7V to 5.5V Input Voltage Range n 8A DC, 10A Peak Output Current

Contextual Info: S C A N 9 2 62 6 0 SCAN926260 Six 1 to 10 Bus LVDS Deserializers with IEEE 1149.1 and At-Speed BIST Te x a s In s t r u m e n t s Literature Number: SNLS153G Sem iconductor SCAN926260 Six 1 to 10 Bus LVDS Deserializers with IEEE 1149.1 and At-Speed BIST General Description

Contextual Info: @ SPT S P T 7 9 2 2 12-BIT, 30 MSPS, TTL, A/D CONVERTER SIGNAL PROCESSING TECHNOLOGIES FEATURES APPLICATIONS • • • • • • • • • • • • • • • • Monolithic 12-Bit 30 MSPS Converter 64 dB SNR @ 3.58 MHz Input On-Chip Track/Hold Bipolar ±2.0 V Analog Input

features cypress flash 370

Abstract: logic block diagram of cypress flash 370 device cypress flash 370 device cypress flash 370 cypress flash 370 technology cypress FLASH370 device cypress quickpro II cypress flash 370 device technology
Contextual Info: F la s h 3 7 0 T0 CYPRESS — Low-cost, text-based design tool, PLD compiler — IEEE 1076-compliant VHDL — Available on PC and Sun platforms • Warp3m CAE development system — VHDL input — ViewLogic graphical user interface — Schematic capture ViewDraw

920MHz

Abstract: RFMD PA LTE class c tuned amplifier
Contextual Info: RFPA3800 RFPA3800 GaAs HBT 150 MHz to 960MHz Power Amplifier GaAs HBT 150MHz TO 960MHz POWER AMPLIFIER Package: SOIC-8 Features  5W Output Power P1dB  High Linearity: OIP3>48dBm  High Efficiency    Low Noise: NF=3.2dB at 945MHz 5V to 7V Operation

5962-9951902QYA

Abstract: CY37128P100-125AXC U208 5962-9952301QZC CERAMIC LEADLESS CHIP CARRIER CY37032P44-125JXC CY37512P256-100BGI CY37192 CY37256 CY37384
Contextual Info: Ultra37000 CPLD Family 5V, 3.3V, ISR High-Performance CPLDs Features General Description • In-System Reprogrammable™ ISR™ CMOS CPLDs — JTAG interface for reconfigurability — Design changes do not cause pinout changes — Design changes do not cause timing changes

Fuse N75

Contextual Info: LTM4608A Low VIN, 8A DC/DC µModule Regulator with Tracking, Margining, and Frequency Synchronization Description Features Complete Standalone Power Supply n ±1.75% Total DC Output Error –55°C to 125°C n 2.7V to 5.5V Input Voltage Range n 8A DC, 10A Peak Output Current