7C31024 Search Results

AS7C1024

Abstract: AL205 AS7C31024 IN317
Contextual Info: Hi gh Per for m an ce 128K 128 K x8 C M OS S R A M A S 7C1024 A S 7C31024 1288K ×8 CMOS S R A M 12 Features • Organization: 131,072 words × 8 bits • High speed - 10/12/15/20 ns address access time - 3/3/4/5 ns output enable access time • Low power consumption

Contextual Info: High Performance 128KX8 CMOS SRAM AS7C1024 7C31024 128KX8 CMOS SRAM Features • Organization: 131,072 words x 8 bits • High speed - 1 0 / 1 2 / 1 5 / 2 0 / 2 5 ns address access time - 3 / 3 / 4 / 5 / 6 ns output enable access time • Low power consumption

megatron

Abstract: 10N12 Beacon 406 MHz AS7C31024 BJ 919 26A41
Contextual Info: High Performance 128Kx8 3.3V CMOS SRAM H J 8 |j ^ 7C31024 7C31024L PRELIMINARY _ Low Voltage 128Kx8 CMOS SRAM Common I/O FEATURES • Organization: 131,072 words x 8 bits • Equal access and cycle times • Single 3.3 ±0.3V power supply

Collins Electronics

Abstract: lm 3751 AS7010 NT 407 F 0637 Z05 AS7C1024-20PC LR 3441 AS7C1024 AS7C31024 AS701024-12TJC
Contextual Info: H ig h P e r f o r m a n c e 128KX8 C M O S SR A M A AS7C1024 7C31024 128KX8 CMOS SRAM Features • Organization: 131,072 words x 8 bits • High speed - 1 0 / 1 2 / 1 5 / 2 0 / 2 5 ns address access time - 3 / 3 / 4 / 5 / 6 n s output enable access time

Contextual Info: 12XKx8 3.3V SRAM ^ Features 7C31024 Logic Block Diagram ♦ High Performance CMOS: tAA=12-35 ns ♦ Fast OE access: t0 E=3-6 ns ♦ Very low power - 270 m W @ 100 M H z - 18. m W @ 10 M H z standby - 3.6 m W @ 10 M H z standby: L version ♦ Automatic CE1/CE2 power down

Contextual Info: H ig h P e r fo r m a n te 128KX8 C M O S SRAM A 7C31024LL mm II A 1 2 8 K X 8 In te lliw a tt lo w pow er CM O S SRAM Advance information Features > Easy m e m o ry e x p a n s io n w ith CE1, CE2, OE in p u ts • 2.7V to 3.6V o p e ra tin g ra n g e

Contextual Info: H igh Perform ance 128KX8 CMOS SRAM AS 7C1 0 2 4 A S7C 31024 1 2 8 K X 8 C M O S SRAM Features • T T L /L V T T L -c o m p a tib le , th r e e - s ta te I / O • H ig h s p e e d • 3 2 - p i n JEDEC s ta n d a r d p a c k a g e s - 3 0 0 m il P D IP a n d SOJ

AS7C31024LL-55BC

Abstract: AS7C31024LL-55TC AS7C31024LL-55TI
Contextual Info: 3UHOLPLQDU\#LQIRUPDWLRQ $6:&64357// 6169#45;.ð;#,QWHOOLZDWWŒ#ORZ#SRZHU#&026#65$0 HDWXUHV • Easy memory expansion with CE1, CE2, OE inputs • TTL/LVTTL-compatible, three-state I/O • JEDEC registered packaging - 32-pin TSOP packag - 48-ball 8mm x 6mm CSP BGA

64KX8

Abstract: AS7C1024 Plastic 32-pin 300 mil SOIC
Contextual Info: AS 7 C 1024 AS 7 C3 1024 llig li Perform ance 128KX8 CMOS SRAM 128KX8 CMOS' SRAM Features • O r g a n iz a tio n : 1 3 1 ,0 7 2 w o r d s X 8 b its • T T L /L V T T L -c o m p a tib le , th r e e - s ta te I / O • H ig h s p e e d • 3 2 - p i n JEDEC s ta n d a r d p a c k a g e s

TAA 761 A

Abstract: AS7C31024 AS7C31024-12PC
Contextual Info: High Performance 128Kx8 3.3V CMOS SRAM 7C31024 7C31024L Low voltage 128K×8 CMOS SRAM Common I/O Features • Organization: 131,072 words × 8 bits • Single 3.3 ±0.3V power supply • 5V tolerant I/O specification • High speed - 12/15/20/25/35 ns address access time

Contextual Info: High Performance 128Kx8 3.3 V CMOS SRAM H 7C31024 7C31024L PRELIMINARY Low Voltage 128Kx8 CMOS SRAM Common I/O FEATU RES Equal access and cycle times • Organization: 131,072 words x 8 bits • Easy memory expansion with CE1, CE2 and OE inputs • Single 3.3 ±0.3V power supply

S7C1024-20TJC

Abstract: 7C1024
Contextual Info: Features • O rg a n iz a tio n : 1 3 1 ,0 7 2 w o r d s x 8 b its • T T L /L V T T L -com patible, th re e -s ta te I / O • H ig h s p e e d • 3 2 - p in JEDEC sta n d a rd p ackages - 3 0 0 m il PDIP a n d SOJ - 1 0 / 1 2 / 1 5 / 2 0 n s a d d re ss access tim e

Contextual Info: A SFÜ lO Ptlllt Advance information 3.3V 128Kx8 lnTelliwatt'v low pow er CMOS SRAM Features • • • • irtelliw a t t activ e pow e r re d u c tio n c irc u itry 2 ,7V to 3 ,6V o p e ra tin g la n g e O rg a n iz a tio n : 1 3 1 ,0 7 2 w o r d s x 8 b it s

C31024

Contextual Info: Preliminary information •■ 7C31024LL A 3.3V 12 8 K X 8 Intelliwatt low power CM OS SRAM Features • • • • Intelliwatt active power reduction circuitry 2.7V to 3.6Yoperating range Organization: 131,072 words x 8 bits High speed - 55/ 7 0 /1 0 0 ns address access time

310241

Abstract: A83Z
Contextual Info: High Performance •■ AS7C3 1024 128KX8 3.3V II 7C31024L CMOS SRAM @ Low voltage 128KX8 CMOS SRAM C o m m o n I / O Features • O r g a n iz a tio n : 1 3 1 ,0 7 2 w o r d s x 8 b its • E q u a l a c c e ss a n d c y c le tim e s • S in g le 3 .3 + 0 .3 V p o w e r s u p p ly

AS7C31024LL-5STI

Contextual Info: H ig h P e r fo r m a n c e 128K X 8 C M O S SR AM - I I A S7C 31024L L Æ 1 2 8 K X 8 In teH iw att lo w pow er CM OS SRAM Advance information Features • E a sy m e m o r y e x p a n s i o n w i t h C E 1 , C E 2 , O E in p u t s • 2 .7 V t o 3 .6 V o p e r a t i n g r a n g e

land pattern for TSOP 2 54 pin

Abstract: TSOP 54 land pattern AS7C1024 AS7C31024 land pattern for TSOP 2 44 PIN
Contextual Info: H igh P erfo rm an ce •■ 128Kx8 A S7C 1024 A S7C 31024 H CMOS SRAM 1 2 8 K X 8 CM O S SRAM C o m m o n I / O Features • O rg a n iz a tio n : 1 3 1 ,0 7 2 w o rd s x 8 b its • H ig h sp e ed - 3 0 0 m il PDIP a n d SOJ - 1 0 / 1 2 / 1 5 / 2 0 n s ad d ress access tim e