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    Vishay Dale CRCW0201240KFKED

    RES SMD 240K OHM 1% 1/20W 0201
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    DigiKey CRCW0201240KFKED Cut Tape 9,800 1
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    CRCW0201240KFKED Digi-Reel 9,800 1
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    Vishay Dale CRCW251240K2FKEG

    RES SMD 40.2K OHM 1% 1W 2512
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    DigiKey CRCW251240K2FKEG Reel 8,000 2,000
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    Bristol Electronics CRCW251240K2FKEG 1,103
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    Vishay Dale CRCW0201240KFNED

    RES SMD 240K OHM 1% 1/20W 0201
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    DigiKey CRCW0201240KFNED Cut Tape 7,317 1
    • 1 $0.1
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    CRCW0201240KFNED Digi-Reel 7,317 1
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    CRCW0201240KFNED Reel 5,000 10,000
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    TE Connectivity SMQF1240KJT

    SMQF1W 240K 5%
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    DigiKey SMQF1240KJT Reel 6,000 2,000
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    SMQF1240KJT Cut Tape 6,000 1
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    SMQF1240KJT Digi-Reel 6,000 1
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    Master Electronics SMQF1240KJT
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    Allegro MicroSystems LLC ACS71240KEXBLT-050U5

    SENSOR CURRENT HALL 50A 12PWRQFN
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    DigiKey ACS71240KEXBLT-050U5 Cut Tape 4,016 1
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    ACS71240KEXBLT-050U5 Reel 3,000 1,500
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    Mouser Electronics ACS71240KEXBLT-050U5 3,259
    • 1 $1.68
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    1240K Datasheets Context Search

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    ST2064B

    Abstract: st2064 W65C02S 181444 65C02S
    Text: ST Sitronix ST2064B 8 BIT Microcontroller with 64K bytes ROM PRELIMINARY Notice: This is not a final specification. Some parameters are subject to change. 1. FEATURES „ „ „ „ „ „ „ „ „ „ Totally static 65C02S CPU ROM: 64K x 8-bit RAM: 2432 x 8-bit


    Original     		PDF ST2064B 65C02S 128-level 13-2CONTROL ST2064B ST2064 st2064 W65C02S 181444

    ST2064

    Abstract: ST2064B
    Text: ST ST2064B 8 BIT Microcontroller with 64K bytes ROM Note: Sitronix Technology Corp. reserves the right to change the contents in this document without prior notice. This is not a final specification. Some parameters are subject to change. 1. FEATURES Dual clock sources with warm-up timer


    Original     		PDF ST2064B 128-level voltag064B ST2064 ST2064 ST2064B

    34992

    Abstract: 40X32 XC2V80 XC2V40 XC2V250 XC2V500 XC2V10000
    Text: Virtex Reference Virtex-II and Virtex Series FPGAs X 17280 207K 1.5M 1104K 48x40 1920 7680 528 2/24 Y X 24192 290K 2M 1344K 56x48 2688 10752 624 2/24 Y X 32256 387K 3M 2176K 64x56 3584 14336 720 2/24 Y X 51840 622K 4M 2880K 80x72 5760 23040 912 2/24 Y X 76032


    Original     		PDF 857K-2 1240K 80x120 221K-3 1530K 92x138 608K-4 1846K 104x156 068K-1 34992 40X32 XC2V80 XC2V40 XC2V250 XC2V500 XC2V10000

    mod 8 ring counter using JK flip flop

    Abstract: ega to vga circuits q 1257 5v constant power supply lob transistor BR 8772 BR 8050 D 555 design guide BT 4840 CD 4081 Cmos 2 input and gate IC cell phones
    Text: MF1567-01 STANDARD CELL / EMBEDDED ARRAY S1K70000 / S1X70000 Series 5V Tolerant DESIGN GUIDE NOTICE No part of this material may be reproduced or duplicated in any form or by any means without the written permission of Seiko Epson. Seiko Epson reserves the right to make changes to this material without notice.


    Original     		PDF MF1567-01 S1K70000 S1X70000 mod 8 ring counter using JK flip flop ega to vga circuits q 1257 5v constant power supply lob transistor BR 8772 BR 8050 D 555 design guide BT 4840 CD 4081 Cmos 2 input and gate IC cell phones

    interfacing cpld xc9572 with keyboard

    Abstract: VERIFY 93K template 34992 XC95288XL evaluation board schematic XCR3032C XcxxX xilinx logicore core dds XC2S15-VQ100 creative labs model 3400 FXS-100
    Text: The Programmable Logic Data Book 2000 R R , XC2064, NeoCAD PRISM, XILINX Block Letters , XC-DS501, NeoROUTE, XC3090, FPGA Architect, XC4005, FPGA Foundry, XC5210, Timing Wizard, NeoCAD, TRACE, NeoCAD EPIC, XACT are registered trademarks of Xilinx, Inc. , all XC-prefix product designations, AllianceCore, Alliance Series, BITA, CLC, Configurable Logic Cell, CoolRunner, Dual Block, EZTag, Fast CLK, FastCONNECT,


    Original     		PDF XC2064, XC-DS501, XC3090, XC4005, XC5210, interfacing cpld xc9572 with keyboard VERIFY 93K template 34992 XC95288XL evaluation board schematic XCR3032C XcxxX xilinx logicore core dds XC2S15-VQ100 creative labs model 3400 FXS-100

    Untitled

    Abstract: No abstract text available
    Text: RTC 27-Aug-08 Evaluation of Subsystem Clock Oscillation Circuit SP-T2A 6.0pF with S-35199A-12P[WLP 1.87x1.97 ] Measurement conditions :3.0V,1.1V SP-T2A Vdd=1.1 to 5.5V Model :SP-T2A Frequency :Fo=32.768kHz Frequency tolerance :dF/Fo= +/-20x10-6 Load capacitance


    Original     		PDF 27-Aug-08 S-35199A-12P 768kHz /-20x10-6 1x10-6W -430kohm

    34992

    Abstract: XC4013XLA 176K-323K
    Text: Reference Virtex Series XC4000XLA FPGAs and E consists of two devices that have a high RAMto-logic gate ratio that is targeted for specific applications such as gigabit per second network switches and high definition graphics. ach Virtex family has its own unique features to meet different application requirements. All devices have both distributed


    Original     		PDF XC4000XLA XC4000 569K-3 1414K 628K-2 1062K 72x108 857K-2 34992 XC4013XLA 176K-323K

    34992

    Abstract: XCV600E FG680 BG680 XCV100 TQ144 XCV1000E XCV600E HQ240 XCV300 PQ240 XCV50 PQ240 CS144 BG560
    Text: Competitive Overview Virtex Series FPGA Competitive Cross Reference XCV100E 32K 30K-95K 2988 2/24 EP20K100E XCV200E 94 158 176 284 PQ240 FG256 BG432 FG456 158 176 316 312 83K 80K-400K 7116 2/24 PQ240 BG432 FG676 158 316 404 130K 130K-560K 10812 2/24 HQ240


    Original     		PDF XCV100E 30K-95K XCV200E 80K-400K PQ240 BG432 FG676 130K-560K HQ240 34992 XCV600E FG680 BG680 XCV100 TQ144 XCV1000E XCV600E HQ240 XCV300 PQ240 XCV50 PQ240 CS144 BG560

    34992

    Abstract: No abstract text available
    Text: Reference Virtex Virtex and XC4000X Series FPGAs Each Virtex family has its own unique features to meet different application requirements. All devices have both distributed RAM and block RAM, and between four and eight DLLs for efficient clock management.


    Original     		PDF XC4000X tar8816 146K-1 628K-2 1062K 72x108 857K-2 1240K 80x120 221K-3 34992

    XC95288XL evaluation board schematic

    Abstract: 34992 xilinx xc9536 digital clock 104x156 542k XC95288XL evaluation board XC95288XL pinout missile guidance XC95144XL prom XC9536
    Text: An Introduction to Xilinx Products R February 15, 2000 1* About Xilinx Xilinx is the leading provider of complete programmable logic solutions. The company’s products help minimize risks for manufacturers of electronic equipment by shortening the time required to develop products and take them to


    Original     		PDF XCR5032C PZ5032C) XCR3384XL XCR5064C PZ5064C) XCR5128C PZ5128C) XCR3032XL XCR3064XL XC95288XL evaluation board schematic 34992 xilinx xc9536 digital clock 104x156 542k XC95288XL evaluation board XC95288XL pinout missile guidance XC95144XL prom XC9536

    ST20P64

    Abstract: 1000HP ST2064 "LCK" BD 9676
    Text: ST ST20P64 8 BIT Microcontroller with 64K bytes PROM OTP Notice: Sitronix Technology Corp. reserves the right to change the contents in this document without prior notice. This is not a final specification. Some parameters are subject to change. 1. FEATURES


    Original     		PDF ST20P64 128-level programma0P64 ST2064B ST20P64 1000HP ST2064 "LCK" BD 9676

    ega to vga circuits

    Abstract: IC 4027 pin diagram BTY 79 equivalent transistor BR 8772 mod 8 ring counter using JK flip flop truth table of 4027 4027 flip flop data sheet 5v constant power supply lob atx 300 power supply schematic schematic diagram dc-ac inverter
    Text: MF1523-03 STANDARD CELL / EMBEDDED ARRAY S1K70000 / S1X70000 Series DESIGN GUIDE NOTICE No part of this material may be reproduced or duplicated in any form or by any means without the written permission of Seiko Epson. Seiko Epson reserves the right to make changes to this material without notice.


    Original     		PDF MF1523-03 S1K70000 S1X70000 ega to vga circuits IC 4027 pin diagram BTY 79 equivalent transistor BR 8772 mod 8 ring counter using JK flip flop truth table of 4027 4027 flip flop data sheet 5v constant power supply lob atx 300 power supply schematic schematic diagram dc-ac inverter

    2190 ic for lg tv

    Abstract: CD 4081 Cmos 2 input and gate IC lg tv electronic board schematic epson FC-135 marking mod 8 ring counter using JK flip flop AM 5766 inverter schematic diagram dc-ac inverter sk a1106 510 power supply using bd 182 BT 4840
    Text: S1X60000 Series DESIGN GUIDE EMBEDDED ARRAY S1X60000 Series DESIGN GUIDE S1X60000 Series DESIGN GUIDE ELECTRONIC DEVICES MARKETING DIVISION EPSON Electronic Devices Website http://www.epsondevice.com This manual was made with recycle papaer, and printed using soy-based inks.


    Original     		PDF S1X60000 2190 ic for lg tv CD 4081 Cmos 2 input and gate IC lg tv electronic board schematic epson FC-135 marking mod 8 ring counter using JK flip flop AM 5766 inverter schematic diagram dc-ac inverter sk a1106 510 power supply using bd 182 BT 4840

    VT-200

    Abstract: No abstract text available
    Text: RTC 29-Sep-08 Evaluation of Subsystem Clock Oscillation Circuit VT-200 6.0pF with S-35199A-12P[WLP 1.87x1.97 ] Measurement conditions :3.0V,1.1V VT-200(Pb_free) Vdd=1.1 to 5.5V Model :VT-200 Frequency :Fo=32.768kHz Frequency tolerance :dF/Fo= +/-20x10-6 Load capacitance


    Original     		PDF 29-Sep-08 VT-200 S-35199A-12P VT-200 768kHz /-20x10-6 50kohm 1x10-6W

    Untitled

    Abstract: No abstract text available
    Text: SAW DEVICES TOYOCOM SAW DEVICES LINE UP RF/IF RF RF IF Market C e llu la r C e llu la r C e llu la r A pplication Frequency Bandw idth Type Holder A M P S , A D C ; TX 8 3 6 .5 M H z 25M H z T Q S -9 1 2 SS-38S1 A M P S , A D C ; RX 8 8 1.5M H z 25M H z T Q S -9 1 3


    OCR Scan     		PDF SS-38S1 S-911 S-901 25MHz, S-801

    S-431

    Abstract: No abstract text available
    Text: SAW DEVICES TOYOCOM SAW D E V IC E S LIN E UP RF/IF RF RF IF RF IF RF Market C e llu la r C e llu la r C e llu la r C ord le ss, P ager C ord le ss P ager Application Frequency Bandwidth Type Holder A M P S , A D C ; TX 8 3 6 .5 M H z 2 5M H z T Q S -9 1 2


    OCR Scan     		PDF SS-38S1 S-901 S-801 S-431