CMOS 4000B series device
Abstract: 4000B 74HC 74HCT
Text: 7 4H C /H CT40103 ^J _MSI 8-BIT SYNCHRONOUS B IN A R Y DOWN COUNTER FEATURES • • • • Cascadable Synchronous o r asynchronous preset Output capability: standard •cc category: MSI SY M B O L G ENERAL DESCRIPTION The 7 4 H C /H C T 4 0 1 0 3 consist each o f
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74HC/HCT40103
74HC/HCT40103
4000B"
CMOS 4000B series device
4000B
74HC
74HCT
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tda1005a
Abstract: TDA1005 adjustable Q notch filter 297V2 a1005a NTE stereo decoder TDA1005A/1005AT
Text: Signelics TDA1005A/1005AT Frequency Multiplex PLL Stereo Decoder Product Specification Linear Products DESCRIPTION The TDA1005A is a high quality PLL stereo decoder based on the frequencydivision multiplex FDM principle, per forming: -Excellent ACI (Adjacent Channel In
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TDA1005A/1005AT
TDA1005A
300Hz;
12kHz)
12kHz;
19kHz
TDA1005
adjustable Q notch filter
297V2
a1005a
NTE stereo decoder
TDA1005A/1005AT
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full adder ic number
Abstract: ic pin configuration binary adder
Text: 74HC/HCT283 MSI 4-BIT B IN A R Y FU LL A D D E R WITH FA ST C A R R Y FEA TU RES • • • • • T Y P IC A L High-speed 4-bit binary addition Cascadable in 4-bit increments Fast internal look-ahead carry Output capability: standard *CC category: MS* G E N E R A L D E S C R IP T IO N
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74HC/HCT283
CT283
full adder ic number
ic pin configuration binary adder
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Untitled
Abstract: No abstract text available
Text: 74HC/HCT174 MSI HEX D-TYPE FLIP-FLOP W ITH RESET; POSITIVE-EDGE TRIGGER FEATURES T Y P IC A L • S ix e d g e -trig g e re d D -ty p e f lip - f lo p s • A s y n c h ro n o u s m a s te r reset • O u tp u t c a p a b ility : sta n d a rd • I q q c a te g o ry : M S I
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74HC/HCT174
7Z93640
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hct 347
Abstract: 74HC 74HCT Modulo-11
Text: 7 4 H C /H C T 1 6 3 MSI PRESETTABLE SYNCHRONOUS 4-BIT BINA RY COUNTER; SYNCHRONOUS RESET F E A TU R E S • • • • • • T Y P IC A L Synchronous counting and loading Tw o count enable inputs for n-bit cascading Positive-edge triggered clock Synchronous reset
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74HC/HCT163
HC/HCT163
Modulo-11
hct 347
74HC
74HCT
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TDA1001BT
Abstract: No abstract text available
Text: TDA 1001B Signetics Interference Suppressor Product Specification Linear Products DESCRIPTION The TDA1001B is a monolithic integrat ed circuit for suppressing interference and noise in FM mono and stereo re ceivers. FEATURES • Active low-pass and high-pass
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1001B
TDA1001B
19kHz)
P08750S
TDA1001B)
TDA1001BT)
80UAMâ
TDA1001B
TDA1001BT
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PAL 007 B
Abstract: sot109a TDA4650 TDA4665 TDA4665T
Text: Philips Semiconductors Preliminary specification Baseband delay line \ TDA4665 -FEA TU R ES ; Q U IC K REFER EN C E D A TA • Two com b filters, using the sw itched-capacitor technique, for one line delay time 64 (is • A djustm ent-free application
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A4665
711DflSb
TDA4665
TDA4650
711002b
PAL 007 B
sot109a
TDA4650
TDA4665
TDA4665T
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mr 4040
Abstract: HCT4040 CTR12 4000B 74HC 74HC-HCT4040
Text: 74H C /H CT4040 MSI 12-STAGE B IN A R Y RIPPLE COUNTER FE A T U R E S • • TYPICAL O utput capability: standard 'CC category: MSI G E N E R A L D ES C R IPTIO N The 74HC/HCT4040 are high-speed Si-gate CMOS devices and are pin compatible with the ” 4 040" o f the
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74HC/HCT4040
12-STAGE
4000B"
mr 4040
HCT4040
CTR12
4000B
74HC
74HC-HCT4040
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4518BD
Abstract: SOT38Z BCD counter
Text: HEF4518B MSI DUAL BCD COUNTER The H EF4518B is a dual 4-b it internally synchronous BCD counter. The counter has an active HIG H clock input CPo and an active LOW clock input (CP-|), buffered outputs from all four bit positions (Oo to O3 ) and an active H IG H overriding asynchronous master reset input (M R ). The counter advanceson either the LOW to H IG H transition of the CPo input if CP-| is H IG H or the H IG H to LOW
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HEF4518B
HEF4518B
4518BD
SOT38Z
BCD counter
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Untitled
Abstract: No abstract text available
Text: 74HC/HCT190 MSI PRESETTABLE SYNCHRONOUS BCD DECADE UP/DOWN COUNTER FEATURES TYPICAL PARAMETER SYMBOL * Synchronous reversible counting • Asynchronous parallel load • Count enable control for synchronous expansion * Single up/down control input * Output capability: standard
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74HC/HCT190
74HC/HCT19Q
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1HT251
Abstract: 2T203 kt117 1T308 2T355A 2T312 IT308B K1HT251 kt117b 2T313
Text: WmmËÊÊm W h A iW f W * i r*ïS >*••> ro s ît. ;<W«a 7 mm m$m 15ÎÏ3 Sktófefc?¿feS 11181 immm SI f ' ■ ' ' ' : m S ËÊB B S M M CnPABOHHMK nonynpoBQQHHKOBbiE nPHBOPbl TPAH3MCTOPbl MAflOI/ì MOLUHOCTM n O f l PEA A K L4H EPÌ A . B rO flO M E A O B A
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FojO33
KT357
KT358
KT361
KT363
KT364-2
KT366
KT368
KT369
KT369-1
1HT251
2T203
kt117
1T308
2T355A
2T312
IT308B
K1HT251
kt117b
2T313
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74HC-HCT221
Abstract: HCT221
Text: 74HC/HCT221 MSI 7 V. SUPERSEDES D A T A OF A P R IL 1988 DUAL NON-RETRIGG ERABLE MONOSTABLE M U LTIVIB R A TO R W ITH RESET FE A TU R E S • TYPICAL • Pulse width variance is typically less than ± 5% Pin-out identical to " 1 2 3 " Overriding reset terminates output
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74HC/HCT221
74HC-HCT221
HCT221
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Untitled
Abstract: No abstract text available
Text: 74HC/HCT259 MSI 8-BIT ADDRESSABLE LATCH F E A TU R E S • • • • • • • • • T Y P IC A L Combines dem ultiplexer and 8-bit latch Serial-to-parallel capability O utput from each storage bit available Random addressable data entry Easily expandable
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74HC/HCT259
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phu 3.3
Abstract: E NY 74LV157 74LV157D 74LV157DB 74LV157N 74LV157PW
Text: P hilips S em ico n d uctors Product Specification Quad 2-input multiplexer FEA TU R E S O ptim ized fo r L ow V oltag e applications: 1.0 to 3 .6 V A ccepts T TL input levels b etw een Vcc = 2.7 V and V cc = 3.6 V T ypical V 0LP o u tp u t ground b ounce < 0.8 V at Vcc = 3.3 V,
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74LV157
74LV157
74HC/HCT157.
711002b
phu 3.3
E NY
74LV157D
74LV157DB
74LV157N
74LV157PW
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9038b
Abstract: CMOS 4538 series 74HC-HCT4538 LT 1083 CP 4000B 74HC 74HCT PHILIPS 108.3 TYPE 1 301-RD
Text: 74HC/HCT4538 MSI DUAL RETRIGGERABLE PRECISION MONOSTABLE MULTIVIBRATOR F EA T U R E S TYPICAL SYMBOL • • Separate reset inputs Triggering from leading or trailing edge O utput capability: standard ICC category: MSI *p h l / tPLH propagation delay nAo, n A i to nQ, nQ
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74HC/HCT4538
74HC/HCT4538
4000B"
9038b
CMOS 4538 series
74HC-HCT4538
LT 1083 CP
4000B
74HC
74HCT
PHILIPS 108.3 TYPE 1
301-RD
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82353
Abstract: intel 82358 82359 82353 intel intel 82353 82358DT
Text: 82353 ADVANCED DATA PATH • Dual Port Architecture Allows Host to Access Memory without Incurring EISA Arbitration ■ Provides Optimal i486 Burst Performance ■ High Performance, Flexible Memory Support: — Designed as a 16-Bit Slice which Interfaces 16, 32, or 64-Bit Memory
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16-Bit
64-Bit
82353s
128-Bit
32-Bit
164-Pin
t109A
t120A
t120B
82353
intel 82358
82359
82353 intel
intel 82353
82358DT
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hct251
Abstract: No abstract text available
Text: 74HC/HCT251 MSI 8-INPUT MULTIPLEXER; 3-STATE FEATURES • • TYPICAL • True and complement outputs Both outputs are 3-state for further m ultiplexer expansion M ultifunction capability Permits multiplexing from n-lines to one line O utput capability: standard
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74HC/HCT251
7Z93105
hct251
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74HC-HCT390
Abstract: bcd decade counter ttl 74HC 74HCT
Text: 74HC/HCT390 MSI DUAL DECADE RIPPLE COUNTER FEATURES • Two BCD decade or bi-quinary counters • One package can be configured to divide-by-2,4, 5 ,1 0 ,2 0 ,2 5 , 50 or 100 • Two master reset inputs to clear each decade counter individually • Output capability: standard
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74HC/HCT390
74HC/HCT390
74HC-HCT390
bcd decade counter ttl
74HC
74HCT
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TR-EM-208
Abstract: No abstract text available
Text: 74HC/HCT165 MSI 8-BIT PARALLEL-IN/SERIAL-OUT SHIFT REGISTER FEA TU R E S T Y P IC A L • • • Asynchronous 8-bit parallel load Synchronous serial input Output capability: standard • 'CC caie9 ° ry : MSI SYMBOL HC propagation delay CP to Q 7 , Q 7 PL to Q 7 , Q 7
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74HC/HCT165
TR-EM-208
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Untitled
Abstract: No abstract text available
Text: 74HC/HCT190 MSI PRESETTABLE SYNCHRONOUS BCD DECADE UP/DOWN COUNTER FEATURES PARAM ETER The 7 4 H C /H C T 1 9 0 are asynchronously presettable u p /d o w n BCD decade counters. The y c o n ta in fo u r master/slave flip -flo p s w ith in te rn a l gating and steering logic to
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74HC/HCT190
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sfz455
Abstract: 7XNS-A7523DY sfz455a AM receiver SF2460A 27mhz rf amplifier cq 724 g diode sfz460a 199CN TDA1072AT
Text: TDA1072AT A_ A M R E C E IV E R C IR C U IT G E N E R A L D ESCR IPTIO N The T D A 1 0 7 2 A T integrated A M receiver c irc u it perform s th e active and p a rt o f th e filte rin g fu n ctio n s o f an A M radio receiver. It is intended fo r use in mains-fed home receivers and car radios. The c irc u it can
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TDA1072AT
TDA1072AT
sfz455
7XNS-A7523DY
sfz455a
AM receiver
SF2460A
27mhz rf amplifier
cq 724 g diode
sfz460a
199CN
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6-to-64
Abstract: 74HC 74HCT 3 TO 8 DECODER
Text: 7 4 H C /H C T 13 7 MSI 3-T O -8 L IN E D E C O D E R /D E M U L T IP L E X E R W IT H AD D R E SS LATCHES; IN V E R T IN G FEATURES T Y P IC A L • Combines 3-to-8 decoder with 3-bit latch • Multiple input enable for easy expansion or independent controls
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74HC/HCT137
6-to-64
74HC
74HCT
3 TO 8 DECODER
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74HC
Abstract: 74HCT
Text: 74HC/HCT390 MSI D U A L D E C A D E RIPPLE C O U N T E R F E A TU R E S Tw o BCD decade or bi-quinary counters • One package can be configured to divide-by-2,4 , 5 , 1 0 , 2 0 , 2 5 , 5 0 or 100 • Tw o master reset inputs to clear each decade counter individually
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74HC/HCT390
74HC/HCT390
74HC
74HCT
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74HC
Abstract: 74HCT hct251
Text: 74HC/HCT251 MSI 8-INPUT M ULTIPLEXER; 3-STATE FEATURES T Y P IC A L • • True and complement outputs Both outputs are 3-state for further multiplexer expansion • Multifunction capability • Permits multiplexing from n-lines to one line • Output capability: standard
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PC74HC/HCT251
74HC/HCT251
74HC
74HCT
hct251
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