S13140 Search Results
S13140 Price and Stock
Cinch Connectivity Solutions MS-13-140Barrier Terminal Blocks MARKING STRIP 13 TRM 140 Series |
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Cinch Connectivity Solutions MS-13-140-YBarrier Terminal Blocks 13 TERM 2 ROW .375 MARKER STRIP |
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nVent CSS131405050 Mm Offset Positioner, Solid Round Conductor, Cbsc13, Cbsc14/Erico Electric |Nvent Erico CSS1314050 |
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CSS1314050 | Pack | 25 |
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Samtec Inc HCSD-20-S-13.14-01-N |
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Samtec Inc TCSD-10-S-13.14-01-N |
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S13140 Datasheets Context Search
| Catalog Datasheet | Type | Document Tags | |
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Contextual Info: SPICE Device Model SUD08P06-155L www.vishay.com Vishay Siliconix P-Channel 60 V D-S 175 °C MOSFET DESCRIPTION CHARACTERISTICS The attached SPICE model describes the typical electrical characteristics of the p-channel vertical DMOS. The subcircuit model is extracted and optimized over the - 55 °C |
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SUD08P06-155L 2002/95/EC. 2002/95/EC 2011/65/EU. JS709A 02-Oct-12 | |
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Contextual Info: SPICE Device Model SiSA04DN www.vishay.com Vishay Siliconix N-Channel 30 V D-S MOSFET DESCRIPTION CHARACTERISTICS The attached SPICE model describes the typical electrical characteristics of the n-channel vertical DMOS. The subcircuit model is extracted and optimized over the - 55 °C |
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SiSA04DN 2002/95/EC. 2002/95/EC 2011/65/EU. JS709A 02-Oct-12 | |
7MC156Contextual Info: IDT 7MC156 256K 256K x 1-BIT CMOS STATIC RAM SIP MODULE FEATURES: DESCRIPTION: • High-denslty256K (256K x 1) CMOS static RAM module • Surface mounted LCC components mounted on a co-flred ceram ic substrate • Available In low profile 28-pin ceram ic SIP (single In-line |
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High-denslty256K 28-pin 600mW IDT7187S 7MC156 S13-144 IDT7MC156 7MC156 S13-145 | |
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Contextual Info: SPICE Device Model SiS456DN www.vishay.com Vishay Siliconix N-Channel 30 V D-S MOSFET DESCRIPTION CHARACTERISTICS The attached SPICE model describes the typical electrical characteristics of the n-channel vertical DMOS. The subcircuit model is extracted and optimized over the - 55 °C |
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SiS456DN 2002/95/EC. 2002/95/EC 2011/65/EU. JS709A 02-Oct-12 | |
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Contextual Info: IDT 7MC156 256K 256K x 1-BIT CMOS STATIC RAM SIP MODULE FEATURES: DESCRIPTION: • H igh-dansity 256K (256K x 1) CMOS static RAM m odule • Inputs and outputs d ire ctly TTL-com patible The IDT7MC156 is a 256K (256K x 1-bit) high-speed static RAM m odule constructed on a co-fired ceram ic substrate using four |
OCR Scan |
28-pin 600mW IDT7187s patible44 IDT7MC156 7MC156 256Kx S13-145 | |
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Contextual Info: SPICE Device Model SiHB22N60E www.vishay.com Vishay Siliconix E Series Power MOSFET DESCRIPTION CHARACTERISTICS The attached SPICE model describes the typical electrical characteristics of the n-channel vertical DMOS. The subcircuit model is extracted and optimized over the - 55 °C |
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SiHB22N60E 2002/95/EC. 2002/95/EC 2011/65/EU. JS709A 02-Oct-12 | |
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Contextual Info: SPICE Device Model Si7850DP www.vishay.com Vishay Siliconix N-Channel 60 V D-S Fast Switching MOSFET DESCRIPTION CHARACTERISTICS The attached SPICE model describes the typical electrical characteristics of the n-channel vertical DMOS. The subcircuit model is extracted and optimized over the - 55 °C |
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Si7850DP 2002/95/EC. 2002/95/EC 2011/65/EU. JS709A 02-Oct-12 | |
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Contextual Info: SPICE Device Model Si7898DP www.vishay.com Vishay Siliconix N-Channel 150 V D-S MOSFET DESCRIPTION CHARACTERISTICS The attached SPICE model describes the typical electrical characteristics of the n-channel vertical DMOS. The subcircuit model is extracted and optimized over the - 55 °C |
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Si7898DP 2002/95/EC. 2002/95/EC 2011/65/EU. JS709A 02-Oct-12 | |
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Contextual Info: SPICE Device Model Si4490DY www.vishay.com Vishay Siliconix N-Channel 200 V D-S MOSFET DESCRIPTION CHARACTERISTICS The attached SPICE model describes the typical electrical characteristics of the n-channel vertical DMOS. The subcircuit model is extracted and optimized over the - 55 °C |
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Si4490DY 2002/95/EC. 2002/95/EC 2011/65/EU. JS709A 02-Oct-12 | |
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Contextual Info: SPICE Device Model SUD19N20-90 www.vishay.com Vishay Siliconix N-Channel 200 V D-S 175 °C MOSFET DESCRIPTION CHARACTERISTICS The attached SPICE model describes the typical electrical characteristics of the n-channel vertical DMOS. The subcircuit model is extracted and optimized over the - 55 °C |
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SUD19N20-90 2002/95/EC. 2002/95/EC 2011/65/EU. JS709A 02-Oct-12 |