QUAD TWO INPUT NAND SCHMITT TRIGGER LOW POWER Search Results

HD74LV132A

Abstract: HD74LV132AFPEL HD74LV132ARPEL HD74LV132ATELL
Contextual Info: HD74LV132A Quad. 2-input NAND Schmitt-triggers REJ03D0317–0300Z Previous ADE-205-260A (Z Rev.3.00 Jun. 03, 2004 Description The HD74LV132A has four two-input schmitt trigger NAND gates in a 14-pin package. Low-voltage and high-speed operation is suitable for the battery-powered products (e.g., notebook computers), and the

74HC132

Abstract: 74VHC132 74VHC132M 74VHC132MTC 74VHC132MTCX 74VHC132MX 74VHC132SJ M14A VHC00 VHC132
Contextual Info: 74VHC132 Quad 2-Input NAND Schmitt Trigger tm Features General Description • High Speed: tPD = 3.9ns Typ. at VCC = 5V ■ Power down protection is provided on all inputs The VHC132 is an advanced high speed CMOS 2-input NAND Schmitt Trigger Gate fabricated with silicon gate

Contextual Info: 74VHC132 Quad 2-Input NAND Schmitt Trigger Features General Description • High Speed: tPD = 3.9ns Typ. at VCC = 5V ■ Power down protection is provided on all inputs The VHC132 is an advanced high speed CMOS 2-input NAND Schmitt Trigger Gate fabricated with silicon gate

TTL Schmitt-Trigger LOW POWER SCHOTTKY

Abstract: 74HC132 74VHC132 74VHC132M 74VHC132MTC 74VHC132SJ M14A M14D MTC14 VHC00
Contextual Info: 74VHC132 Quad 2-Input NAND Schmitt Trigger Features General Description • High Speed: tPD = 3.9ns Typ. at VCC = 5V ■ Power down protection is provided on all inputs The VHC132 is an advanced high speed CMOS 2-input NAND Schmitt Trigger Gate fabricated with silicon gate

74LVC132A

Abstract: 74LVC132ABQ 74LVC132AD 74LVC132APW TSSOP14
Contextual Info: 74LVC132A Quad 2-input NAND Schmitt trigger Rev. 01 — 15 December 2006 Product data sheet 1. General description The 74LVC132A is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. The 74LVC132A provides four 2-input NAND gates with Schmitt trigger inputs. It is

MC14093BCP circuit diagram

Abstract: cd4093 MC14093BCP CD4093 applications schematic MC14093B cd4093 electrical diagram CD4093 ic 10 pin diagram CD4093 applications
Contextual Info: MC14093B Quad 2-Input NAND" Schmitt Trigger The MC14093B Schmitt trigger is constructed with MOS P–channel and N–channel enhancement mode devices in a single monolithic structure. These devices find primary use where low power dissipation and/or high noise immunity is desired. The MC14093B

3 to 8 bit decoder vhdl IEEE format

Abstract: ATL60 ATLS60 PO61 ttl buffer
Contextual Info: ATL60 Features x x x x x x x x 0.6Pm Drawn Gate Length 0.5Pm Leff Sea-of-Gates Architecture With Triple Level Metal 5.0 Volt, 3.3 Volt, and 2.0 Volt Operation Including Mixed Voltages On Chip Phase Locked Loop Available to Synthesize Frequencies up to 150 MHz and Manage Chip-to-Chip Clock Skew

Tri-State Buffer CMOS

Abstract: PTS41 books schmitt trigger cmos buffer 8x buffer cmos ATL60 ATLS60 mux8n AOI222
Contextual Info: ATL60 Features • • • • • • • • 0.6µm Drawn Gate Length 0.5µm Leff Sea-of-Gates Architecture With Triple Level Metal 5.0 Volt, 3.3 Volt, and 2.0 Volt Operation Including Mixed Voltages On Chip Phase Locked Loop Available to Synthesize Frequencies up to

TTL Schmitt-Trigger Inverters

Abstract: Structure of D flip-flop DFFSR Tri-State Buffer CMOS TTL 3 input or gate ttl buffer TTL nand 3 input or gate 3 input Decoders actel PLL schematic AOI222
Contextual Info: ATL60 Features • • • • • • • • 0.6µm Drawn Gate Length 0.5µm Leff Sea-of-Gates Architecture With Triple Level Metal 5.0 Volt, 3.3 Volt, and 2.0 Volt Operation Including Mixed Voltages On Chip Phase Locked Loop Available to Synthesize Frequencies up to

PTS41

Abstract: CMOS GATE ARRAY buf8
Contextual Info: ATL60 Features • O.tHim Drawn Gate Length O.Stim Left Sea-of-Gates Architecture With Triple Level Metal • 5.0 Volt, 3.3 Volt, and 2.0 Volt Operation Including Mixed Voltages • On Chip Phase Locked Loop Available to Synthesize Frequencies up to 150 MHz and Manage Chlp-to-Chip Clock Skew

PO61

Abstract: ATMEL 340 atmel 424 ATLS60 ATL60 ttl buffer 3.6v Tri-State Buffer bga ambit inverter circuit AOI222 ATMEL 218
Contextual Info: Features • • • • • • • • 0.6 µm Drawn Gate Length 0.5 µm Leff Sea-of-Gates Architecture with Triple Level Metal 5.0V, 3.3V and 2.0V Operation including Mixed Voltages On-chip Phase Locked Loop Available to Synthesize Frequencies up to 150 MHz and

Structure of D flip-flop DFFSR

Abstract: AOI222 INV4 OAI23 atmel 424 MUX CMOS 0753B 5-input NAND Gates pic single phase inverter OAI22
Contextual Info: ATL50 Features • • • • • • • • 0.5µm Drawn Gate Length 0.45µm Leff Sea-of-Gates Architecture With Triple Level Metal 3.3 Volt Operation 5.0 Volt compatible input buffers On-Chip Phase Locked Loop (PLL) Available to Synthesize Frequencies up to

HEF4093BP

Abstract: HEF4093BP datasheet free download HEF4093BT HEF4093B MO-001
Contextual Info: HEF4093B Quad 2-input NAND Schmitt trigger Rev. 05 — 28 July 2009 Product data sheet 1. General description The HEF4093B is a quad two-input NAND gate. Each input has a Schmitt trigger circuit. The gate switches at different points for positive-going and negative-going signals. The

HEF4093BP

Abstract: HEF4093BP datasheet free download 001aag104 HEF4093B HEF4093BT MO-001
Contextual Info: HEF4093B Quad 2-input NAND Schmitt trigger Rev. 06 — 2 December 2009 Product data sheet 1. General description The HEF4093B is a quad two-input NAND gate. Each input has a Schmitt trigger circuit. The gate switches at different points for positive-going and negative-going signals. The

atmel 952

Abstract: atmel h 952 ATL35 vhdl code for flip-flop jk flip flop to d flip flop conversion RTL 204 605 vhdl code for D Flipflop dssb oak dsp AOI222
Contextual Info: Features • High Speed - 150 ps Gate Delay - 2 input NAND, FO=2 nominal • Up to 3.7 Million Used Gates and 976 Pins • System Level Integration Technology ™ ARM7TDMI and AVR RISC Microcontrollers, OakDSP™ and Lode™DSP Cores, 10T/100 Ethernet MAC, USB and PCI Cores,

HEF4093BP

Abstract: HEF4093BP free HEF4093BT aSTABLE MULTIVIBRATORS WITH SCHMITT-TRIGGER IN HEF4093BP datasheet free download HEF4093B MO-001 HEF4093 HEF40 Multivibrators
Contextual Info: HEF4093B Quad 2-input NAND Schmitt trigger Rev. 7 — 1 September 2010 Product data sheet 1. General description The HEF4093B is a quad two-input NAND gate. Each input has a Schmitt trigger circuit. The gate switches at different points for positive-going and negative-going signals. The

Contextual Info: INTEGRATED CIRCUITS DATA SHEET 74AHC132; 74AHCT132 Quad 2-input NAND Schmitt trigger Product specification File under Integrated Circuits, IC06 1999 May 31 Philips Semiconductors Product specification Quad 2-input NAND Schmitt trigger FEATURES • ESD protection:

Contextual Info: HEF4093B-Q100 Quad 2-input NAND Schmitt trigger Rev. 1 — 12 July 2012 Product data sheet 1. General description The HEF4093B-Q100 is a quad two-input NAND gate. Each input has a Schmitt trigger circuit. The gate switches at different points for positive-going and negative-going signals.

Contextual Info: ATL60 Features • • • • • • • • 0.6|.im D raw n G ate Length 0.5|im Left S e a -o f-G a te s A rch ite c tu re W ith T rip le Level M etal 5.0 V o lt, 3.3 V o lt, and 2.0 V o lt O p e ra tio n In c lu d in g M ixed V o lta g e s On C h ip P h ase Locked Loop A v a ila b le to S y n th e s ize F req u en cies up to

Contextual Info: HEF4093B-Q100 Quad 2-input NAND Schmitt trigger Rev. 1 — 12 July 2012 Product data sheet 1. General description The HEF4093B-Q100 is a quad two-input NAND gate. Each input has a Schmitt trigger circuit. The gate switches at different points for positive-going and negative-going signals.

Contextual Info: HEF4093B Quad 2-input NAND Schmitt trigger Rev. 8 — 21 November 2011 Product data sheet 1. General description The HEF4093B is a quad two-input NAND gate. Each input has a Schmitt trigger circuit. The gate switches at different points for positive-going and negative-going signals. The

hef4093b

Abstract: schmitt trigger application sheet HEF4093BC HEF4093BP
Contextual Info: HEF4093B Quad 2-input NAND Schmitt trigger Rev. 8 — 21 November 2011 Product data sheet 1. General description The HEF4093B is a quad two-input NAND gate. Each input has a Schmitt trigger circuit. The gate switches at different points for positive-going and negative-going signals. The

atmel 424

Abstract: AMBIT inverter atmel 545 ATMEL 340 crystal oscillator buffer Structure of D flip-flop DFFSR s051 crystal OAI222 CMOS Transmission gate Specifications Tri-State Buffer CMOS
Contextual Info: Features • 0.5 µm Drawn Gate Length 0.45µm Leff Sea-of-Gates Architecture With Triple Level Metal • 3.3V Operation • 5.0V Compatible Input Buffers • On-chip Phase Locked Loop (PLL) Available to Synthesize Frequencies up to 150 MHz • • • •

BLD Schmitt-trigger

Abstract: 74AHC132 74AHC132D 74AHC132PW 74AHCT132 74AHCT132D 74AHCT132PW
Contextual Info: INTEGRATED CIRCUITS DATA SHEET 74AHC132; 74AHCT132 Quad 2-input NAND Schmitt trigger Product specification Supersedes data of 1999 May 31 File under Integrated Circuits, IC06 1999 Sep 24 Philips Semiconductors Product specification Quad 2-input NAND Schmitt trigger