PQ144 Search Results

I-CUBE

Abstract: P005 p055 TRANSISTOR IDS200 p055 power transistor IQ32B IQ48 IQ64B IQ96 84l transistor
Contextual Info: I-Cube IQ Family Data Sheet m F eatures D e s c r ip t io n • SRAM-based, in-system programmable The IQ family of SRAM-based bit-oriented switching devices is • Switch Matrix manufactured using 0.6|jm CMOS processes. These devices — Non-Blocking offer clock speeds of up to 150 MHz and pin-to-pin delay as low

Actel A1225

Abstract: PL84 A1240XL actel a1240 A32140 PQ100C Cadence TQ176 PG176
Contextual Info: ^ c te l - w Integrator Series FPGAs: 1200XL and 3200DX Famüies Features a 4 L. ¡§ Cadence, Escalade, Exemplar, 1ST, Mentor Graphics, Synopsvs, and Viewlogic. High C a p a c ity • IEEE Standard 1149.1 JTAG Boundary Scan Testing.

49C466

Contextual Info: 64-BIT FLOW-THRU ERROR DETECTION AND CORRECTION UNIT IDT49C466 IDT49C466A FEATURES: DESCRIPTION: • 64-bit wide Flow-thruEDC • Separate System and Memory Data Input/Output Buses • — Error Detect Time: 10ns — Error Correct Time: 15ns • Corrects all single bit errors; Detects all double bit errors

Contextual Info: Integrator Series FPGAs - 1200XL and 3200DX Famüies Features Cadence, Escalade, Exemplar, 1ST, M entor Graphics, Synopsys and Viewlogic High C a p a c ity • JTAG1149.1 Boundary Scan Testing • 2,500 to 40,000 logic gates • Up to 4 Kbits configurable dual-port SRAM

Contextual Info: R4761 ORION FAMILY SYSTEM CONTROLLER FEATURES • • • • • • • Direct interface to IDT o r io n R4640/R4650/R4700/R5000 RISC microprocessors - 64-bit interface support for R4650/R4700/R5000 - 32-bit interface support for R4640/4650 Available at 5V and 3.3V

I-CUBE

Abstract: P103t zener diode phc 16 ZENER diode p317 AB P89 zener PLK3210 hk30 transistor 4287 AB zener phc 12 kck 223
Contextual Info: SH5 I-Cube* IQX Family Data Sheet Description Features The IQX family of SRAM-based bit-oriented switching devices is manufactured using a 0.6vim CMOS process. These devices offer clock speed of up to 150 MHz and fastest pin-to-pin delay of 6 ns. • SRAM-based, in-system programmable

S4 59A

Contextual Info: 3.3V 64-BIT FLOW-THRU ERROR DETECTION AND CORRECTION UNIT IDT49C3466 Integrated Device Technology, Inc. FEATURES: DESCRIPTION: • 64-bit wide Flow-thruEDC • Separate System and Memory Data Input/Output Buses • — Error Detect Time: 20ns — Error Correct Time: 22ns

132-PIN CERAMIC PIN GRID ARRAY CPGA

Abstract: A3265DX Actel A1240 WD109 A1225XL A1240XL A1280XL A32100DX A32140DX A32200DX
Contextual Info: Integrator Series FPGAs – 1200XL and 3200DX Familes Features Cadence, Escalade, Exemplar, IST, Mentor Graphics, Synopsys and Viewlogic • JTAG 1149.1 Boundary Scan Testing High Capacity • • • • 2,500 to 40,000 logic gates Up to 4 Kbits configurable dual-port SRAM

Contextual Info: 8 3 TH E DRAW INGS AND INFORMATION CONTAINED H E R E IN A R E TH E E X C L U SIV E P R O P E R T Y O F A CTEL. TH E INFORM ATION, DRAW INGS AND D E SIG N C O N C E P T S CONTAINED H E R E IN A R E C O N F ID E N T IA L /P R O P R IE T A R Y , SH A LL B E MAINTAINED IN ST R IC T C O N FID EN C E, AND SH A LL NOT B E R E L E A S E D TO ANY THIRD P A R TY WITHOUT TH E E X P R E S S

GHL 8

Abstract: FPGA 144 CPGA 172 PLCC ASIC actel a1240 a1280xlf
Contextual Info: Integrator SeriesFPGAs: 1200XL and 3200DX Families Features Cadence, Escalade, E xem plar, 1ST, M e n to r G raphics, Synopsys, and V iew logic. High C a p a c i t y • • 2,500 to 40,000 Logic Gates • Up to 4 K b its C o n fig u ra b le D ual-Port SRAM

Contextual Info: Revision 8 ACT 2 Family FPGAs Features • Up to 8,000 Gate Array Gates 20,000 PLD equivalent gates • Replaces up to 200 TTL Packages • Replaces up to eighty 20-Pin PAL Packages • Design Library with over 500 Macro Functions • Single-Module Sequence Functions

SY-PQ208-2

Abstract: ACTEL qfp 352 CQ256 CQ208 SI-SX72-ACQ256SFG484 pq208 package SI-SX72ACQ256SFG484
Contextual Info: EIA Standard Board Layout of Soldered Pad for QFP Devices Md e e e Ze Positioning pin holes Z Me e b2 I2 Zd Table 1 contains the board layout soldered pad dimensions for Actel Quad Flat Packs only. If you are using surface mount sockets for prototyping, see table 2 for layout dimensions.

PQ144

Abstract: PQ100 ACTEL qfp 352 SY-PQ208-2 TQ144
Contextual Info: EIA Standard Board Layout of Soldered Pad for QFP Devices Md e e e Ze Me b2 e I2 Zd Table 1 contains the board layout soldered pad dimensions for Actel Quad Flat Packs only. If you are using surface mount sockets for prototyping, see table 2 for layout dimensions.

A42MX24

Abstract: AC297 ACTEL PQ160 CQFP 256 PIN actel A1280XL 42MX ACTEL A1240xl A32140DX PQ208 adb 230 CQ256
Contextual Info: Application Note AC297 Migrating from 1200XL and 3200DX to 42MX FPGAs Overview This application note provides the information needed for seamless migration of a design from the 1200XL and 3200DX families to the 42MX family. The Actel 42MX device architecture is based on the Actel 1200XL and 3200DX families; thus, it shares the

20MHZ

Abstract: 49C465 IDT49C465 IDT49C465A error correction code mlc L9908
Contextual Info: Integrated Device Technology, Inc. 2975 Stender Way, Santa Clara, CA - 95054 PRODUCT/PROCESS CHANGE NOTICE PCN PCN #: L9908-04 Product Affected: 49C465/A DATE: August 15, 1999 MEANS OF DISTINGUISHING CHANGED DEVICES: Product Mark Back Mark Manufacturing Location Affected:

Contextual Info: IDT49C465 IDT49C465A 32-BIT FLOW-THRU ERROR DETECTION AND CORRECTION UNIT Integrated Device Technology, Inc. DESCRIPTION FEATURES 32-bit wide Flow-thruEDC unit, cascadable to 64 bits Single-chip 64-bit Generate Mode Separate system and memory buses On-chip pipeline latch with external control

PQ144

Abstract: A3060 2061 D PQG144 yama 2G07 ACTEL DIMENSIONS ACTEL
Contextual Info: E C N NO. THE DRAWINGS AND INFORMATION CONTAINED HEREIN ARE THE EXCLUSIVE PROPERTY OF ACTEL. THE INFORMATION, DRAWINGS AND DESIGN CONCEPTS CONTAINED HEREIN ARE CONFIDENTIAL/PROPRIETARY, SHALL BE MAINTAINED IN STRICT CONFIDENCE, AND SHALL NOT BE RELEASED TO ANY THIRD PARTY WITHOUT THE EXPRESS

Actel a1280

Abstract: VKS FPGA CQFP 106 wd5080 74 series family A1280 A32200DX-RQ208 Actel A1225 A1225XL A1240XL A1280XL
Contextual Info: v3.0 Integrator Series FPGAs: 1200XL and 3200DX Families Fe a t ur es G en er al D e sc r i p t i on High C apaci t y Actel’s Integrator Series FPGAs are the first programmable logic devices optimized for high-speed system logic integration. Based on Actel’s proprietary antifuse

PID code for avr

Abstract: scr28 ttl TEMPERATURE CONTROLLER with pid AVR SCR26 1138H fcx0 4201J AT40K atmel jtag ice studio 5 AT94K05AL
Contextual Info: Features • Monolithic Field Programmable System Level Integrated Circuit FPSLIC • • • • • • • • • • • • • • • – AT40K SRAM-based FPGA with Embedded High-performance RISC AVR® Core, Extensive Data and Instruction SRAM and JTAG ICE

Data Vision P135

Abstract: P104t ZP033 stk 014 transistor 4287 AB p083r DATA VISION P123 I-CUBE P2-16C P000-P007
Contextual Info: * » S B I-Cube IQX Family Data Sheet Features Description • SR A M -b a sed , in-system pro gram m ab le • S w itc h M atrix - • The IQ X fa m ily of SR A M - b a sed bit-oriented sw itch in g devices is m an u factu red u sing a 0.6ym C M O S process. These d evices offer clock speed of

077-148

Abstract: fmac16x16
Contextual Info: Features • Monolithic Field Programmable System Level Integrated Circuit FPSLIC • • • • • • • • • • • • • • – AT40K SRAM-based FPGA with Embedded High-performance RISC AVR Core, Extensive Data and Instruction SRAM and JTAG ICE

P2101

Contextual Info: LS101 1-Cube 25 Port LAN Switching Element Description Features • Single chip, Fast Ethernet switching fabric • Up to 100 Mbit per-port switching capacity • Supports 25 full duplex ports • Dedicated Multicast output port • Port mirroring logic • Simple in-band signaling protocol

Actel a1280

Abstract: 240 pin rqfp drawing A1280 VKS FPGA CQFP 106 Actel A1225 172 pin leaded A1225XL CQ84 A1240XL A1280XL
Contextual Info: Discontinued – v3.0 v3.0 Integrator Series FPGAs: 1200XL and 3200DX Families F ea t u re s G e n e ra l D es c ri p t i o n H ig h C a p ac it y Actel’s Integrator Series FPGAs are the first programmable logic devices optimized for high-speed system logic

R22-BH

Abstract: PID code for avr scr28 ttl SCR38 1138F AT94K preliminary fcx0 SCR51 TEMPERATURE CONTROLLER with pid AVR 4201J
Contextual Info: Features • Monolithic Field Programmable System Level Integrated Circuit FPSLIC • • • • • • • • • • • • • • • – AT40K SRAM-based FPGA with Embedded High-performance RISC AVR Core, Extensive Data and Instruction SRAM and JTAG ICE