MT48LC4M Search Results

MT48LC4M32B2P

Abstract: MT48LC4M32B2TG-7 MT48LC4M32B2 128MbSDRAMx32
Contextual Info: 128Mb: x32 SDRAM Features Synchronous DRAM MT48LC4M32B2 – 1 Meg x 32 x 4 banks For the latest data sheet, please refer to the Micron Web site: www.micron.com/sdram Features Figure 1: • PC100 functionality • Fully synchronous; all signals registered on positive

Contextual Info: 64Mb: x4, x8, x16 SDRAM Features SDR SDRAM MT48LC16M4A2 – 4 Meg x 4 x 4 Banks MT48LC8M8A2 – 2 Meg x 8 x 4 Banks MT48LC4M16A2 – 1 Meg x 16 x 4 Banks Features Options • PC100- and PC133-compliant • Fully synchronous; all signals registered on positive

MT48V

Contextual Info: ADVANCE‡ 128Mb: x16, x32 MOBILE SDRAM SYNCHRONOUS DRAM MT48LC8M16LFFF, MT48V8M16LFFF – 2 Meg x 16 x 4 banks MT48LC4M32LFFC , MT48V4M32LFFC – 1 Meg x 32 x 4 banks For the latest data sheet revisions, please refer to the Micron Web site: www.micron.com/dramds

Contextual Info: 64Mb: x4, x8, x16 SDRAM Features Synchronous DRAM MT48LC16M4A2 – 4 Meg x 4 x 4 banks MT48LC8M8A2 – 2 Meg x 8 x 4 banks MT48LC4M16A2 – 1 Meg x 16 x 4 banks For the latest data sheet, refer to Micron’s Web site: www.micron.com/sdram Features Options

PC133 registered reference design

Contextual Info: 64Mb: x4, x8, x16 SDRAM MT48LC16M4A2 -4 Meg x 4 x 4 banks MT48LC8M8A2 - 2 Meg x 8 x 4 banks MT48LC4M16A2 -1 Meg x 16 x 4 banks SYNCHRONOUS DRAM For the latest data sheet, please refer to the Micron Web site: www.micron.com/mti/msp/html/datasheet.html FEATURES

MT48LC16M4A2

Abstract: MT48LC4M16A2 MT48LC8M8A2
Contextual Info: 64Mb: x4, x8, x16 SDRAM SYNCHRONOUS DRAM MT48LC16M4A2 – 4 Meg x 4 x 4 banks MT48LC8M8A2 – 2 Meg x 8 x 4 banks MT48LC4M16A2 – 1 Meg x 16 x 4 banks For the latest data sheet, please refer to the Micron Web site: www.micron.com/dramds FEATURES PIN ASSIGNMENT Top View

Contextual Info: ADVANCE‡ 128Mb: x16, x32 BAT-RAM LOW POWER SDRAM SYNCHRONOUS DRAM MT48LC8M16LFFC, MT48V8M16LFFC – 2 Meg x 16 x 4 banks MT48LC8M16LFFF, MT48V8M16LFFF, MT48LC4M32LFFC , MT48V4M32LFFC – 1 Meg x 32 x 4 banks For the latest data sheet revisions, please refer to the Micron Web

Contextual Info: PRELIMINARY‡ 128Mb: x32 SDRAM SYNCHRONOUS DRAM MT48LC4M32B2 - 1 Meg x 32 x 4 banks For the latest data sheet, please refer to the Micron Web site: www.micron.com/dramds FEATURES • PC100 functionality • Fully synchronous; all signals registered on positive

MT48LC4M32B2 FBGA

Abstract: 90-Ball sdram 4 bank 4096 16 MT48LC4M32B2 128MbSDRAMx32
Contextual Info: 128Mb: x32 SDRAM SYNCHRONOUS DRAM MT48LC4M32B2 - 1 Meg x 32 x 4 banks For the latest data sheet, please refer to the Micron Web site: www.micron.com/sdramds FEATURES • PC100 functionality • Fully synchronous; all signals registered on positive edge of system clock

obsolete micron SDRAM

Abstract: 44-PIN MT48LC2M8A1 16MSDR MT48LC2M8A1TG-10S
Contextual Info: OBSOLETE 16 MEG: x4, x8 SDRAM MT48LC4M4A1/A2 S - 2 Meg x 4 x 2 banks MT48LC2M8A1/A2 S - 1 Meg x 8 x 2 banks SYNCHRONOUS DRAM For the latest data sheet revisions, please refer to the Micron Web site: www.micron.com/mti/msp/html/datasheet.html FEATURES PIN ASSIGNMENT Top View

MT48LC16M4A2

Abstract: MT48LC16M4A2TG MT48LC4M16A2 MT48LC8M8A2 MT48LC8M8A2TG-75 TN-48-05 MT48LC4M16A2B41
Contextual Info: 64Mb: x4, x8, x16 SDRAM Features Synchronous DRAM MT48LC16M4A2 – 4 Meg x 4 x 4 banks MT48LC8M8A2 – 2 Meg x 8 x 4 banks MT48LC4M16A2 – 1 Meg x 16 x 4 banks For the latest data sheet, refer to Micron’s Web site: www.micron.com/sdram Features Options

6 pin mini din

Abstract: MT48LC4M32B2P 3 pin mini mold transistor TSOP 86 Package MT48LC4M32B2F5 transistor marking CS COMMAND diode a7 m 208 b1 rele driver
Contextual Info: 128Mb: x32 SDRAM SYNCHRONOUS DRAM MT48LC4M32B2 - 1 MEG x 32 x 4 BANKS For the latest data sheet, please refer to the Micron Web site: www.micron.com/sdram Features Figure 1: Pin Assignment Top View 86-Pin TSOP • PC100 functionality • Fully synchronous; all signals registered on positive

PPAP submission requirement table

Contextual Info: Preliminary‡ 64Mb: x8, x16 SDRAM Features SDR SDRAM MT48LC8M8A2 – 2 Meg x 8 x 4 Banks MT48LC4M16A2 – 1 Meg x 16 x 4 Banks Features Options Marking • Configuration – 8 Meg x 8 2 Meg x 8 x 4 banks – 4 Meg x 16 (1 Meg x 16 x 4 banks) • Write recovery (tWR)

MT48LC4M32B2F5

Abstract: MT48LC4M32B2B5 MT48LC4M32B2P
Contextual Info: 128Mb: x32 SDRAM SYNCHRONOUS DRAM MT48LC4M32B2 - 1 MEG x 32 x 4 BANKS For the latest data sheet, please refer to the Micron Web site: www.micron.com/sdram Features Figure 1: Pin Assignment Top View 86-Pin TSOP • PC100 functionality • Fully synchronous; all signals registered on positive

Contextual Info: ADVANCE‡ 128Mb: x16, x32 BAT-RAM SDRAM SYNCHRONOUS DRAM MT48LC8M16LFFC, MT48V8M16LFFC – 2 Meg x 16 x 4 banks MT48LC8M16LFFF, MT48V8M16LFFF, MT48LC4M32LFFC , MT48V4M32LFFC –1 Meg x 32 x 4 banks For the latest data sheet revisions, please refer to the Micron Web

Contextual Info: 64Mb: x4, x8, x16 SDRAM SYNCHRONOUS DRAM MT48LC16M4A2 – 4 Meg x 4 x 4 banks MT48LC8M8A2 – 2 Meg x 8 x 4 banks MT48LC4M16A2 – 1 Meg x 16 x 4 banks For the latest data sheet, please refer to the Micron Web site: www.micron.com/dramds FEATURES PIN ASSIGNMENT Top View

MT48LC4M4R1

Contextual Info: ADVANCE MT48LC4M4R1 4 MEG X 4 SDRAM M IC R O N 4 MEG x 4 SDRAM 3.3 VOLT, PULSED RAS, DUAL BANK, SELF REFRESH FEATURES PIN ASSIGNMENT Top View • Fully synchronous; all signals (excluding clock enable) registered to positive edge of system clock • Dual 2 Meg x 4s, separate, internal banks controlled by

Contextual Info: M il“ C a a iS J I L IL z 64Mb: x4, x8, x16 SDRAM MT48LC16M4A2 -4 Meg x 4 x 4 banks MT48LC8M8A2- 2 Meg x 8 x 4 banks MT48LC4M16A2 -1 Meg x 16 x 4 banks SYNCHRONOUS DRAM For the latest full-length data sheet, please refer to the Micron Web site: www.micron.com/mti/msD/htmi/datasheet.htmi

MT48LC16M4A2

Abstract: MT48LC4M16A2 MT48LC8M8A2
Contextual Info: 64Mb: x4, x8, x16 SDRAM SYNCHRONOUS DRAM MT48LC16M4A2 – 4 Meg x 4 x 4 banks MT48LC8M8A2 – 2 Meg x 8 x 4 banks MT48LC4M16A2 – 1 Meg x 16 x 4 banks For the latest data sheet, please refer to the Micron Web site: www.micron.com/dramds FEATURES PIN ASSIGNMENT Top View

MT48LC4M32B2P

Abstract: marking 6a2 smd 6A 1176
Contextual Info: 128Mb: x32 SDRAM Features SDR SDRAM MT48LC4M32B2 – 1 Meg x 32 x 4 Banks Features Options Marking • Configuration – 4 Meg x 32 1 Meg x 32 x 4 banks • Package – OCPL1 – 86-pin TSOP II (400 mil) – 86-pin TSOP II (400 mil) Pb-free – 90-ball VFBGA (8mm x 13mm)

Contextual Info: 128Mb: x16, x32 MOBILE SDRAM SYNCHRONOUS DRAM MT48LC8M16LFF4, MT48V8M16LFF4, MT48LC8M16TG, MT48V8M16TG, MT48V8M16P, MT48LC4M32LFF5, MT48V4M32LFF5 Features Table 1: • Temperature Compensated Self Refresh TCSR • Fully synchronous; all signals registered on positive

48LC8M8

Contextual Info: MICRON* I 64M b: xV n V,1,5 TCCHWLOOY.INC. S D R A M MT48LC16M4A2 - 4 Meg x 4 x 4 banks MT48LC8M8A2 - 2 Meg x 8 x 4 banks MT48LC4M16A2 - 1 Meg x 16 x 4 banks SYNCHRONOUS DRAM F o r the late st data sheet revisions, plea se re fe r to the Micron Web site: w w w .m icron.com /m ti/m sp/htm l/datasheet.htm l

MT48LC16M4A2

Abstract: MT48LC16M4A2TG MT48LC4M16A2 MT48LC8M8A2 MT48LC8M8A2TG-75 TN-48-05 mt48lc8m8
Contextual Info: 64Mb: x4, x8, x16 SDRAM Features Synchronous DRAM MT48LC16M4A2 – 4 Meg x 4 x 4 banks MT48LC8M8A2 – 2 Meg x 8 x 4 banks MT48LC4M16A2 – 1 Meg x 16 x 4 banks For the latest data sheet, refer to Micron’s Web site: www.micron.com/sdram Features Options

MT48LC4M32B2P

Abstract: 128Mb MT48LC4M32B2TG MT48LC4M32B2 128MbSDRAMx32
Contextual Info: 128Mb: x32 SDRAM Features Synchronous DRAM MT48LC4M32B2 – 1 Meg x 32 x 4 banks For the latest data sheet, please refer to the Micron Web site: www.micron.com/sdram Features Table 1: • PC100 functionality • Fully synchronous; all signals registered on positive