TCA 210
Abstract: advanced tca LMU12GC20 LMU12GC35 MPY012H
Text: LMU12 LMU12 DEVICES INCORPORATED 12 x 12-bit Parallel Multiplier 12 x 12-bit Parallel Multiplier DEVICES INCORPORATED FEATURES ❑ ❑ ❑ ❑ DESCRIPTION 20 ns Worst-Case Multiply Time Low Power CMOS Technology Replaces Fairchild MPY012H Two’s Complement, Unsigned, or
|
Original
|
PDF
|
LMU12
12-bit
MPY012H
68-pin
LMU12
MPY012H
TCA 210
advanced tca
LMU12GC20
LMU12GC35
|
TCA 210
Abstract: LMU12GC45 LMU12DC65 LMU12GC20 LMU12GC35 LMU12GC65 MPY012H
Text: LMU12 LMU12 DEVICES INCORPORATED 12 x 12-bit Parallel Multiplier 12 x 12-bit Parallel Multiplier DEVICES INCORPORATED FEATURES ❑ ❑ ❑ ❑ ❑ ❑ ❑ DESCRIPTION 20 ns Worst-Case Multiply Time Low Power CMOS Technology Replaces TRW MPY012H Two’s Complement, Unsigned, or
|
Original
|
PDF
|
LMU12
12-bit
MPY012H
MIL-STD-883,
64-pin
68-pin
LMU12
TCA 210
LMU12GC45
LMU12DC65
LMU12GC20
LMU12GC35
LMU12GC65
MPY012H
|
Untitled
Abstract: No abstract text available
Text: LMLL12 •Vi» /lif iu LMU12 mm 12 x 12-bit Parallel Multiplier DEVICES INCORPORATED FEATURES_ □ □ □ □ 20 ns Worst-Case Multiply Time Low Power CMOS Technology Replaces TRW MPY012H Two's Complement, Unsigned, or Mixed Operands □ Three-State Outputs
|
OCR Scan
|
PDF
|
LMLL12
LMU12
12-bit
MPY012H
MIL-STD-883,
64-pin
68-pin
LMU12
|
Untitled
Abstract: No abstract text available
Text: LMU12 12 x 12-bit Parallel Multiplier D E V IC E S IN C O R P O R A T E D DESCRIPTION FEATURES □ □ □ □ 20 ns Worst-Case Multiply Time Low Power CMOS Technology Replaces Fairchild MPY012H Two's Complement, Unsigned, or Mixed Operands □ Three-State Outputs
|
OCR Scan
|
PDF
|
LMU12
12-bit
MPY012H
68-pin
LMU12
MPY012H
24-bit
|
Untitled
Abstract: No abstract text available
Text: LMU12 12 x 12-bit P a ra ll el M u l t ip l ie r DFVICES IN C O R P O H ArFTj FEATURES DESCRIPTION □ 35 n s W orst-C ase M ultiply Tim e □ L ow P ow er CM O S T echnology □ R eplaces TRW MPY012H □ T w o 's C om plem ent, U nsigned, or M ixed O p e ran d s
|
OCR Scan
|
PDF
|
LMU12
12-bit
MPY012H
LMU12
24-bit
|
Untitled
Abstract: No abstract text available
Text: LMU12 12 x 12-bit Parallel Multiplier DEVICES INCORPORATED FEATURES DESCRIPTION □ 20 ns Worst-Case Multiply Time □ Low Power CMOS Technology □ Replaces TRW MPY012H □ Two's Complement, Unsigned, or Mixed Operands □ Three-State Outputs □ Available 100% Screened to
|
OCR Scan
|
PDF
|
LMU12
12-bit
MPY012H
MIL-STD-883,
64-pin
68-pin
LMU12
MPY012H
|
Untitled
Abstract: No abstract text available
Text: . i\\\ Ci >•111 LMU12 12 x 12-bit Parallel Multiplier □ FV IC E S IN C O R P Q R A T F D DESCRIPTION FEATURES □ 20 ns W orst-Case M ultiply Time □ Low Power CMOS Technology □ Replaces Fairchild MPY012H □ Tw o's Complement, Unsigned, or Mixed Operands
|
OCR Scan
|
PDF
|
MPY012H
68-pin
LMU12
A11-0
B11-0
R23-12
R11-0
LMU12
12-bit
|
2A1121
Abstract: No abstract text available
Text: LMU12 12 x 12-bit Parallel Multiplier FEATURES DESCRIPTION □ □ □ □ 20 ns Worst-Case Multiply Time Low Power CMOS Technology Replaces TRW MPY012H Two’s Complement, Unsigned, or Mixed Operands □ Three-State Outputs □ Available 100% Screened to
|
OCR Scan
|
PDF
|
LMU12
12-bit
MPY012H
L-STD-883,
64-pin
68-pin
LMU12
MPY012H
2A1121
|
TDC1009
Abstract: SN74558 TDC1023J MPY08U IDT7209 TMC2010 MPY008 tdc1010 CY7C9101 WTL1010
Text: Product Cross Reference Guide LOGIC DEVICES TRW Analog D«v IDT Cypraaa AMD LMU08 8 X 8 MULT MPY008 ADSP1O0O LMU8U 8 X 8 MULT MPY08U ADSP1081 LMU557 8 X 8 MULT AM25S557 SN54557 SN74557 LMU558 8 X 8 MULT AM25S558 SN54558 SN74558 LMU12 1 2 X 1 2 MULT MPY012
|
OCR Scan
|
PDF
|
LMU08
LMU557
MPY008
MPY08U
ADSP1081
AM25S557
SN54557
SN74557
AM25S558
SN54558
TDC1009
SN74558
TDC1023J
IDT7209
TMC2010
tdc1010
CY7C9101
WTL1010
|
Untitled
Abstract: No abstract text available
Text: Lg G lc LMU12 12 x 12-bit Parallel Multiplier DEVICES INCORPORATED FEATURES D E S C R IP T IO N □ 35 ns Worst-Case Multiply Time □ Low Power CMOS Technology □ Replaces TRW MPY012H □ Two's Complement, Unsigned, or Mixed Operands □ Three-State Outputs
|
OCR Scan
|
PDF
|
LMU12
12-bit
MPY012H
MIL-STD-883,
64-pin
68-pin
MPY012H
LMU12
|
PL7223
Abstract: CIRCUIT DIGRAM 012HJ1C TRW 012HJ1C MPY012H 23/25C640-I/P
Text: MPY012H T R V t Multiplier 12x12 Bit, 115ns The M P Y 0 12 H is a h i g h -s p e e d 1 2 x 1 2 b it p a ra lle l m u ltip lie r w h i c h o p e r a t e s a t a 1 1 5 n s c y c le t im e 8 .7 M H z m u ltip lic a tio n ra te . T h e m u ltip lic a n d a n d t h e m u ltip lie r
|
OCR Scan
|
PDF
|
MPY012H
12x12
115ns
PL7223
CIRCUIT DIGRAM
012HJ1C
TRW 012HJ1C
MPY012H
23/25C640-I/P
|
lmu12gc45
Abstract: No abstract text available
Text: I M II1 ? L3VIU12 12 x 12-bit Parallel M u ltip lie r □ 20 ns Worst-Case Multiply Time □ Low Power CMOS Technology □ Replaces TRW MPY012H □ Tw o’s Complement, Unsigned, or Mixed Operands □ Three-State Outputs □ Available 100% Screened to MIL-STD-883, Class B
|
OCR Scan
|
PDF
|
L3VIU12
12-bit
MPY012H
MIL-STD-883,
64-pin
68-pin
LMU12
MPY012H
lmu12gc45
|
Untitled
Abstract: No abstract text available
Text: LMU12 12 x 12-bit Parallel Multiplier DEVICES INCORPORATED FEATURES □ □ □ □ DESCRIPTION 35 ns Worst-Case M ultiply Time Low Pow er CMOS Technology Replaces TRW MFY012H T w o's C om plem ent Unsigned, or Mixed O perands □ Three-State O utputs □ Available 100% Screened to
|
OCR Scan
|
PDF
|
LMU12
12-bit
MFY012H
MIL-STD-883,
64-pin
68-pin
LMU12
MPY012H
|
2388 84 JRC
Abstract: jrc 2388 yx 8018 tdc1008 ADSP-1080 0620 jrc gsp3f Analog Devices Data-Acquisition Databook 1984 ADSP1080 JRC 2388 84
Text: DSP PRODUCTS DATABOOK DSP MICROPROCESSORS MICROCODED SUPPORT COMPONENTS FLOATING POINT COMPONENTS FIXED POINT COMPONENTS How to Find Product Data in This Databook T H IS V O LU M E Contains Data Sheets, Selection Guides, Application N otes, and a wealth of background inform ation on com ponents for num ber
|
OCR Scan
|
PDF
|
000-page
2388 84 JRC
jrc 2388
yx 8018
tdc1008
ADSP-1080
0620 jrc
gsp3f
Analog Devices Data-Acquisition Databook 1984
ADSP1080
JRC 2388 84
|
|
60PEN
Abstract: IDT7212 IDT7212l modified booths algorithm MPY012 C2837 P2262 Idt7212l55 IDT7213L
Text: IDT7212L IDT7213L 12 X 12-BIT PARALLEL C M O S MULTIPLIER DESCRIPTION: FEATURES: • 12 x 1 2 -b it p a r a lle l m u ltip lie r w ith d o u b le p r e c is io n p r o d u c t • H ig h - s p e e d : 3 5 n s m a x im u m c lo c k t o m u ltip ly tim e •
|
OCR Scan
|
PDF
|
12-BIT
IDT7212L
IDT7213L
150mW
MPY012H
1DT7212L/IDT7213L
60PEN
IDT7212
modified booths algorithm
MPY012
C2837
P2262
Idt7212l55
|
TE 555-1
Abstract: mini project using ic 555 MPY008H marking b9d marking a007 mt4m OA95 p6-33 IC LM 555 pin detail TSX 27
Text: MIL-M-38510/500B 4 AUGUST 1986 SUPERSEDING- MIL-M-38510/500A 12 D e c e m b e r 1 9 8 4 [QUALIFICATION I ¡REQUIREMENTS I IREMOVED I MILITARY MICROCIRCUITS, DIGITAL, SPECIFICATION T T L , M U L T I PL I E R - A C C U M U L A T O R S / M U L T I PL I E R S
|
OCR Scan
|
PDF
|
MIL-M-38510/500B
MIL-M-38510/500A
MIL-M-38510.
MIL-M-38510
TDC1008C1V
TDC1009C1V
TDC1010C1V
MPY008HC2V
MPY012HC1V
TE 555-1
mini project using ic 555
MPY008H
marking b9d
marking a007
mt4m
OA95
p6-33
IC LM 555 pin detail
TSX 27
|
ADSP-1012A
Abstract: 1012a ADSP-1012 SP1012 ADSP1012ASG
Text: ANALOG DEVICES □ FEATURES 12 x 12-Bit Parallel Multiplication 20MHz Multiplication Rate Worst Case 300mW Power Dissipation with TTL-Compatible CMOS Technology Twos-Complement, Unsigned-Magnitude, and Mixed-Mode Data Formats Available in Hermetically-Sealed 64-Pin DIP,
|
OCR Scan
|
PDF
|
12-Bit
ADSP-1012A
20MHz
300mW
64-Pin
68-Pin
68-Contact
MIL-STD-883,
ADSP-1012A
1012a
ADSP-1012
SP1012
ADSP1012ASG
|
Idt7212l
Abstract: No abstract text available
Text: m m 1 1 ^ 12 x 12-BIT PARALLEL CM O S MULTIPLIER IDT7212L IDT7213L Integrated D eviceTechno!o 3 y. Inc FEATURES: DESCRIPTION: • 12 x 12-bit para lle l m u ltip lie r w ith d o u b le p re cisio n p ro d u ct • H ig h -spe e d : 35ns m a xim u m c lo c k to m u ltip ly tim e
|
OCR Scan
|
PDF
|
12-BIT
IDT7212L
IDT7213L
T7212L
MPY012H
T7213L
IDT7212L/IDT7213L
MIL-STD-883,
Idt7212l
|
112KJ4C
Abstract: MPY112K 112kj4 trw mpy 16 MPY112 MPY012H MPY112KJ4A MPY112KJ4C TRW LSI Products 112kj
Text: MPY112K r n Multiplier Features 12x12 Bit, 50ns • 50ns Multiply Time Worst Case The MPY112K is a video-speed 12x12 bit parallel multiplier which operates at a 50ns cycle time (20MHz multiplication rate). The multiplicand and the multiplier may be specified together as two's complement or
|
OCR Scan
|
PDF
|
MPY112K
12x12
MPY112K
20MHz
16-bit
112KJ4A
112KJ4C
112kj4
trw mpy 16
MPY112
MPY012H
MPY112KJ4A
MPY112KJ4C
TRW LSI Products
112kj
|
C3211
Abstract: TMC216
Text: Fixed-Point Arithmetic 7,TwV Since the first m onolithic m ultiplier was introduced by TRW in 1976, and m ultiplication was changed from something difficult to something easy, this building block has becom e ubiquitous in the w orld o f signal processing. TRW continues to provide the broadest line o f fixed-point m ultipliers, with w ord
|
OCR Scan
|
PDF
|
C3211
32-bit
12x12
TMC2210-1
16x16
TMC3211
TMC216
|
d64a
Abstract: ADSP1012AJN ADSP-1012A adsp1012
Text: A N A LO G D E V IC E S □ 12 x 12-Bit CMOS Multiplier ADSP-1012A FEA TU RES 12 x 12-Bit Parallel M ultiplication 20MHz M ultiplication Rate W orst Case 300mW Power Dissipation w ith TTL-Com patible CM OS Technology Tw os-Com plem ent, Unsigned-M agnitude, and
|
OCR Scan
|
PDF
|
12-Bit
ADSP-1012A
20MHz
300mW
64-Pin
68-Pin
68-Contact
IL-STD-883.
d64a
ADSP1012AJN
ADSP-1012A
adsp1012
|