MPY012H Search Results

TCA 210

Abstract: advanced tca LMU12GC20 LMU12GC35 MPY012H
Contextual Info: LMU12 LMU12 DEVICES INCORPORATED 12 x 12-bit Parallel Multiplier 12 x 12-bit Parallel Multiplier DEVICES INCORPORATED FEATURES ❑ ❑ ❑ ❑ DESCRIPTION 20 ns Worst-Case Multiply Time Low Power CMOS Technology Replaces Fairchild MPY012H Two’s Complement, Unsigned, or

Contextual Info: LMLL12 •Vi» /lif iu LMU12 mm 12 x 12-bit Parallel Multiplier DEVICES INCORPORATED FEATURES_ □ □ □ □ 20 ns Worst-Case Multiply Time Low Power CMOS Technology Replaces TRW MPY012H Two's Complement, Unsigned, or Mixed Operands □ Three-State Outputs

TCA 210

Abstract: LMU12GC45 LMU12DC65 LMU12GC20 LMU12GC35 LMU12GC65 MPY012H
Contextual Info: LMU12 LMU12 DEVICES INCORPORATED 12 x 12-bit Parallel Multiplier 12 x 12-bit Parallel Multiplier DEVICES INCORPORATED FEATURES ❑ ❑ ❑ ❑ ❑ ❑ ❑ DESCRIPTION 20 ns Worst-Case Multiply Time Low Power CMOS Technology Replaces TRW MPY012H Two’s Complement, Unsigned, or

Contextual Info: LMU12 12 x 12-bit Parallel Multiplier D E V IC E S IN C O R P O R A T E D DESCRIPTION FEATURES □ □ □ □ 20 ns Worst-Case Multiply Time Low Power CMOS Technology Replaces Fairchild MPY012H Two's Complement, Unsigned, or Mixed Operands □ Three-State Outputs

Contextual Info: LMU12 12 x 12-bit P a ra ll el M u l t ip l ie r DFVICES IN C O R P O H ArFTj FEATURES DESCRIPTION □ 35 n s W orst-C ase M ultiply Tim e □ L ow P ow er CM O S T echnology □ R eplaces TRW MPY012H □ T w o 's C om plem ent, U nsigned, or M ixed O p e ran d s

Contextual Info: LMU12 12 x 12-bit Parallel Multiplier DEVICES INCORPORATED FEATURES DESCRIPTION □ 20 ns Worst-Case Multiply Time □ Low Power CMOS Technology □ Replaces TRW MPY012H □ Two's Complement, Unsigned, or Mixed Operands □ Three-State Outputs □ Available 100% Screened to

Contextual Info: . i\\\ Ci >•111 LMU12 12 x 12-bit Parallel Multiplier □ FV IC E S IN C O R P Q R A T F D DESCRIPTION FEATURES □ 20 ns W orst-Case M ultiply Time □ Low Power CMOS Technology □ Replaces Fairchild MPY012H □ Tw o's Complement, Unsigned, or Mixed Operands

2A1121

Contextual Info: LMU12 12 x 12-bit Parallel Multiplier FEATURES DESCRIPTION □ □ □ □ 20 ns Worst-Case Multiply Time Low Power CMOS Technology Replaces TRW MPY012H Two’s Complement, Unsigned, or Mixed Operands □ Three-State Outputs □ Available 100% Screened to

Contextual Info: Lg G lc LMU12 12 x 12-bit Parallel Multiplier DEVICES INCORPORATED FEATURES D E S C R IP T IO N □ 35 ns Worst-Case Multiply Time □ Low Power CMOS Technology □ Replaces TRW MPY012H □ Two's Complement, Unsigned, or Mixed Operands □ Three-State Outputs

PL7223

Abstract: CIRCUIT DIGRAM 012HJ1C TRW 012HJ1C MPY012H 23/25C640-I/P
Contextual Info: MPY012H T R V t Multiplier 12x12 Bit, 115ns The M P Y 0 12 H is a h i g h -s p e e d 1 2 x 1 2 b it p a ra lle l m u ltip lie r w h i c h o p e r a t e s a t a 1 1 5 n s c y c le t im e 8 .7 M H z m u ltip lic a tio n ra te . T h e m u ltip lic a n d a n d t h e m u ltip lie r

lmu12gc45

Contextual Info: I M II1 ? L3VIU12 12 x 12-bit Parallel M u ltip lie r □ 20 ns Worst-Case Multiply Time □ Low Power CMOS Technology □ Replaces TRW MPY012H □ Tw o’s Complement, Unsigned, or Mixed Operands □ Three-State Outputs □ Available 100% Screened to MIL-STD-883, Class B

Contextual Info: LMU12 12 x 12-bit Parallel Multiplier DEVICES INCORPORATED FEATURES □ □ □ □ DESCRIPTION 35 ns Worst-Case M ultiply Time Low Pow er CMOS Technology Replaces TRW MFY012H T w o's C om plem ent Unsigned, or Mixed O perands □ Three-State O utputs □ Available 100% Screened to

2388 84 JRC

Abstract: jrc 2388 yx 8018 tdc1008 ADSP-1080 0620 jrc gsp3f Analog Devices Data-Acquisition Databook 1984 ADSP1080 JRC 2388 84
Contextual Info: DSP PRODUCTS DATABOOK DSP MICROPROCESSORS MICROCODED SUPPORT COMPONENTS FLOATING POINT COMPONENTS FIXED POINT COMPONENTS How to Find Product Data in This Databook T H IS V O LU M E Contains Data Sheets, Selection Guides, Application N otes, and a wealth of background inform ation on com ponents for num ber

K3467

Abstract: TRW 012HJ1C MPY008H tdc1008 smd marking g8 smd Pl9 012hj TMC216H MPY012H 012HJ1C
Contextual Info: TjRSnf F ix e d -P o in t A rith m e tic Description Product TM C208K-1 Size Clock Rate 1 MHz P o w e r1 (Watts) Grades2 Package Notes Page M u ltip lier 8x8 45 50 65 70 0.55 0.55 0.55 0.55 85, N5 B5 65, N5 B5 40 40 40 40 Pin Pin Pin Pin DIP DIP DIP DIP

TE 555-1

Abstract: mini project using ic 555 MPY008H marking b9d marking a007 mt4m OA95 p6-33 IC LM 555 pin detail TSX 27
Contextual Info: MIL-M-38510/500B 4 AUGUST 1986 SUPERSEDING- MIL-M-38510/500A 12 D e c e m b e r 1 9 8 4 [QUALIFICATION I ¡REQUIREMENTS I IREMOVED I MILITARY MICROCIRCUITS, DIGITAL, SPECIFICATION T T L , M U L T I PL I E R - A C C U M U L A T O R S / M U L T I PL I E R S

ADSP-1012A

Abstract: 1012a ADSP-1012 SP1012 ADSP1012ASG
Contextual Info: ANALOG DEVICES □ FEATURES 12 x 12-Bit Parallel Multiplication 20MHz Multiplication Rate Worst Case 300mW Power Dissipation with TTL-Compatible CMOS Technology Twos-Complement, Unsigned-Magnitude, and Mixed-Mode Data Formats Available in Hermetically-Sealed 64-Pin DIP,

Idt7212l

Contextual Info: m m 1 1 ^ 12 x 12-BIT PARALLEL CM O S MULTIPLIER IDT7212L IDT7213L Integrated D eviceTechno!o 3 y. Inc FEATURES: DESCRIPTION: • 12 x 12-bit para lle l m u ltip lie r w ith d o u b le p re cisio n p ro d u ct • H ig h -spe e d : 35ns m a xim u m c lo c k to m u ltip ly tim e

112KJ4C

Abstract: MPY112K 112kj4 trw mpy 16 MPY112 MPY012H MPY112KJ4A MPY112KJ4C TRW LSI Products 112kj
Contextual Info: MPY112K r n Multiplier Features 12x12 Bit, 50ns • 50ns Multiply Time Worst Case The MPY112K is a video-speed 12x12 bit parallel multiplier which operates at a 50ns cycle time (20MHz multiplication rate). The multiplicand and the multiplier may be specified together as two's complement or

C3211

Abstract: TMC216
Contextual Info: Fixed-Point Arithmetic 7,TwV Since the first m onolithic m ultiplier was introduced by TRW in 1976, and m ultiplication was changed from something difficult to something easy, this building block has becom e ubiquitous in the w orld o f signal processing. TRW continues to provide the broadest line o f fixed-point m ultipliers, with w ord

d64a

Abstract: ADSP1012AJN ADSP-1012A adsp1012
Contextual Info: A N A LO G D E V IC E S □ 12 x 12-Bit CMOS Multiplier ADSP-1012A FEA TU RES 12 x 12-Bit Parallel M ultiplication 20MHz M ultiplication Rate W orst Case 300mW Power Dissipation w ith TTL-Com patible CM OS Technology Tw os-Com plem ent, Unsigned-M agnitude, and