LVC27A Search Results

Contextual Info: D E S C R IP TIO N FE A T U R E S : - LVC27A ADVANCE INFORMATION 3.3V CMOS TRIPLE 3-INPUT NOR GATE WITH 5 VOLT TOLERANT I/O J m ï ï ., 0.5 MICRON CMOS Technology ESD > 2000V per MlL-STD-883, Method 3015; > 200V using machine model C = 200pF, R = 0

Contextual Info: 3.3V CMOS TRIPLE 3-INPUT NOR GATE, 5 VOLT TOLERANT I/O DESCRIPTION: FEATURES: - LVC27A ADVANCE INFORMATION 0.5 MICRON CMOS Technology ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model C = 200pF, R = 0 1.27mm pitch SOIC, 0.65mm pitch SSOP and

Contextual Info: 3.3V CMOS TRIPLE 3-INPUT NOR GATE, 5 VOLT TOLERANT I/O DESCRIPTION: FEATURES: - LVC27A ADVANCE INFORMATION 0.5 MICRON CMOS Technology ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model C = 200pF, R = 0 1,27mm pitch SOIC, 0.65mm pitch SSOP and

Contextual Info: LVC27A 3.3V CMOS TRIPLE 3-INPUT NOR GATE, 5V TOLERANT I/O EXTENDED COMMERCIAL TEMPERATURE RANGE LVC27A ADVANCE INFORMATION 3.3V CMOS TRIPLE 3-INPUT NOR GATE WITH 5 VOLT TOLERANT I/O DESCRIPTION FEATURES: – – – – – – – – – – 0.5 MICRON CMOS Technology