LS642 Search Results

N74LS642N

Abstract: ls642
Contextual Info: Sìgnetics 74LS641, LS642, 74LS641-1, LS642-1 Transceivers Octal Bus Transceiver Open Collector Product Specification Logic Products FEATURES • Octal bidirectional bus interface • Open Collector Outputs — 'LS641, non-inverting — 'LS642, inverting

74LS641

Abstract: 74LS641-1 74LS642 LS641 LS642 N74LS641-1N N74LS641N N74LS642N
Contextual Info: 74LS641, LS642, 74LS641-1, LS642-1 S ig n e lic s Transceivers Octal Bus Transceiver Open Collector Product Specification Logic Products FEATURES • Octal bidirectional bus interface • Open Collector Outputs — 'LS641, non-inverting — 'LS642, inverting

ic ttl 74ls

Abstract: LS641 74LS641-1 74LS641 74LS642 LS642 N74LS641-1N N74LS641N N74LS642N
Contextual Info: 74LS641, LS642, 74LS641-1, LS642-1 Signetics Transceivers O ctal Bus T ransce iver Open C o lle cto r Product Specification L o g ic P roducts FEATURES • Octal bidirectional bus interface • Open C ollector Outputs — 'LS641, non-inverting — LS642, inverting

Contextual Info: 74LS641, LS642, 74LS641-1, LS642-1 Signetics Transceivers Octal Bus Transceiver Open Collector Product Specification Logic Products FEATURES • Octal bidirectional bus interface • Open Collector Outputs — 'LS641, non-inverting — LS642, inverting • PNP inputs for reduced loading

74LS641

Abstract: 74LS641-1 74LS642 LS641 LS642 N74LS641-1N N74LS641N N74LS642N
Contextual Info: Signetics 74LS641, LS642, 74LS641-1, LS642-1 Transceivers Octal Bus Transceiver Open Collector Logic Products Product Specification FEATURES • Octal bidirectional bus interface • Open Collector Outputs — 'LS641, non-inverting — 'LS642, inverting

74ALS641

Abstract: 54LS641 als641 74als642 SN54ALS641 20-PIN
Contextual Info: g MOTOROLA SN54ALS641/642 SN74ALS641/642 A d v a n ce In form ation D E S C R IP T IO N — T h e se o cta l bus tra n s c e iv e rs a re id e a lly s u ite d fo r a s y n c h ro n o u s tw o - w a y c o m m u n ic a tio n b e tw e e n data buses. C o n tro l

LS645

Abstract: 74ls642 SN54/74LS642 SN54LSXXXJ LS640 LS641 LS642 74LS645 8A79 74LS641
Contextual Info: SN54/74LS640 SN54/74LS641 SN54/LS642 SN54/74LS645 OCTAL BUS TRANSCEIVERS These octal bus transceivers are designed for asynchronous two-way communication between data buses. Control function implementation minimizes external timing requirements. These circuits allow data transmission from the A bus to B or from the B bus to A bus depending upon the logic

Contextual Info: SN54/74LS640 SN54/74LS641 SN54/LS642 SN54/74LS645 OCTAL BUS TRANSCEIVERS These octal bus transceivers are designed for asynchronous two-way communication between data buses. Control function implementation minimizes external timing requirements. These circuits allow data transmission from the A bus to B or from the B bus to A bus depending upon the logic

SN74AS644

Abstract: sn74as642 SN54ALS645A SN54AS640 SN54AS645 SN74ALS645A SN74AS640 SN74AS645 als641 sn74als644
Contextual Info: SN54A LS640A THRU SN54A LS645A , SN 54A S 640 THRU SN 54A S 645 SN74A LS640A THRU SN74A LS645A , S N 74A S 640 THRU S N 74A S645 OCTAL BUS TRANSCEIVERS D 2 6 6 1 , DECEMBER 19 8 3 - REVISED M A Y 198 6 S N 5 4 A L S ', S N 5 4 A S ' . . . J P AC KA G E S N 7 4 A L S ', S N 7 4 A S ' . . . D W OR N PAC KAG E

M74ALS374P

Abstract: dd127 4d40t
Contextual Info: MITSUBISHI iDGTL LOGIC} TI 1mF | bSLHÖ27 D0155E5 5 MITSUBISHI ALSTTLs ,oC* M 74A LS374P OCTAL D-TYPE EDGE-TRIGGERED FLIP FLOP W ITH 3-STATE OUTPUT NONINVERTED 6249827 MITSUBISHI 9 1D 12525 (DGTL LOGIC) DESCRIPTION D PIN CONFIGURATION (TOP VIEW) T h e M 7 4 A L S 3 7 4 P is a s e m ic o n d u c to r in te g ra te d c irc u it

D0-15L

Abstract: LS74AD
Contextual Info: 7 z1 % > -'0 '7 -¿ ? S ' M 74ALS873AP ¡C' 3< DUAL 4 -B IT D-TYPE TRANSPARENT LATCH W ITH 3-STATE OUTPUT NONINVERTED 50t° CDGTL LOGIC) DESCRIPTION PIN CONFIGURATION (TOP VIEW) DIR EC T RESET , p " IN P U T I M ° O UTPUT } -q C O N TR O L IN PU T E c

Contextual Info: M MOTOROLA SN54/74LS640 SN54/74LS641 SN54/LS642 SN54/74LS645 OCTAL BUS TRANSCEIVERS These octal bus transceivers are designed tor asynchronous two-way communication between data buses. Control function implementation minimizes external timing requirements. These circuits allow data transmis­

DIODE s641

Abstract: IC TTL 74 ls 04 74LS642
Contextual Info: M M O T O R O L A D E S C R IP T IO N — These octal bus transceivers are designed for asynchronous tw o -w a y com m unication between data buses. Control fu n c tio n im plem entation m inim izes external tim ing requirements. These circ u its a llo w daita transm ission fro m th e A bus to B or fro m th e B

M74ALS193P

Abstract: TF2N 154027
Contextual Info: MITSUBISHI I -CDGTL L O G I C ? =11 De | bEMTñE? □□12454 ñ T~ ^ MITSUBISHI ALSTTLs . M74ALS193P SYNCHRONOUS PRESETTABLE U P /D O W N 4 -B IT B IN A R Y COUNTER 6248827 MITSUBISHI ÍDGTL LOGIC DESCRIPTION The M74ALS193P is a semiconductor integrated circuit

Contextual Info: SG60R4 Schottky TTL • Over 180 LS Devices • ALS • FAST TOTAL TTL COMMITMENT «TOTAL • TTL Compatible Macrocell Arrays • RAMs • PROMs General Information TTL in Perspective proved speed — p o w e r product co m p ared to LS as a result o f ad vanced M O S A IC oxide isolated processing.

SN74ALS123

Abstract: SN7401 74LS424 54175 SN74298 SN74265 SN74LS630 SN74LS69 National Semiconductor Linear Data Book Transistor AF 138
Contextual Info: INDEX • FUNCTIONAL SELECTION GUIDE • NUMERICAL FUNCTION INTERCHANGEABILITY GUIDE GENERAL INFORMATION AND EXPLANATION OF NEW LOGIC SYMBOLS ORDERING INSTRUCTIONS AND MECHANICAL DATA 54/74 SERIES OF COMPATIBLE TTL CIRCUITS • PIN OUT DIAGRAMS 54/74 FAMILY SSI CIRCUITS

SN74LS642

Abstract: LS640 LS641 LS642 LS645 SN74LS640 SN74LS640N SN74LS641 SN74LS645
Contextual Info: SN74LS640, SN74LS641, LS642, SN74LS645 Octal Bus Transceivers These octal bus transceivers are designed for asynchronous two-way communication between data buses. Control function implementation minimizes external timing requirements. These circuits allow data transmission from the A bus to B or from the B bus

MC74LS247

Abstract: MC74LS147 MC74LS08 MC74LS373 MC74LS00 MC74LS245 LS30 ls30 diode MC74LS38 MC74LS32
Contextual Info: HC Portfolio Comparison PART # LS00 LS01 LS02 LS03 LS04 LS05 LS06 LS07 LS08 LS09 LS10 LS11 LS12 LS13 LS14 LS15 LS20 LS21 LS22 LS26 LS27 LS28 LS30 LS31 LS32 LS33 LS37 LS38 LS40 LS42 LS47 LS48 LS49 LS51 LS54 LS55 LS73 LS74 LS75 LS76 LS77 LS78 LS83 LS85 LS86

ic 74 LS 138 DECODER

Abstract: Alu 181 8 bit bcd adder/subtractor f245 motorola lal 2084 TTL 74-series IC LIST internal circuitry for sr flip flop T flip flop IC LS248 4-bit bcd subtractor
Contextual Info: SG 6 0R 4 Schottky TTL • O v e r 180 LS Devices • ALS • FAST • TTL C o m p a tib le M acrocell A rra y s • RAMs • PR O M s 006844 /y err This Material Copyrighted By Its Respective Manufacturer General Inform ation TTL in Perspective proved speed — p o w e r product co m p ared to LS as a

dd127

Contextual Info: D e | hS4clflE!7 GG1E3M7 7 |~~ MIT SUB ISHI íDGTL LOGIC} TI MITSUBISHI ALSTTLs M74ALS15AP 6249827 MITSUBISHI <DGTL LOGI C 91D 12347 D TRIPLE 3-IN P U T POSITIVE AND GATE W ITH OPEN COLLECTOR OUTPUT DESCRIPTION Th e M 7 4A L S 15A P is a se m ic o n d u c to r in teg rated circu it

1e4d

Abstract: ls151p LS29 LS245 74als15
Contextual Info: MITSUBISHI -CDGTL LOGIC} TI -DE | 00123^0 S MITSUBISHI ALSTTLs ,o c* M 7 A L S ! 4 5 1 JP T-66-21-53 8-LINE TO 1-LINE DATA SELECTOR/MULTIPLEXER WITH STROBE 6249827 MITSUBISHI DGTL LOGIC r DESCRIPTION T h e M 7 4A L S 151 P is a sem iconductor in teg rated circuit

LS353P

Abstract: d12518 74ALS04A
Contextual Info: MI TSU BISHI {DGTL LOGIC! TI » F l b5MTÖ27 0Q1SS1Ö fl | ~ MITSUBISHI ALSTTLs M 74A LS353P o O ° DUAL 4 -U N E TO 1-LINE DATA SELECTOR/MULTIPLEXER WITH 3-STATE OUTPUT INVERTED 6249827 MITSUBISHI 9 1 D 12518 (DGTL LOGI C) DESCRIPTION T h e M 7 4A L S 353 P is a sem iconductor integrated circuit

SN74LS47N PIN DIAGRAM

Abstract: IC TTL 7400 diagram and truth table 74lsxxx data sheet 74 LS147 pin configuration layout INTERNAL STRUCTURE LS156 SN74LS47N pin configuration DL121 IC 7400 diagram and truth table philips semiconductor data handbook sn74ls47n counter
Contextual Info: DL121/D Rev. 6, Jan-2000 ON Semiconductor LS TTL Data ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC SCILLC . SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does

SN74AS644

Contextual Info: SN54ALS640A THRU SN54ALS645A, SN54AS640 THRU SN54AS645 SN74ALS640A THRU SN74ALS645A, SN74AS640 THRU SN74AS645 OCTAL BUS TRANSCEIVERS D2661, DECEMBER 1983-RE V ISE D MAY 1986 SN 54ALS&#39;, SN 54A S' . . . J PACKAGE SN 74ALS&#39;, SN 74AS' . . . DW OR N PACKAGE Bidirectional Bus Transceivers in HighDensity 20-Pin Packages