Untitled
Abstract: No abstract text available
Text: MITSUBISHI ALSTTLs _M 7 4 A L S 6 4 2 A P MITSUBISHI -CDG TL LOGIC} TI DEI DOiat.43 u u iH L BUS TRANSCEIVER W ITH OPEN COLLECTOR OUTPUT IN V ERTED V DESCRIPTION The M 74ALS642AP is a semiconductor integrated circuit consisting of eight bus transm itter/receiver circuits with
|
OCR Scan
|
74ALS642AP
16P2P
16-PIN
150mil
T-90-20
20P2V
20-PIN
300mil
|
PDF
|
74ALS641
Abstract: 54LS641 als641 74als642 SN54ALS641 20-PIN
Text: g MOTOROLA SN54ALS641/642 SN74ALS641/642 A d v a n ce In form ation D E S C R IP T IO N — T h e se o cta l bus tra n s c e iv e rs a re id e a lly s u ite d fo r a s y n c h ro n o u s tw o - w a y c o m m u n ic a tio n b e tw e e n data buses. C o n tro l
|
OCR Scan
|
54LS641/642,
74LS641/642.
20-PIN
74ALS641
54LS641
als641
74als642
SN54ALS641
|
PDF
|
SN74AS644
Abstract: sn74as642 SN54ALS645A SN54AS640 SN54AS645 SN74ALS645A SN74AS640 SN74AS645 als641 sn74als644
Text: SN54A LS640A THRU SN54A LS645A , SN 54A S 640 THRU SN 54A S 645 SN74A LS640A THRU SN74A LS645A , S N 74A S 640 THRU S N 74A S645 OCTAL BUS TRANSCEIVERS D 2 6 6 1 , DECEMBER 19 8 3 - REVISED M A Y 198 6 S N 5 4 A L S ', S N 5 4 A S ' . . . J P AC KA G E S N 7 4 A L S ', S N 7 4 A S ' . . . D W OR N PAC KAG E
|
OCR Scan
|
SN54ALS640A
SN74ALS640A
SN54ALS645A,
SN54AS640
SN54AS645
SN74ALS645A,
SN74AS640
SN74AS645
D2661,
983-REVISED
SN74AS644
sn74as642
SN54ALS645A
SN74ALS645A
als641
sn74als644
|
PDF
|
Untitled
Abstract: No abstract text available
Text: MITSUBISHI ALSTTLs M 74ALS1035P TËJ MITSUB ISH I {DGTL LOGIC} Q012732 G | HEX NONINVERTING BUFFER W ITH OPEN COLLECTOR OUTPUT / DESCRIPTION PIN CONFIGURATION TOP VIEW ” T h e M 7 4 A L S 1 0 3 5 P is a s e m ic o n d u c to r in te g ra te d c ir c u it c o n s is tin g o f six n o n -inverting b u ffe rs w ith open
|
OCR Scan
|
74ALS1035P
Q012732
16P2P
16-PIN
150mil
T-90-20
20P2V
20-PIN
300mll
|
PDF
|
ci la 7610
Abstract: No abstract text available
Text: c +e MITSUBISHI ALSTTLs . op,00° M 74A L S 620A -1P v ie N v t ^s ^ - 3 _ OCTAL BUS TRANSCEIVER W ITH 3-STATE OUTPUT INVERTED 6249827 MITSUBISHI CDGTL LOGIC) DESCRIPTION The M74ALS6Í20A-1P is a semiconductor integrated cir cuit consisting of eight bus transm itter/receiver circuits
|
OCR Scan
|
M74ALS6
16P2P
16-PIN
150mil
T-90-20
20P2V
20-PIN
300mil
ci la 7610
|
PDF
|
ci la 7610
Abstract: No abstract text available
Text: MITSUBISHI ALSTTLs M 7 4 A LS 6 5 1 P 7 -52-3/ OCTAL BUS TRANSCEIVER/REGISTER W ITH 3-STATE OUTPUT INVERTED 6249827 MITSUBISHI 91 D 12674 (DGTL LOGIC ) DESCRIPTION The M74ALS651P is a semiconductor integrated circuit consisting of eight bus transceiver/registers with 3-state
|
OCR Scan
|
M74ALS651P
16P2P
16-PIN
150mil
T-90-20
20P2V
20-PIN
300mil
ci la 7610
|
PDF
|
Untitled
Abstract: No abstract text available
Text: MITSUBISHI íDGTL LOGICI TI DEI't.E4*1ñ27 D0ia3flD S MITSUBISHI ALSTTLs M 624 9 82 7 M IT S U B IS H I DG TL L O G IC 7 4 A 91D L S 1 1 3 A P 12380 D DUAL J-K N EG A TIVE EDGE-TRIGGERED FLIP -FLO P W IT H SET T -H (* -o 7 -o y DESCRIPTION PIN CONFIGURATION (TOP VIEW)
|
OCR Scan
|
74ALS113AP
16P2P
16-PIN
150mil
T-90-20
20P2V
300mil
|
PDF
|
m74als191p
Abstract: No abstract text available
Text: ÍDGTL LOGIC} 91D TI De | 12446 b241fl27 □ 0 1 2 4 4b ñ r D MITSUBISHI ALSTTLs M 74A LS191P SYNCHRONOUS PRESETTABLE UP/DOWN 4 -B IT BINARY COUNTER W ITH MODE CONTROL • 7 ^ V ' 5 ' ' ^ >3 DESCRIPTION - o 7 PIN CONFIGURATION TOP VIEW Th e M 7 4 A L S 1 9 1 P is a s e m ic o n d u c to r in te g ra te d c irc u it
|
OCR Scan
|
b241fl27
LS191P
16P2P
16-PIN
150mil
T-90-20
20P2V
20-PIN
300mil
m74als191p
|
PDF
|
74ALS640
Abstract: No abstract text available
Text: MITSUBISHI -CDGTL LOGIC} dT | ba^flS? D O i a k b B 4 M ITSUBISHI A L ST T Ls sc* -s s 5 " : . M 7 4 A LS6 4 7 P ,o.9B OCTAL BUS TR A N SC EIV ER /R EG IST ER WITH OPEN COLLECTOR OUTPUT NONINVERTED 6249827 MITSUBISHI CDGTL LOGTC) DESCRIPTION The M74ALS647P is a semiconductor integrated circuit
|
OCR Scan
|
M74ALS647P
16P2P
16-PIN
150mil
T-90-20
20P2V
20-PIN
300mil
74ALS640
|
PDF
|
74ALS131
Abstract: 74als245a m74als138p 74als169b 74ALS193D
Text: M IT S U B IS H I -CDGTL L O G I C } TI 0 F | b E 4 ciflE 7 0 D lE 3 flt b |~ _ 6249827 MITSUBISHI I M IT SU B ISH I ALSTTLs M 74ALS131P <DG T L LO GI C 91D 12386 D 3 -L IN E TO 8 -L IN E D E C O D E R /D E M U L T IP L E X E R W IT H A D D R E S S R E G IS T E R
|
OCR Scan
|
74ALS131P
M74ALS131P
16P2P
16-PIN
150mil
T-90-20
20P2V
20-PIN
300mll
74ALS131
74als245a
m74als138p
74als169b
74ALS193D
|
PDF
|
Untitled
Abstract: No abstract text available
Text: MITSUBISHI ALSTTLs M 7 4 A L S 1 0 0 2 À P a D eE| tk24=]aS7 0015712 > | MITSUBISHI IDGTL LOGIC} 11 QUADRUPLE 2-IN P U T PO SITIVE NOR BUFFER 7 ^ V 3 - /S DESCRIPTION PIN CONFIGURATION (TOP VIEW) The M74ALS1002AP is a semiconductor integrated cir cuit consisting of four 2-input positive-logic NOR buffer
|
OCR Scan
|
M74ALS1002AP
16P2P
16-PIN
150mil
T-90-20
20P2V
20-PIN
300mil
|
PDF
|
J 5027 R
Abstract: BEM 6K
Text: MIT SUBISH I íDGTL L O G I C } T I d ËT| ^5^027 ~JZ.SZt~3/ G0127SS □ MITSUBISHI ALSTTLs M 74A L S 1621A P I 62 49 8 2 7 M I T S U B I S H T T D G T L T o G r ^ ~ 910 12755 D OCTAL BUS TRANSCEIVER W ITH OPEN COLLECTOR OUTPUT NONINVERTED) DESCRIPTION
|
OCR Scan
|
G0127SS
M74ALS1621AP
74ALS621AP
16P2P
16-PIN
150mil
T-90-20
20P2V
20-PIN
300mil
J 5027 R
BEM 6K
|
PDF
|
Untitled
Abstract: No abstract text available
Text: MITSUBISHI -CDGTL L O G I O TI DE | bSMTfla? 001E4b4 □ M IT SU B ISH I ALSTTLs M74ALS241AP 6249827 MITSUBISHI DGTL LOGIC 91D 12464 D O CTAL B U F F E R /L IN E D R IV E R W IT H 3 -ST A T E O U T PU T (N O N IN V E R T E D ) DESCR IPTIO N The M74ALS241AP is a semiconductor integrated circuit
|
OCR Scan
|
001E4b4
M74ALS241AP
M74ALS241AP
16P2P
16-PIN
150mil
T-90-20
20P2V
20-PIN
300mil
|
PDF
|
Untitled
Abstract: No abstract text available
Text: MITSUBISHI ALSTTLs & M74ALS169BP T ' - v ’S '- J J - o SYNCHRONOUS PRESETTABLE UP/DOWN 4 -B IT BINARY COUNTER 6249827 MITSUBISHI DG TL LOGIC DESCRIPTION Th e M 74A L S 169 B P is a sem iconductor integrated circuit of a synchronous p resettable u p /d o w n
|
OCR Scan
|
M74ALS169BP
16P2P
16-PIN
150mil
T-90-20
20P2V
300mil
|
PDF
|
|
|
Untitled
Abstract: No abstract text available
Text: "d ë J M ITS UBISHI -CDGTL L O G I O bEMTfla? ooiBS'in a S^Ls MITSUBISHI ALSTTLs M 74ALS133P r _ 6249827 MITSUBISHI - y j - / r SINGLE 13-IN PU T POSITIVE NAND GATE DGTL LOGIC DESCRIPTION Th e M 7 4A LS 133P is a sem iconductor integrated circuit
|
OCR Scan
|
74ALS133P
13-IN
13-input
16P2P
16-PIN
150mil
T-90-20
20P2V
20-PIN
300mil
|
PDF
|
m74als
Abstract: M74ALS109AP 74ALS640
Text: M IT S U B IS H I {D G T l T o G IcT ^ I b H 1 SS? M 6249827 MITSUBISHI 7 4 A CDGTL LOGIC 91D J STTLs L S 1 0 9 A 12 37 4 P D DUAL J-R POSITIVE EDGE-TRIGGERED FLIP-FLOP W ITH SET AND RESET T -V & -0 7 - Ô ? DESCRIPTION PIN CONFIGURATION TOP VIEW) The M74ALS109AP is a semiconductor Integrated circuit
|
OCR Scan
|
M74ALS109AP
16P2P
16-PIN
150mil
T-90-20
20P2V
20-PIN
300mil
m74als
74ALS640
|
PDF
|
gt 568
Abstract: m74als568ap m74als568a
Text: MITSUBISHI -CDGTL L O G I O de! TI tsMiaa? QGiasai 4 |~~ M IT S U B IS H I ALSTTLs ~ J- M 74A LS 568A P S Y N C H R O N O U S P R E S E T T A B L E U P /O O W N D EC A D E C O U N TE R _ W IT H 3 -S T A T E O U T P U T 1H249827 MITSIJBISHI
|
OCR Scan
|
1H249827
16P2P
150mil
20P2V
300mil
E--07
gt 568
m74als568ap
m74als568a
|
PDF
|
M74ALS1032AP
Abstract: No abstract text available
Text: MITSUBISHI ALSTTLs M 74ALS1 0 3 2 AP M I T S U B I S H I - C D G T L L O G I C } T I D È I ” L ^ M ^ ñ S ? 1 2 7 5 fi QUADRUPLE 2-IN P U T POSITIVE OR BUFFER _ DESCRIPTION _ _ _ _ PIN CONFIGURATION TOP VIEW The M74ALS1032AP is a semiconductor integrated cir
|
OCR Scan
|
74ALS1
M74ALS1032AP
16P2P
16-PIN
150mil
T-90-20
20P2V
20-PIN
300mil
|
PDF
|
Untitled
Abstract: No abstract text available
Text: M MOTOROLA SN54ALS641/642 SN74ALS641/642 Advance Information D E S C R IP T IO N — These octal bus transceivers are ideally suited fo r asynchronous tw o -w a y com m unication betw een data buses. Control fu n ctio n im plem entation m inim izes external tim in g requirem ents.
|
OCR Scan
|
SN54ALS641/642
SN74ALS641/642
54LS641
|
PDF
|
SN74ALS644
Abstract: 74ALS641 S642 SN74AS644
Text: SP TALS64QA THRU SN54ALS645A, SN 54AS640 THRU SN54AS645 S N /4 A L S6 4 0 A THRU SN74ALS645A, SN 74AS640 THRU SN74AS645 OCTAL BUS TRANSCEIVERS D 2 6 6 1 , DECEMBER 1 9 8 3 -R E V IS E D M A Y 1986 S N 5 4 A L S ', S N 5 4 A S ' . . J P AC KAG E S N 7 4 A L S '. S N 7 4 A S ' . . . D W OR N PAC KA G E
|
OCR Scan
|
TALS64QA
SN54ALS645A,
54AS640
SN54AS645
SN74ALS645A,
74AS640
SN74AS645
20-Pin
300-mil
SN74ALS644
74ALS641
S642
SN74AS644
|
PDF
|
74ALS573AD
Abstract: 74ALS574AD
Text: M ITSUBISHI ALSTTLs r M 7 4 A L S 1 6 4 5 A P D e | bSMTfla? DDia77T 3 MITSUBISHI -CDGTL LOGIC} OCTAL BUS TR A N SC EIVER W IT H 3-STATE O U TPUT N O N IN VERTED - 7 “' » DESCRIPTION The M74ALS1645AP is a semiconductor integrated cir cuit consisting of eight bus transmitter/receiver circuits
|
OCR Scan
|
DDia77T
M74ALS1645AP
M74ALS645AP
-15mA)
150mil
16P2P
16-PIN
T-90-20
20P2V
74ALS573AD
74ALS574AD
|
PDF
|
c 2274
Abstract: No abstract text available
Text: '7 ' '0 7 -0 5 * MITSUBISHI ALSTTLs OCTAL D -TY P E EDGE-TRIGGERED FLIP-FLO P W IT H 3-S TA TE O U TPU T N O N IN V E R TE D . Ä > a 6249827 M IT S U B IS H I (D G TL L O G IC ) DESCRIPTION consisting o f eight D-type positive edge-triggered flipflop circuits w ith 3-state noninverted output and is pro
|
OCR Scan
|
M74ALS574AP
150mil
16P2P
16-PIN
T-90-20
20P2V
20-PIN
300mil
c 2274
|
PDF
|
74ALS273P
Abstract: M74ALS273P
Text: MITSUBISHI -CDGTL LOGIC} TI D e B bSMTñE? DDIHSDI 5 MITSUBISHI ALSTTLs M 74A LS273P T z- / ù > ~ o y - < o s ' OCTAL POSITIVE EDGE-TRIGGERED D-TYPE FLIP FLOP WITH RESET 9 1D 12501 6249827 MITSUBISHI ÍDGTL LOgT c T DESCRIPTION PIN CONFIGURATION TOP VIEW
|
OCR Scan
|
LS273P
74ALS273P
16P2P
16-PIN
150mil
T-90-20
20P2V
20-PIN
300mil
M74ALS273P
|
PDF
|
Untitled
Abstract: No abstract text available
Text: MITSUBISHI ALSTTLs M74ALS623AP MITSUBISHI O G T L LOGIC} bSMTflS? DOiabS? 2 OCTAL BUS TRANSCEIVER W ITH 3-STATE OUTPUT INONINVEBTED 7 ’" - 5 2 - 3 / DESCRIPTION The M74ALS623AP is a semiconductor integrated circuit consisting of eight bus transm itter/receiver circuits with
|
OCR Scan
|
M74ALS623AP
M74ALS623AP
16P2P
16-PIN
150mil
T-90-20
20P2V
20-PIN
300mil
|
PDF
|
