Mounting Hardware
Abstract: FSWL AST025 FVE0100 FVTS FST025 FVT0 AVE0300 FSE009
Text: Mounting Hardware www.vishay.com Vishay Huntington Huntington Models: AST, AVT, ASE, AVE, FST, FVT, FSE, FVE, FSTL, FVTL, FSTS, FVTS, FSWL, FVWL DIMENSIONS in inches millimeters GLOBAL MODEL (OF RESISTOR) BRACKET TYPE Horizontal Thru-Bolt AST020 AVT020
|
Original
|
AST020ï
AVT020
ASE0050ï
AVE0050
FST25Bï
FVT25B
AST025ï
AVT025
FST020ï
FVT020
Mounting Hardware
FSWL
AST025
FVE0100
FVTS
FST025
FVT0
AVE0300
FSE009
|
PDF
|
FVTL20
Abstract: FVTS FVWL
Text: FVTL, FVTS, FVWL www.vishay.com Vishay Huntington Wirewound Resistor, Industrial Power, Vitreous Coated, Tubular FEATURES • High temperature vitreous coating • Complete welded construction • Excellent for intermittent power and pulsing application • Available in non-inductive style special “NI”
|
Original
|
FVTL05
FVTS05
FVWL05
FVTL10
FVTS10
FVWL10
FVTL20
FVTS20
FVWL20
2002/95/EC.
FVTL20
FVTS
FVWL
|
PDF
|
FVTS
Abstract: No abstract text available
Text: FVTL, FVTS, FVWL www.vishay.com Vishay Huntington Wirewound Resistor, Industrial Power, Vitreous Coated, Tubular FEATURES • High temperature vitreous coating • Complete welded construction • Excellent for intermittent power and pulsing application • Available in non-inductive style special “NI”
|
Original
|
FVTL05
FVTS05
FVWL05
FVTL10
FVTS10
FVWL10
FVTL20
FVTS20
FVWL20
2002/95/EC.
FVTS
|
PDF
|
Untitled
Abstract: No abstract text available
Text: FIXED VITREOUS or SILICONE FVT FST FVTL FSTL FVTS FSTS FVWL FSWL TYPE 5 W ATTS th r u CORE WATT A B C D LEADS F G - FVT-5 FVTL.-5 FVTS-5 FVWL-5 5 5 5 8 5/16 5/16 5/16 5/16 3/16 3/16 3/16 3/16 I 1 1 1 1/16 1/16 5/16 1/8 7/16 7/16 7/16 1/4 .104 FVT-10 FVTL, 10
|
OCR Scan
|
FVT-10
FVTS-10
FVT-20
FVTL-20
|
PDF
|
FVTS
Abstract: FVWL
Text: FVTL, FVTS, FVWL www.vishay.com Vishay Huntington Wirewound Resistor, Industrial Power, Vitreous Coated, Tubular FEATURES • High temperature vitreous coating • Complete welded construction • Excellent for intermittent power and pulsing application • Available in non-inductive style special “NI”
|
Original
|
FVTL05
FVTS05
FVWL05
FVTL10
FVTS10
FVWL10
FVTL20
FVTS20
FVWL20
2002/95/EC.
FVTS
FVWL
|
PDF
|
Untitled
Abstract: No abstract text available
Text: MC9S12ZVHY-Family Reference Manual HCS12 Microcontrollers MC9S12ZVHYRMV1 Rev. 1.00 09/2013 freescale.com To provide the most up-to-date information, the revision of our documents on the World Wide Web will be the most current. Your printed copy may be an earlier revision. To verify you have the latest information
|
Original
|
MC9S12ZVHY-Family
HCS12
MC9S12ZVHYRMV1
S12ZCPU
|
PDF
|
Untitled
Abstract: No abstract text available
Text: HIGH-SPEED 8K x 8 DUAL-PORT STATIC RAM IDT7005S/L In te g ra te d D e v ic e T ec h nology, In c . FEATURES: • Interrupt Flag • On-chip port arbitration logic • Full on-chip hardware support of semaphore signaling between ports • Fully asynchronous operation from either port
|
OCR Scan
|
IDT7005S/L
68-pin
45/55/70ns
IDT7005
|
PDF
|
generator cr 665 bosch
Abstract: BOSCH 0 281 002 709 MC9S12ZVM
Text: MC9S12ZVM-Family Reference Manual HCS12 Microcontrollers Rev. 1.3 20 JAN 2014 MC9S12ZVMRMV1 freescale.com To provide the most up-to-date information, the document revision on the Internet is the most current. A printed copy may be an earlier revision. To verify you have the latest information available, refer to :
|
Original
|
MC9S12ZVM-Family
HCS12
MC9S12ZVMRMV1
S12ZCPU
generator cr 665 bosch
BOSCH 0 281 002 709
MC9S12ZVM
|
PDF
|
16kx8 static ram ttl
Abstract: 2640I 08ND
Text: jg r -f HIGH-SPEED 32Kx 8 DUAL-PORT STATIC RAM PRELIMINARY IDT7007S/L In te g ra te d D evice T echnology, Inc. FEATURES: • IDT7007 easily expands data bus width to 16 bits or more using the Master/Slave select when cascading more than one device • M/S= H for BUSY output flag on Master
|
OCR Scan
|
IDT7007S/L
35/45/55/70ns
25/35/45/55ns
IDT7007S
750mW
IDT70D7L
IDT7007
MIL-STD-883,
80-pln
16kx8 static ram ttl
2640I
08ND
|
PDF
|
Untitled
Abstract: No abstract text available
Text: Tem ic L 67130/L 67140 MATRA MHS 1 K x 8 CMOS Dual Port RAM 3.3 Volt Introduction The L 67130/67140 are very low power CMOS dual port static RAMs organized as 1024 x 8. They are designed to be used as a stand-alone 8 bits dual port RAM or as a combination MASTER/SLAVE dual port for 16 bits or
|
OCR Scan
|
67130/L
SCC9000
|
PDF
|
270033
Abstract: Teac A 3440 M51C64HL M51C64HL-12 M51C64HL-15
Text: in U T M51C64HL HIGH PERFORMANCE LOW POWER RIPPLEMODE tm 64K x 1 CHMOS DYNAMIC RAM Military M51C64HL-12 M51C64HL-15 150 75 0.05 120 Maximum Access Time ns Maximum Column Address Access Time (ns) Maximum CHMOS Standby Current (mA) 65 0.05 m RipplemodeTM Operation
|
OCR Scan
|
M51C64HL
M51C64HL-12
M51C64HL-15
tCAC-25Â
270033
Teac A 3440
M51C64HL-15
|
PDF
|
Z1213
Abstract: CY7C132 CY7C136 CY7C146 zl12
Text: bSE » CYPRESS SEMICONDUCTOR SSÖ'lbbE 0 0 0 ^ 7 4 7 ISb I CYP CY7C132/CY7C136 CY7C142/CY7C146 CYPRESS SEMICONDUCTOR 2K x 8 Dual-Port Static RAM output enable OE . BUSY flags are pro vided on each port. In addition, an interrupt Functional Description Features
|
OCR Scan
|
CY7C132/CY7C136
CY7C142/CY7C146
CY7C142/CY7C146
CY7C132/
CY7C136;
52-pin
CY7C132/CY7C136/CY7C142/
CY7C146
Z1213
CY7C132
CY7C136
zl12
|
PDF
|
Untitled
Abstract: No abstract text available
Text: MOSEL _MS6132 2K x 8 CMOS Dual Port SRAM FEATURES DESCRIPTION • H ig h -s p e e d -3 5 /4 5 /5 5 n s T h e M O S E L M S 6 1 3 2 Is a 1 6 ,384 bit dual port static random access m em ory organized as 2 ,0 4 8 words by 8 bits allowing each port to independently access any
|
OCR Scan
|
MS6132
PID068
MS6132-35PC
MS6132-45PC
MS6132-55PC
P48-2
PIDO60
|
PDF
|
Untitled
Abstract: No abstract text available
Text: MC9S12ZVH-Family Reference Manual HCS12 Microcontrollers MC9S12ZVHRMV1 Rev. 1.02 03/2014 freescale.com To provide the most up-to-date information, the revision of our documents on the World Wide Web will be the most current. Your printed copy may be an earlier revision. To verify you have the latest information
|
Original
|
MC9S12ZVH-Family
HCS12
MC9S12ZVHRMV1
S12ZCPU
2013ry
|
PDF
|
|
|
Untitled
Abstract: No abstract text available
Text: fax id: 5221 CYPRESS CY7C027/028 CY7C037/038 PRELIMINARY 32K/64KX 16/18 Dual-Port Static RAM Features • Fully asynchronous operation • Automatic power-down • True Dual-Ported m emory cells which allow simulta neous access of the same memory location
|
OCR Scan
|
CY7C027/028
CY7C037/038
32K/64KX
CY7C027)
CY7C028)
CY7C037)
CY7C038)
35-micron
CY7C037-15AC
CY7C037-15AI
|
PDF
|
SPC8106
Abstract: SPC8106F BT477 crt terminal interface block diagram RAMDAC BT477 640x400 lcd display
Text: PF816-02 _SPC8106Foc Low Power LCD & CRT VGA Controller • DESCRIPTION The SPC8106FOC is a 3.3/5 V LCD video controller based on VGA architecture and optimized tor driving a 640x480 LCD panel display. VGA standard mode functionality is supported using standard IBM VGA param
|
OCR Scan
|
PF816-02
8106Foc
SPC8106FOC
640x480
256x6
56x12
SPC8106Foc
QFP17-144pin
SPC8106
SPC8106F
BT477
crt terminal interface block diagram
RAMDAC BT477
640x400 lcd display
|
PDF
|
L481
Abstract: PP641
Text: IDT7130SA/LA IDT7140SA/LA CMOS DUAL-PORT RAM 8K 1Kx 8-BIT In te g ra te d D e v ic e T e c h n o lo g y , Inc. FEATURES DESCRIPTION • High-speed access — Military: 2 5 /3 5 /5 5 /1 00ns (m ax.) — Commercial: 2 5 /3 5 /5 5 /1 00ns (max.) — Commercial: 20ns 7 1 3 0 inPLCC and T Q F P
|
OCR Scan
|
IDT7130SA/LA
IDT7140SA/LA
16-or-more-bits
T7140
T7130;
IDT7140SA/LA
MIL-STD-883,
48-pin
L481
PP641
|
PDF
|
S12PWM8B8CV2
Abstract: MC9S12VRRMV2 MC9S12VR smp1 phase protection relay aimlh transistor bc 172 TIM16B8CV3 2n05e m117 code S12LINPHYV1
Text: MC9S12VR-Family Reference Manual S12 Microcontrollers MC9S12VRRMV2 Rev. 2.6 February 9, 2012 freescale.com To provide the most up-to-date information, the revision of our documents on the World Wide Web will be the most current. Your printed copy may be an earlier revision. To verify you have the latest information
|
Original
|
MC9S12VR-Family
MC9S12VRRMV2
CPU12-1
CPU12
CPU12X
27-Jtor
S12PWM8B8CV2
MC9S12VR
smp1 phase protection relay
aimlh
transistor bc 172
TIM16B8CV3
2n05e
m117 code
S12LINPHYV1
|
PDF
|
Untitled
Abstract: No abstract text available
Text: MC9S12ZVH-Family Reference Manual HCS12 Microcontrollers MC9S12ZVHRMV1 Rev. 1.00 09/2013 freescale.com To provide the most up-to-date information, the revision of our documents on the World Wide Web will be the most current. Your printed copy may be an earlier revision. To verify you have the latest information
|
Original
|
MC9S12ZVH-Family
HCS12
MC9S12ZVHRMV1
S12ZCPU
|
PDF
|
TIM16B8CV3
Abstract: No abstract text available
Text: MC9S12ZVFP-Family Reference Manual HCS12 Microcontrollers MC9S12ZVFPRMV1 Rev. 1.00 09/2013 freescale.com To provide the most up-to-date information, the revision of our documents on the World Wide Web will be the most current. Your printed copy may be an earlier revision. To verify you have the latest information
|
Original
|
MC9S12ZVFP-Family
HCS12
MC9S12ZVFPRMV1
S12ZCPU
TIM16B8CV3
|
PDF
|
S12VR Family
Abstract: No abstract text available
Text: MC9S12VR-Family Reference Manual S12 Microcontrollers MC9S12VRRMV3 Rev. 3.11 October 10, 2013 freescale.com To provide the most up-to-date information, the revision of our documents on the World Wide Web will be the most current. Your printed copy may be an earlier revision. To verify you have the latest information
|
Original
|
MC9S12VR-Family
MC9S12VRRMV3
CPU12-1
CPU12
CPU12X
S12VR Family
|
PDF
|
Untitled
Abstract: No abstract text available
Text: MC9S12ZVHY/MC9S12ZVHL Families Reference Manual HCS12 Microcontrollers MC9S12ZVHYRMV1 Rev. 1.02 3/2014 freescale.com To provide the most up-to-date information, the revision of our documents on the World Wide Web will be the most current. Your printed copy may be an earlier revision. To verify you have the latest information
|
Original
|
MC9S12ZVHY/MC9S12ZVHL
HCS12
MC9S12ZVHYRMV1
S12ZCPU
|
PDF
|
Untitled
Abstract: No abstract text available
Text: Tem ic M 67132/M 67142 MATRA MHS 2 K x 8 CMOS Dual Port RAM Description The M 67132/67142 are very low power CMOS dual port static RAMs organized as 2048 x 8. They are designed to be used as a stand-alone 8 bit dual port RAM or as a combination MASTER/SLAVE dual port for 16 bits or
|
OCR Scan
|
67132/M
QDD57D2
|
PDF
|
MC9S12VR48
Abstract: 9S12VR64 a121 do ec nv TIM16B8CV3 DBGA smp1 phase protection relay MC9S12VRRMV2 S12GMMCV1 MC9S12VR64 aimlh
Text: MC9S12VR-Family Reference Manual S12 Microcontrollers MC9S12VRRMV2 Rev. 2.8 October 2, 2012 freescale.com To provide the most up-to-date information, the revision of our documents on the World Wide Web will be the most current. Your printed copy may be an earlier revision. To verify you have the latest information
|
Original
|
MC9S12VR-Family
MC9S12VRRMV2
CPU12-1
CPU12
CPU12X
27-Jucale
MC9S12VR48
9S12VR64
a121 do ec nv
TIM16B8CV3
DBGA
smp1 phase protection relay
S12GMMCV1
MC9S12VR64
aimlh
|
PDF
|
