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Catalog Datasheet	MFG & Type	Document Tags	PDF
qfn 3x3 tray dimension Abstract: XCDAISY BFG95 XC5VLX330T-1FF1738I pcb footprint FS48, and FSG48 WS609 jedec so8 Wire bond gap XC3S400AN-4FG400I FFG676 XC4VLX25 cmos 668 fcbga Text: Device Package User Guide [Guide Subtitle] [optional] UG112 v3.5 November 6, 2009 [optional] R R Xilinx is disclosing this user guide, manual, release note, and/or specification (the "Documentation") to you solely for use in the development of designs to operate with Xilinx hardware devices. You may not reproduce, distribute, republish, download, display, post, or transmit the	Original	UG112 UG072, UG075, XAPP427, qfn 3x3 tray dimension XCDAISY BFG95 XC5VLX330T-1FF1738I pcb footprint FS48, and FSG48 WS609 jedec so8 Wire bond gap XC3S400AN-4FG400I FFG676 XC4VLX25 cmos 668 fcbga	PDF
xilinx topside marking Abstract: xilinx part marking pcb footprint FS48, and FSG48 smd code v36 CF1752 reballing recommended layout CSG324 BGA reflow guide XC2VP7 reflow profile SMD MARKING CODE C1G Text: Device Package User Guide [Guide Subtitle] [optional] UG112 v3.6 September 22, 2010 [optional] R R Xilinx is disclosing this user guide, manual, release note, and/or specification (the "Documentation") to you solely for use in the development of designs to operate with Xilinx hardware devices. You may not reproduce, distribute, republish, download, display, post, or transmit the	Original	UG112 UG072, UG075, XAPP427, xilinx topside marking xilinx part marking pcb footprint FS48, and FSG48 smd code v36 CF1752 reballing recommended layout CSG324 BGA reflow guide XC2VP7 reflow profile SMD MARKING CODE C1G	PDF
Untitled Abstract: No abstract text available Text: 123456777 123245663 123456789ABC DEF289BCBA 992424EF93953622F3675E727 !7"92#75F$9#%& '5E!239 F3E4429 99+AA92#75F$9923#E7, - ) 2#E58957F23.6EF5673"2#E22#75F$B 29*942%89B"2#E22#75F$B 2	Original	123456789ABC DEF289 F3675 F3E4429 E189/0 8957F23 EF5673 189A2BBB123456777 768949AB C52BD6E4F	PDF
Untitled Abstract: No abstract text available Text: — OBSOLETE — OBSOLETE — OBSOLETE — OBSOLETE — OBSOLETE — 187 QPro Virtex-II 1.5V Platform FPGAs DS122 v3.0 April 7, 2014 Product Specification Summary of QPro Virtex™-II Features • High-performance clock management circuitry • Industry’s first military-grade platform FPGA solution	Original	DS122 MIL-PRF-38535	PDF
XQ2V1000-4FG456 Abstract: XQ2V1000-4FG456N AF271 transistor xq2v30004cg717m CG717 AE193 matrix m21 XC2V1000-FG456 BG728 XQ2V3000 Text: R DS122 v2.0 December 21, 2007 QPro Virtex-II 1.5V Platform FPGAs Product Specification Summary of QPro Virtex™-II Features • • Industry’s first military-grade platform FPGA solution • Certified to MIL-PRF-38535 (Qualified Manufacturer Listing)	Original	DS122 MIL-PRF-38535 XQ2V1000-4FG456 XQ2V1000-4FG456N AF271 transistor xq2v30004cg717m CG717 AE193 matrix m21 XC2V1000-FG456 BG728 XQ2V3000	PDF
ULVDS25 Abstract: QPro Virtex-II EF957 IO-L93N Text: R DS122 v2.0 December 12, 2007 QPro Virtex-II 1.5V Platform FPGAs Product Specification Summary of QPro Virtex™-II Features • • Industry’s first military-grade platform FPGA solution • Certified to MIL-PRF-38535 (Qualified Manufacturer Listing)	Original	DS122 MIL-PRF-38535 BG575 XQ2V6000-5EF957I, XQ2V6000-4EF1152I, XQ2V6000-5EF1152I. CG717 CF1144 ULVDS25 QPro Virtex-II EF957 IO-L93N	PDF
BFG95 Abstract: No abstract text available Text: Device Package User Guide UG112 v3.7 September 5, 2012 R R Notice of Disclaimer The information disclosed to you hereunder (the “Materials”) is provided solely for the selection and use of Xilinx products. To the maximum extent permitted by applicable law: (1) Materials are made available "AS IS" and with all faults, Xilinx hereby DISCLAIMS ALL	Original	UG112 UG072, UG075, XAPP427, BFG95	PDF