DUAL D-TYPE FLIP-FLOP POSITIVE-EDGE TRIGGER Search Results

Contextual Info: IDT74ALVC74 3.3V CMOS DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP INDUSTRIAL TEMPERATURE RANGE 3.3V CMOS DUAL POSITIVE EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH CLEAR AND PRESET IDT74ALVC74 DESCRIPTION: FEATURES: This dual positive-edge-triggered D-type flip-flop is built using advanced

LVC74A

Contextual Info: IDT74LVC74A 3.3V CMOS DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP INDUSTRIAL TEMPERATURE RANGE 3.3V CMOS DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH CLEAR AND PRESET, 5 VOLT TOLERANT I/O IDT74LVC74A DESCRIPTION: FEATURES: This dual positive-edge-triggered D-type flip-flop is built using advanced

XCLK33

Contextual Info: IDT74ALVC74 3.3V CMOS DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP EXTENDED COMMERCIAL TEMPERATURE RANGE IDT74ALVC74 ADVANCE INFORMATION 3.3V CMOS DUAL POSITIVE EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH CLEAR AND PRESET DESCRIPTION: FEATURES: This dual positive-edge-triggered D-type flip-flop is built using advanced dual metal CMOS technology. A low level at the preset PRE or

74sc

Abstract: 74F74
Contextual Info: 54F74,74F74 54F74 74F74 Dual D-Type Positive Edge-Triggered Flip-Flop Literature Number: SNOS214A 54F 74F74 Dual D-Type Positive Edge-Triggered Flip-Flop General Description Military 74F74PC Package Number Features Y Guaranteed 4000V minimum ESD protection

SN74LS74AM

Abstract: SN74LS74A SN74LS74AD SN74LS74ADR2 SN74LS74AMEL SN74LS74AN typ25
Contextual Info: SN74LS74A Dual D-Type Positive Edge-Triggered Flip-Flop The SN74LS74A dual edge-triggered flip-flop utilizes Schottky TTL circuitry to produce high speed D-type flip-flops. Each flip-flop has individual clear and set inputs, and also complementary Q and Q

SN74LS74AN

Abstract: SN74LS74A SN74LS74AD
Contextual Info: SN74LS74A Dual D-Type Positive Edge-Triggered Flip-Flop The SN74LS74A dual edge-triggered flip-flop utilizes Schottky TTL circuitry to produce high speed D-type flip-flops. Each flip-flop has individual clear and set inputs, and also complementary Q and Q

motorola act74

Abstract: act74
Contextual Info: M MOTOROLA M C74AC74 M C74ACT74 Product Preview Dual D-Type Positive Edge-Triggered Flip-Flop DUAL D-TYPE POSITIVE EDGE-TRIGGERED FLIP-FLOP The MC74AC74/74ACT74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and com plem entary Q, Q) outputs. Information at the input is trans­

MNA423

Abstract: 74LVC74
Contextual Info: INTEGRATED CIRCUITS DATA SHEET 74ALVC74 Dual D-type flip-flop with set and reset; positive-edge trigger Product specification 2002 Nov 15 Philips Semiconductors Product specification Dual D-type flip-flop with set and reset; positive-edge trigger 74ALVC74

Contextual Info: IDT74LVC74A 3.3V CMOS DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP INDUSTRIAL TEMPERATURE RANGE 3.3V CMOS DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH CLEAR AND PRESET, 5 VOLT TOLERANT I/O IDT74LVC74A FEATURES: DESCRIPTION: • 0.5 MICRON CMOS Technology

74LV74

Abstract: 74LV74PW 74LV74 Philips
Contextual Info: INTEGRATED CIRCUITS 74LV74 Dual D-type flip-flop with set and reset; positive-edge trigger Product specification IC24 Data Handbook Philips Semiconductors 1996 Nov 07 Philips Semiconductors Product specification Dual D-type flip-flop with set and reset; positive edge-trigger

Contextual Info: 74LVC74A Dual D-type flip-flop with set and reset; positive-edge trigger Product specification IC24 Data Handbook Philips Semiconductors 1998 Jun 17 PHILIPS PHILIPS Philips Semiconductors Product Specification Dual D-type flip-flop with set and reset; positive-edge trigger

74ls74a

Abstract: 751A-02
Contextual Info: SN54/74LS74A DUAL D-TYPE POSITIVE EDGE-TRIGGERED FLIP-FLOP The SN54 / 74LS74A dual edge-triggered flip-flop utilizes Schottky TTL circuitry to produce high speed D-type flip-flops. Each flip-flop has individual clear and set inputs, and also complementary Q and Q outputs.

74LS74A

Abstract: 751A-02
Contextual Info: SN54/74LS74A DUAL D-TYPE POSITIVE EDGE-TRIGGERED FLIP-FLOP The SN54 / 74LS74A dual edge-triggered flip-flop utilizes Schottky TTL circuitry to produce high speed D-type flip-flops. Each flip-flop has individual clear and set inputs, and also complementary Q and Q outputs.

MNA423

Abstract: 74LVC74A 74LVC74AD 74LVC74ADB 74LVC74APW
Contextual Info: INTEGRATED CIRCUITS DATA SHEET 74LVC74A Dual D-type flip-flop with set and reset; positive-edge trigger Product specification Supersedes data of 1998 Jun 17 2002 Jun 18 Philips Semiconductors Product specification Dual D-type flip-flop with set and reset; positive-edge

MB2374

Abstract: Philips Semiconductors
Contextual Info: ADVANCED BiCMOS PRODUCTS MB2374 Dual octal D-type flip-flop; positive-edge trigger 3-State Product specification IC23 Philips Semiconductors August 23, 1993 Philips Semiconductors Product specification 16-bit D-type flip-flop; positive-edge trigger (3-State)

SN54LVC74A

Abstract: SN74LVC74A
Contextual Info: SN54LVC74A, SN74LVC74A DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET SCAS287H – JANUARY 1993 – REVISED JUNE 1998 D D description The SN54LVC74A dual positive-edge-triggered D-type flip-flop is designed for 2.7-V to 3.6-V VCC operation and the SN74LVC74A dual positiveedge-triggered D-type flip-flop is designed for

Contextual Info: SN54LVC74A, SN74LVC74A DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET SCAS287H – JANUARY 1993 – REVISED JUNE 1998 D D description The SN54LVC74A dual positive-edge-triggered D-type flip-flop is designed for 2.7-V to 3.6-V VCC operation and the SN74LVC74A dual positiveedge-triggered D-type flip-flop is designed for

T74LS74

Abstract: T54LS74AD2
Contextual Info: DUAL D-TYPE POSITIVE EDGETRIGGERED FLIP-FLOP DESCRIPTION The T54LS/T74LS74A dual edge-triggered flip-flop utilizes Schottky TTL circuitry to produce high speed D-type flip-flops. Each flip-flop has individual clear_and set inputs, and also complementary Q

T74LS74AB1

Abstract: T74LS74a T54LS74AD2 T74LS74
Contextual Info: DUAL D-TYPE POSITIVE EDGETRIGGERED FLIP-FLOP DESCRIPTION The T54LS/T74LS74A dual edge-triggered flip-flop utilizes Schottky TTL circuitry to produce high speed D-type flip-flops. Each flip-flop has individual clear_and set inputs, and also complementary Q

Contextual Info: SN74LVC2G80 www.ti.com SCES309F – DECEMBER 2001 – REVISED DECEMBER 2013 Dual Positive-Edge-Triggered D-Type Flip-Flop Check for Samples: SN74LVC2G80 FEATURES DESCRIPTION • This dual positive-edge-triggered D-type flip-flop is designed for 1.65-V to 5.5-V VCC operation.

Contextual Info: 54AC74,54ACT74 54AC74/54ACT74 Dual D-Type Positive Edge-Triggered Flip-Flop Literature Number: SNOS085B 54AC74/54ACT74 Dual D-Type Positive Edge-Triggered Flip-Flop Clear and Set are independent of clock Simultaneous LOW on CD and SD makes both Q and Q General Description

Contextual Info: UNISONIC TECHNOLOGIES CO., LTD U74AC74 CMOS IC DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH CLEAR AND PRESET „ DESCRIPTION The U74AC74 is a dual positive-edge-triggered D-type flip-flop. The preset PRE and clear ( CLR ) input can set or reset the

Contextual Info: SN74LVC2G79 www.ti.com SCES498E – OCTOBER 2003 – REVISED DECEMBER 2013 Dual Positive-Edge-Triggered D-Type Flip-Flop Check for Samples: SN74LVC2G79 FEATURES DESCRIPTION • This dual positive-edge-triggered D-type flip-flop is designed for 1.65-V to 5.5-V VCC operation.

Contextual Info: SN74LVC2G80 www.ti.com SCES309F – DECEMBER 2001 – REVISED DECEMBER 2013 Dual Positive-Edge-Triggered D-Type Flip-Flop Check for Samples: SN74LVC2G80 FEATURES DESCRIPTION • This dual positive-edge-triggered D-type flip-flop is designed for 1.65-V to 5.5-V VCC operation.