DUAL D FLIP-FLOP WITH PRESET AND CLEAR Search Results

62b21

Abstract: DM74AS74
Contextual Info: National Semiconductor DM74AS74 Dual D Positive-Edge-Triggered Flip-Flop with Preset and Clear General Description Features The AS74 is a dual edge-triggered flip-flops. Each flip-flop has individual D, clock^clear and preset inputs, and also complementary Q and Q outputs.

AS74

Abstract: DM74AS74 DM74AS74M DM74AS74N DM74AS74SJX M14A M14D MS-001 N14A
Contextual Info: Revised March 2000 DM74AS74 Dual D-Type Positive-Edge-Triggered Flip-Flop with Preset and Clear General Description Features The AS74 is a dual edge-triggered flip-flops. Each flip-flop has individual D, clock, clear and preset inputs, and also complementary Q and Q outputs.

ALS74A

Abstract: DM74ALS74AN DM74ALS74A DM74ALS74AM DM74ALS74ASJ LS74 M14A M14D N14A dm74als74am fairchild
Contextual Info: DM74ALS74A Dual D Positive-Edge-Triggered Flip-Flop with Preset and Clear General Description Features The ’ALS74A contains two independent positive edge-triggered flip-flops. Each flip-flop has individual D, clock, clear and preset inputs, and also complementary Q

AS74

Abstract: marking s74
Contextual Info: Revised March 2000 DM74AS74 Dual D-Type Positive-Edge-Triggered Flip-Flop with Preset and Clear General Description Features The AS74 is a dual edge-triggered flip-flops. Each flip-flop has individual D, clock, clear and preset inputs, and also complementary Q and Q outputs.

XCLK33

Contextual Info: IDT74ALVC74 3.3V CMOS DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP EXTENDED COMMERCIAL TEMPERATURE RANGE IDT74ALVC74 ADVANCE INFORMATION 3.3V CMOS DUAL POSITIVE EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH CLEAR AND PRESET DESCRIPTION: FEATURES: This dual positive-edge-triggered D-type flip-flop is built using advanced dual metal CMOS technology. A low level at the preset PRE or

S74M

Contextual Info: EM ICONDUCTO R t DM74AS74 Dual D Positive-Edge-Triggered Flip-Flop with Preset and Clear General Description Features The AS74 is a dual edge-triggered flip-flops. Each flip-flop has individual D, clock, clea r and preset inputs, and also com plem entary Q and Q outputs.

DM74ALS74A

Abstract: DM74ALS74AM DM74ALS74AN DM74ALS74ASJ LS74 M14A M14D MS-001 N14A DM74ALS74
Contextual Info: Revised February 2000 DM74ALS74A Dual D Positive-Edge-Triggered Flip-Flop with Preset and Clear General Description Features The DM74ALS74A contains two independent positive edge-triggered flip-flops. Each flip-flop has individual D, clock, clear and preset inputs, and also complementary Q

ls74

Abstract: ALS74A C1995 DM74ALS74A DM74ALS74AM DM74ALS74AN DM74ALS74ASJ M14A M14D N14A
Contextual Info: DM74ALS74A Dual D Positive-Edge-Triggered Flip-Flop with Preset and Clear General Description Features The ’ALS74A contains two independent positive edge-triggered flip-flops Each flip-flop has individual D clock clear and preset inputs and also complementary Q and Q outputs

DM74AS74

Abstract: AS74 DM74AS74M DM74AS74N M14A N14A
Contextual Info: DM74AS74 Dual D Positive-Edge-Triggered Flip-Flop with Preset and Clear General Description Features The AS74 is a dual edge-triggered flip-flops. Each flip-flop has individual D, clock, clear and preset inputs, and also complementary Q and Q outputs. n Switching specifications at 50 pF

Contextual Info: çg| National SlA Semiconductor DM74AS74 Dual D Positive-Edge-Triggered Flip-Flop with Preset and Clear General Description Features The AS74 is a dual edge-triggered flip-flops. Each flip-flop has individual 0, clock^clear and preset inputs, and also complementary Q and Q outputs.

Contextual Info: IDT74ALVC74 3.3V CMOS DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP INDUSTRIAL TEMPERATURE RANGE 3.3V CMOS DUAL POSITIVE EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH CLEAR AND PRESET IDT74ALVC74 DESCRIPTION: FEATURES: This dual positive-edge-triggered D-type flip-flop is built using advanced

Contextual Info: UNISONIC TECHNOLOGIES CO., LTD U74AC74 CMOS IC DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH CLEAR AND PRESET „ DESCRIPTION The U74AC74 is a dual positive-edge-triggered D-type flip-flop. The preset PRE and clear ( CLR ) input can set or reset the

61091

Contextual Info: DM54ALS74A/DM74ALS74A Dual D PositiveEdge-Triggered Flip-Flop with Preset and Clear General Description Features The 'ALS74A contains two independent positive edge-trig­ gered flip-flops. Each flip-flop has individual D, clock^clear and preset inputs, and also complementary Q and Q out­

Contextual Info: August 1995 DM74ALS74A Dual D Positive-Edge-Triggered Flip-Flop with Preset and Clear General Description Features The ’ALS74A contains two independent positive edge-trig­ gered flip-flops. Each flip-flop has individual D, clocK_clear and preset inputs, and also complementary Q and Q out­

Contextual Info: S E M IC O N D U C T O R tm DM74AS74 Dual D Positive-Edge-Triggered Flip-Flop with Preset and Clear General Description Features The AS74 is a dual edge-triggered flip-flops. Each flip-flop has individual D, clock, clear and preset inputs, and also complementary Q and Q outputs.

ALS74A

Abstract: LS74 DM74ALS DM74ALS74A DM74ALS74AM DM74ALS74AN DM74ALS74ASJ M14A M14D N14A
Contextual Info: 74A National Semiconductor DM74ALS74A Dual D Positive-Edge-Triggered Flip-Flop with Preset and Clear General Description Features The 'ALS74A contains two independent positive edge-trig­ gered flip-flops. Each flip-flop has individual D, clock, clear and preset inputs, and also complementary Q and <3 out­

Contextual Info: S E M IC O N D U C T O R tm DM74ALS109A Dual J-K Positive-Edge-Triggered Flip-Flop with Preset and Clear General Description Features The DM54ALS109A is a dual edge-triggered flip-flop. Each flip-flop has individual J, K, clock, clear and preset inputs, and also complementary Q and Q outputs.

Contextual Info: M MOTOROLA M ilitary 54LS74A Dual D -iype Flip-Flop With Clear and Preset ELECTRICALLY TESTED PER: MIL-M-38510/30102 H T h e 54LS74A dual edge-triggered flip-flop utilizes Schottky TTL circuitry to produce high-speed D-type flip-flops. Each flip-flop has

AS74

Abstract: DM74AS74 DM74AS74M DM74AS74N M14A N14A AD5791
Contextual Info: E M IC O N D U C T O R t DM74AS74 Dual D Positive-Edge-Triggered Flip-Flop with Preset and Clear General Description Features The AS74 is a dual edge-triggered flip-flops. Each flip-flop has individual D, clock, clea r and preset inputs, and also com plem entary Q and Q outputs.

LVC74A

Contextual Info: IDT74LVC74A 3.3V CMOS DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP INDUSTRIAL TEMPERATURE RANGE 3.3V CMOS DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH CLEAR AND PRESET, 5 VOLT TOLERANT I/O IDT74LVC74A DESCRIPTION: FEATURES: This dual positive-edge-triggered D-type flip-flop is built using advanced

MM74C74N

Abstract: AN-90 M14A MM74C74 MM74C74M MS-001 N14A
Contextual Info: Revised May 2002 MM74C74 Dual D-Type Flip-Flop General Description Features The MM74C74 dual D-type flip-flop is a monolithic complementary MOS CMOS integrated circuit constructed with N- and P-channel enhancement transistors. Each flip-flop has independent data, preset, clear and clock inputs and Q

40CMOS

Contextual Info: MM54C74,MM74C74 MM54C74 MM74C74 Dual D Flip-Flop Literature Number: SNOS336A MM54C74 MM74C74 Dual D Flip-Flop General Description The MM54C74 MM74C74 dual D flip-flop is a monolithic complementary MOS CMOS integrated circuit constructed with N- and P-channel enhancement transistors Each flipflop has independent data preset clear and clock inputs

Contextual Info: S E M IC O N D U C T O R tm DM74ALS74A Dual D Positive-Edge-Triggered Flip-Flop with Preset and Clear General Description Features The ’ALS74A contains two independent positive edge-triggered flip-flops. Each flip-flop has individual D, clock, clear and preset inputs, and also complementary Q

MM74C74J

Abstract: AN-90 C1995 J14A MM54C74 MM54C74J MM54C74N MM74C74 MM74C74N VCCe10V
Contextual Info: MM54C74 MM74C74 Dual D Flip-Flop General Description The MM54C74 MM74C74 dual D flip-flop is a monolithic complementary MOS CMOS integrated circuit constructed with N- and P-channel enhancement transistors Each flipflop has independent data preset clear and clock inputs