DDR21066 Search Results

NT5TU128M8DE

Abstract: NT5TU64M16DG nt5tu64m16dg-Bd NT5TU128M8DE-BD NT5TU256M4DE nt5tu64m NT5TU64M16 NT5TU64M16DG-3C NT5TU64M16DG-3CI NT5TU64M16DG-BE
Contextual Info: NT5TU256M4DE / NT5TU128M8DE / NT5TU64M16DG NT5TB256M4DE / NT5TB128M8DE / NT5TB64M16DG 1Gb DDR2 SDRAM Feature CAS Latency Frequency -37B/-37BI -3C/-3CI -AD/-ADI -AC/-ACI/-ACL -BE -BD DDR2-533 DDR2-667 DDR2-800 DDR2-800 DDR2-1066 DDR2-1066 4-4-4 5-5-5 6-6-6

NT5TU32M16CG-BD

Abstract: NT5TU32M16CG-be NT5TU64M8CE
Contextual Info: NT5TU128M4CE / NT5TU64M8CE /NT5TU32M16CG 512Mb DDR2 SDRAM C-Die Features • 1.8V ± 0.1V Power Supply Voltage • Data-Strobes: Bidirectional, Differential • Programmable CAS Latency: 3,4,5,6 and 7 • 4 internal memory banks • Programmable Additive Latency: 0, 1, 2, 3, and 4

W971GG6JB

Abstract: 8X12 DDR2-667 DDR2-800 0A80
Contextual Info: W971GG6JB 8M  8 BANKS  16 BIT DDR2 SDRAM Table of Contents1. GENERAL DESCRIPTION . 4 2. FEATURES . 4

MT47H128M8CF-25

Abstract: 8 resistor array 10k smd 103
Contextual Info: 1Gb: x8, x16 Automotive DDR2 SDRAM Features Automotive DDR2 SDRAM MT47H128M8 – 16 Meg x 8 x 8 banks MT47H64M16 – 8 Meg x 16 x 8 banks Options1 Features • • • • • • • • • • • • • • • • • • • Marking • Configuration

HYB18T1G160C2F-25F

Abstract: HYB18T1G400C2F-3S HYB18T1G800C2F-25F HYI18T1G160C2F-3 DDR2-800E
Contextual Info: January 2008 HY[B/I]18T1G400C2[C/F] HY[B/I]18T1G800C2[C/F] HY[B/I]18T1G160C2[C/F] 1-Gbit Double-Data-Rate-Two SDRAM DDR2 SDRAM RoHS Compliant Products Internet Data Sheet Rev. 1.02 Internet Data Sheet HY[B/I]18T1G[40/80/16]0C2[C/F] 1-Gbit Double-Data-Rate-Two SDRAM

Contextual Info: ESMT M14D5121632A 2H Operation Temperature Condition (TC) -40°C~95°C DDR II SDRAM 8M x 16 Bit x 4 Banks DDR II SDRAM Features z JEDEC Standard z VDD = 1.8V ± 0.1V, VDDQ = 1.8V ± 0.1V z VDD = 1.75V ~ 1.9V, VDDQ = 1.75V ~ 1.9V (for speed grade -1.8) z

M14D1G166

Abstract: m14d1g M14D1G1664A m14d1g16 DDRII esmt
Contextual Info: ESMT M14D1G1664A 2D 7DDR II SDRAM 8M x 16 Bit x 8 Banks DDR II SDRAM Features  JEDEC Standard  VDD = 1.8V ± 0.1V, VDDQ = 1.8V ± 0.1V  Internal pipelined double-data-rate architecture; two data access per clock cycle  Bi-directional differential data strobe (DQS, DQS ); DQS can be disabled for single-ended data strobe operation.

Contextual Info: W9712G6KB 2M  4 BANKS  16 BIT DDR2 SDRAM Table of Contents1. GENERAL DESCRIPTION . 4 2. FEATURES . 4

W971GG6KB

Abstract: W971GG6KB-3 W971GG6KB-25 W971GG6KB25
Contextual Info: W971GG6KB 8M  8 BANKS  16 BIT DDR2 SDRAM Table of Contents1. GENERAL DESCRIPTION . 4 2. FEATURES . 4

Contextual Info: Nanya Technology Corp. DDR3 L 4Gb SDRAM NT5CB(C)512M8CN / NT5CB(C)256M16CP NT5CB(C)512M8CN / NT5CB(C)256M16CP Commercial, Industrial and Automotive DDR3(L) 4Gb SDRAM Features  Signal Integrity  JEDEC DDR3 Compliant - Configurable DS for system compatibility

Contextual Info: 2Gb: x8, x16 Automotive DDR2 SDRAM Features Automotive DDR2 SDRAM MT47H256M8 – 32 Meg x 8 x 8 banks MT47H128M16 – 16 Meg x 16 x 8 banks Options1 Features • • • • • • • • • • • • • • • • • • • • Marking • Configuration

HYB18T1G400C2FL-3

Abstract: HYB18T1G400C2F-3S
Contextual Info: March 2008 HY[B/I]18T1G400C2[C/F] L HY[B/I]18T1G800C2[C/F](L) HY[B/I]18T1G160C2[C/F](L) 1-Gbit Double-Data-Rate-Two SDRAM DDR2 SDRAM Internet Data Sheet Rev. 1.20 Internet Data Sheet HY[B/I]18T1G[40/80/16]0C2[C/F](L) 1-Gbit Double-Data-Rate-Two SDRAM Revision History: Rev. 1.20, 2008-03

Contextual Info: PRELIMINARY V59C1G01 408/808/168 QA HIGH PERFORMANCE 1Gbit DDR2 SDRAM 8 BANKS X 32Mbit X 4 (408) 8 BANKS X 16Mbit X 8 (808) 8 BANKS X 8Mbit X 16 (168) 3 25A 25 19A DDR2-667 DDR2-800 DDR2-800 DDR2-1066 Clock Cycle Time (tCK3) 5ns 5ns 5ns 5ns Clock Cycle Time (tCK4)

DDR2-667C

Abstract: tls 106-6
Contextual Info: June 2008 HYB18T 1G 400C 4 F HYB18T 1G 800C 4 F HYB18T 1G 160C 4 F 1-Gbit Double-Data-Rate-Two SDRAM DDR2 SDRAM EU RoHS Compliant Products Advance Internet Data Sheet Rev. 0.50 Advance Internet Data Sheet HYB18T1G[40/80/16]0C4F 1-Gbit Double-Data-Rate-Two SDRAM

Contextual Info: PRELIMINARY V59C1G01 408/808/168 QA HIGH PERFORMANCE 1Gbit DDR2 SDRAM 8 BANKS X 32Mbit X 4 (408) 8 BANKS X 16Mbit X 8 (808) 8 BANKS X 8Mbit X 16 (168) 5 37 3 25 18 DDR2-400 DDR2-533 DDR2-667 DDR2-800 DDR2-1066 Clock Cycle Time (tCK3) 5ns 5ns 5ns 5ns 5ns Clock Cycle Time (tCK4)

Contextual Info: November 2007 HYB18T C1G 80 0 CF HYB18T C1G 16 0 CF 1-Gbit Double-Data-Rate-Two SDRAM DDR2 SDRAM RoHS Compliant Products Advance Internet Data Sheet Rev. 0.51 Date: 2007-12-13 Advance Internet Data Sheet HYB18TC1G[80/16]0CF 1-Gbit Double-Data-Rate-Two SDRAM

Contextual Info: V59C1256 404/804/164 QI HIGH PERFORMANCE 256 Mbit DDR2 SDRAM 4 BANKS X 16Mbit X 4 (404) 4 BANKS X 8Mbit X 8 (804) 4 BANKS X 4Mbit X 16 (164) 37 3 25A 25 19A DDR2-533 DDR2-667 DDR2-800 DDR2-800 DDR2-1066 Clock Cycle Time (tCK3) 5ns 5ns 5ns 5ns 5ns Clock Cycle Time (tCK4)

Contextual Info: V59C1G01 808/168 QC HIGH PERFORMANCE 1Gbit DDR2 SDRAM 8 BANKS X 16Mbit X 8 (808) 8 BANKS X 8Mbit X 16 (168) 37 3 25A 25 19A DDR2-533 DDR2-667 DDR2-800 DDR2-800 DDR2-1066 Clock Cycle Time (tCK3) 5ns 5ns 5ns 5ns 5ns Clock Cycle Time (tCK4) 3.75ns 3.75ns 3.75ns

HYB18TC512160CF-19F

Abstract: HYB18TC512160CF
Contextual Info: July 2008 HYB18T C51280 0 CF HYB18T C51216 0 CF 512-Mbit Double-Data-Rate-Two SDRAM DDR2 SDRAM EU RoHS Compliant Products Internet Data Sheet Rev. 1.10 Internet Data Sheet HYB18TC512[80/16]0CF 512-Mbit Double-Data-Rate-Two SDRAM Revision History: Rev. 1.10, 2008-07

ddr2 ram repair

Abstract: lpddr2 lpddr2 datasheet JESD209 Jedec JESD209 JESD208 intel lpddr2 JESD209-2 ddr ram repair JESD*208
Contextual Info: Agilent Technologies N5413B DDR2 and LPDDR2 Compliance Test Application for Infiniium 9000 and 90000 Series Oscilloscope Data Sheet Test, debug and characterize your DDR2 and LPDDR2 designs quickly and easily The Agilent Technologies N5413B DDR2 and LPDDR2 compliance test

H9ccnnn

Abstract: H9CKNNNB H5MS1G22AFRE3M H5MS2G22MFR-J3M H5MS2G62 H55S2622JFR-60M H9TKNNN2GDMP-LRNDM DDR333 H5MS2G62AFR-J3M H5MS1G22AFR-E3M
Contextual Info: Page 1 DENSI TY ORG. SPEED PART NUMBER Package FEATURE Availability 2Gb 64M x 16 166MHz H55S2G62MFP-60M FBGA 54ball 4Bank, 1.8V/ 1.8V Now 133MHz H55S2G62MFP-75M FBGA(54ball) 4Bank, 1.8V/ 1.8V Now 166MHz H55S2G22MFP-60M FBGA(90ball) 4Bank, 1.8V/ 1.8V Now 133MHz

MT47H32M16 DATA SHEET

Abstract: DDR2 16 meg x16 industrial old file for mt47h32m16 Theta JC of FBGA DDR2-400 DDR2-533 DDR2-667 DDR2-800 MT47H32M16 MT47H64M8
Contextual Info: 512Mb: x4, x8, x16 DDR2 SDRAM Features DDR2 SDRAM MT47H128M4 – 32 Meg x 4 x 4 banks MT47H64M8 – 16 Meg x 8 x 4 banks MT47H32M16 – 8 Meg x 16 x 4 banks Options1 Features • • • • • • • • • • • • • • • • • • • Configuration

H5PS1G63

Abstract: H5PS1G63EFR H5PS1G63EF H5PS1G63EFR S5 H5PS1G63EFR-XX DDR2-667 DDR2-800 H5PS1 DDR2 hynix H5PS1G63EFR-
Contextual Info: H5PS1G63EFR Series 1Gb DDR2 SDRAM H5PS1G63EFR-xxC H5PS1G63EFR-xxI H5PS1G63EFR-xxL H5PS1G63EFR-xxJ [New Product] H5PS1G63EFR-xxP H5PS1G63EFR-xxQ This document is a general product description and is subject to change without notice. Hynix Semiconductor does not assume any

09005aef82f1e6e2

Contextual Info: 512Mb: x4, x8, x16 DDR2 SDRAM Features DDR2 SDRAM MT47H128M4 – 32 Meg x 4 x 4 banks MT47H64M8 – 16 Meg x 8 x 4 banks MT47H32M16 – 8 Meg x 16 x 4 banks Options1 Features • • • • • • • • • • • • • • • • • • • Configuration