M14D1G Search Results
M14D1G Price and Stock
Elite Semiconductor Memory Technology Inc M14D1G1664AS1AGElectronic Component |
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M14D1G1664AS1AG | 836 |
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Elite Semiconductor Memory Technology Inc M14D1G1664A18BIG2SElectronic Component |
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M14D1G1664A18BIG2S | 209 |
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Elite Semiconductor Memory Technology Inc M14D1G1664A-2.5BG2S |
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M14D1G1664A-2.5BG2S | 38,330 |
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M14D1G Datasheets Context Search
Catalog Datasheet | Type | Document Tags | |
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M14D1G166
Abstract: m14d1g M14D1G1664A m14d1g16 DDRII esmt
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M14D1G1664A M14D1G166 m14d1g M14D1G1664A m14d1g16 DDRII esmt | |
Contextual Info: ESM T M14D1G1664A 2D 7DDR II SDRAM 8M x 16 Bit x 8 Banks DDR II SDRAM Features JEDEC Standard VDD = 1.8V Internal pipelined double-data-rate architecture; two data access per clock cycle Bi-directional differential data strobe (DQS, DQS ); DQS can be disabled for single-ended data strobe operation. |
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M14D1G1664A | |
Contextual Info: ESMT M14D1G1664A 2D DDR II SDRAM 8M x 16 Bit x 8 Banks DDR II SDRAM Features JEDEC Standard VDD = 1.8V ± 0.1V, VDDQ = 1.8V ± 0.1V Internal pipelined double-data-rate architecture; two data access per clock cycle Bi-directional differential data strobe (DQS, DQS ); DQS can be disabled for single-ended data strobe operation. |
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M14D1G1664A | |
Contextual Info: ESMT Preliminary M14D1G1664A (2S) DDR II SDRAM 8M x 16 Bit x 8 Banks DDR II SDRAM Features z JEDEC Standard z VDD = 1.8V ± 0.1V, VDDQ = 1.8V ± 0.1V z Internal pipelined double-data-rate architecture; two data access per clock cycle z Bi-directional differential data strobe (DQS, DQS ); DQS can be disabled for single-ended data strobe operation. |
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M14D1G1664A | |
Contextual Info: ESMT Preliminary M14D1G1664A (2S) Automotive Grade DDR II SDRAM 8M x 16 Bit x 8 Banks DDR II SDRAM Features JEDEC Standard VDD = 1.8V ± 0.1V, VDDQ = 1.8V ± 0.1V Internal pipelined double-data-rate architecture; two data access per clock cycle |
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M14D1G1664A |