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    Cypress Semiconductor CY7C133-25JC

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    CY7C1332 Datasheets (26)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF
    CY7C1332 Cypress Semiconductor 64K x 18 Synchronous Cache 3.3V RAM Original PDF
    CY7C133-20JC Cypress Semiconductor 2K x 16 Dual-Port Static RAM Original PDF
    CY7C133-20JC Cypress Semiconductor 2K x 16 Dual-Port Static RAM Scan PDF
    CY7C1332-10JC Cypress Semiconductor Cache Memory Original PDF
    CY7C1332-10JC Cypress Semiconductor 64K x 18 Synchronous Cache 3.3V RAM Scan PDF
    CY7C1332-10NC Cypress Semiconductor Cache Memory Original PDF
    CY7C1332-10NC Cypress Semiconductor 64K x 18 Synchronous Cache 3.3V RAM Scan PDF
    CY7C1332-12JC Cypress Semiconductor Cache Memory Original PDF
    CY7C1332-12JC Cypress Semiconductor 64K x 18 Synchronous Cache 3.3V RAM Scan PDF
    CY7C1332-12NC Cypress Semiconductor Cache Memory Original PDF
    CY7C1332-12NC Cypress Semiconductor 64K x 18 Synchronous Cache 3.3V RAM Scan PDF
    CY7C133-25 Cypress Semiconductor Original PDF
    CY7C133-25JC Cypress Semiconductor 2K x 16 Dual-Port Static RAM Original PDF
    CY7C133-25JC Cypress Semiconductor 2K x 16 Dual-Port Static RAM Original PDF
    CY7C133-25JC Unknown 2K x 16 Dual-Port Static RAM Original PDF
    CY7C133-25JC Cypress Semiconductor 2K x 16 Dual-Port Static RAM Scan PDF
    CY7C133-25JI Cypress Semiconductor 2K x 16 Dual-Port Static RAM Original PDF
    CY7C133-25JI Cypress Semiconductor 2K x 16 DUAL-PORT STATIC RAM Original PDF
    CY7C133-25JI Cypress Semiconductor 2K x 16 Dual-Port Static RAM Scan PDF
    CY7C1332-8JC Cypress Semiconductor Cache Memory Original PDF

    CY7C1332 Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    wa8k

    Abstract: CY7C1330AV25 CY7C1330AV25-250BGC CY7C1332AV25
    Text: CY7C1330AV25 CY7C1332AV25 PRELIMINARY 18-Mbit 512K x 36/1Mbit x 18 Pipelined Register-Register Late Write Features Functional Description • Fast clock speed: 250, 200 MHz • Fast access time: 2.0, 2.25 ns • Synchronous Pipelined Operation with Self-timed Late


    Original     		PDF CY7C1330AV25 CY7C1332AV25 18-Mbit 36/1Mbit CY7C1330AV25 CY7C1332AV25 CY7C1330AV25/CY7C1332AV25 wa8k CY7C1330AV25-250BGC

    CY7C1331

    Abstract: CY7C1332
    Text: CY7C1331 ADVANCED INFORMATION CY7C1332 64K x 18 Synchronous Cache 3.3V RAM D Features D Supports 66ĆMHz Pentium and external cache controller T procesĆ D D D sor cache systems with zero wait states D D D The CY7C1331 is designed for Intel PenĆ tium and i486 CPU-based systems; its


    Original     		PDF CY7C1331 CY7C1332 66MHz CY7C1331 CY7C1332

    intel 80486

    Abstract: CY7C1331 CY7C1332
    Text: CY7C1331 CY7C1332 ADVANCED INFORMATION 64K x 18 Synchronous Cache 3.3V RAM Features Functional Description • Supports 66-MHz Pentium processor cache systems with zero wait states • Single 3.3V power supply • 64K by 18 common I/O • Fast clock-to-output times


    Original     		PDF CY7C1331 CY7C1332 66-MHz 7C1331) 7C1332) 52-pin CY7C1331 CY7C1332 intel 80486

    51 TAG

    Abstract: f AX 1331 intel 80486 7C13 CY7C1331 CY7C1332
    Text: 1CY 7C13 32 CY7C1331 CY7C1332 ADVANCED INFORMATION 64K x 18 Synchronous Cache 3.3V RAM Features Functional Description • Supports 66-MHz Pentium processor cache systems with zero wait states • Single 3.3V power supply • 64K by 18 common I/O • Fast clock-to-output times


    Original     		PDF CY7C1331 CY7C1332 66-MHz 7C1331) 7C1332) 52-pin CY7C1331 CY7C1332 51 TAG f AX 1331 intel 80486 7C13

    Untitled

    Abstract: No abstract text available
    Text: CY7C1330AV25 CY7C1332AV25 PRELIMINARY 18-Mbit 512K x 36/1Mbit x 18 Pipelined Register-Register Late Write Features Functional Description • Fast clock speed: 250, 200 MHz • Fast access time: 2.0, 2.25 ns • Synchronous Pipelined Operation with Self-timed Late


    Original     		PDF CY7C1330AV25 CY7C1332AV25 18-Mbit 36/1Mbit 119-ball CY7C1330AV25/CY7C1332AV25

    C133-10

    Abstract: C1336 C133-14 CY7C133 CY7C143 IDT7133 IDT7143
    Text: CY7C133 CY7C143 2K x 16 Dual-Port Static RAM Features Functional Description • True dual-ported memory cells which allow simultaneous reads of the same memory location • 2K x 16 organization • 0.65-micron CMOS for optimum speed/power • High-speed access: 25/35/55 ns


    Original     		PDF CY7C133 CY7C143 65-micron CY7C133 CY7C133; 68-pin IDT7133 IDT7143 C133-10 C1336 C133-14 CY7C143 IDT7133 IDT7143

    CY7C133

    Abstract: CY7C143 IDT7133 IDT7143
    Text: CY7C133 CY7C143 2K x 16 Dual-Port Static RAM Features Functional Description • True dual-ported memory cells which allow simultaneous reads of the same memory location • 2K x 16 organization • 0.65-micron CMOS for optimum speed/power • High-speed access: 25/35/55 ns


    Original     		PDF CY7C133 CY7C143 65-micron CY7C133 CY7C133; 68-pin IDT7133 IDT7143 CY7C143 IDT7133 IDT7143

    7C13

    Abstract: CY7C133 CY7C143 IDT7133 IDT7143 bit-slice C1335
    Text: fax id: 5202 1CY 7C13 3 CY7C133 CY7C143 2K x 16 Dual-Port Static RAM Features Functional Description • True Dual-Ported memory cells which allow simultaneous reads of the same memory location • 2K x 16 organization • 0.65-micron CMOS for optimum speed/power


    Original     		PDF CY7C133 CY7C143 65-micron CY7C133 CY7C133; 68-pin IDT7133 IDT7143 7C13 CY7C143 IDT7133 IDT7143 bit-slice C1335

    CY7C133

    Abstract: CY7C143
    Text: CY7C133 CY7C143 2K x 16 Dual-Port Static RAM Features Functional Description • True dual-ported memory cells which allow simultaneous reads of the same memory location • 2K x 16 organization • 0.65-micron CMOS for optimum speed/power • High-speed access: 25/35/55 ns


    Original     		PDF CY7C133 CY7C143 65-micron CY7C133 CY7C133; 68-pin CY7C143

    Sony CXA1191M

    Abstract: philips ecg master replacement guide FZK101 YD 803 SGS FZK 101 Siemens CMC 707 am radio receiver philips ecg semiconductors master replacement guide CXA1191M ym2612 ecg semiconductors master replacement guide
    Text: Untitled HAM RADIO FILE - Various pinouts saved from the Chipdir 2010 http://www.chipdir.org/ 0512d -0512d +-\/-+ 1 -|5V in gnd in|- 24 2 -|5V in gnd in|- 23 3 -|5V in gnd in|- 22


    Original     		PDF 0512d ------------------------------------0512d z86e04 Sony CXA1191M philips ecg master replacement guide FZK101 YD 803 SGS FZK 101 Siemens CMC 707 am radio receiver philips ecg semiconductors master replacement guide CXA1191M ym2612 ecg semiconductors master replacement guide

    diode cross reference

    Abstract: IDT6168LA55LB CY7C186A-45DMB IDT CROSS REFERENCE LOGIC CY7C128A-25DMB IDT71256L45L32B IDT6168LA70LB cross reference CY7C024-55AC CY7C433-25JC
    Text: IDT/Cypress Product Cross Reference FIFOs FIFOs FIFOs CYPRESS IDT CYPRESS IDT CYPRESS CY7C419-10PC IDT7203L50P CY7C428-20PC IDT7205L50J CY7C460A-25JC IDT7200L12J CY7C419-10JC IDT7203L12P CY7C429-10PC IDT7206L15P CY7C462A-15PC IDT7200L15TP CY7C419-10PC IDT7203L12TP


    Original     		PDF CY7C419-10PC IDT7203L50P CY7C428-20PC IDT7205L50J CY7C460A-25JC IDT7200L12J CY7C419-10JC IDT7203L12P CY7C429-10PC IDT7206L15P diode cross reference IDT6168LA55LB CY7C186A-45DMB IDT CROSS REFERENCE LOGIC CY7C128A-25DMB IDT71256L45L32B IDT6168LA70LB cross reference CY7C024-55AC CY7C433-25JC

    CY7C133

    Abstract: CY7C143 IDT7133 IDT7143 C1338
    Text: 33 CY7C133 CY7C143 2K x 16 Dual-Port Static RAM Features Functional Description • True dual-ported memory cells which allow simultaneous reads of the same memory location • 2K x 16 organization • 0.65-micron CMOS for optimum speed/power • High-speed access: 25/35/55 ns


    Original     		PDF CY7C133 CY7C143 65-micron CY7C133 CY7C133; 68-pin IDT7133 IDT7143 CY7C143 IDT7133 IDT7143 C1338

    cy3341

    Abstract: 64K X 4 CACHE SRAM CY7C190 pasic380 cy7c189 palce22v10 programming guide palce16v8 programming algorithm STATIC RAM 6264 vhdl code for 8-bit parity checker 64x18 synchronous sram
    Text: Product Selector Guide Static RAMs Organization/Density Density X1 X4 X4 SIO 7C147 2147 7C123 7C148 7C149 7C150 7C189 7C190 2148 2149 7C122 9122 93422 7C167A 7C168A 7C169A 7C170A 7C171A 7C172A 7C128A 7C187 7C164 7C166 7C161 7C162 7C185 6264 7C182 7C197 7C194


    Original     		PDF 7C147 7C123 7C148 7C149 7C150 7C189 7C190 7C122 7C167A 7C168A cy3341 64K X 4 CACHE SRAM CY7C190 pasic380 cy7c189 palce22v10 programming guide palce16v8 programming algorithm STATIC RAM 6264 vhdl code for 8-bit parity checker 64x18 synchronous sram

    Untitled

    Abstract: No abstract text available
    Text: rr o v o iu ii. iTivyi luciy, wai lucu y io , 1990 CY7C1331 CY7C1332 MAR ^•éS « •Ktf .• mm? vssê ADVANCED INFORMATION CYPRESS SEMICONDUCTOR Features 64K x 18 Synchronous Cache 3.3V RAM • Synchronous self-timed write • Direct interface with the processor


    OCR Scan     		PDF CY7C1331 CY7C1332 52-pin 50-MHz 14-ns 85-pF 7C1331) 7C1332)

    Untitled

    Abstract: No abstract text available
    Text: CY7C1331 CY7C1332 ADVANCED INFORMATION 64K x 18 Synchronous Cache 3.3 V RAM Direct interface with the processor and external cache controller Asynchronous output enable JEDEC-standard pinout 52-pin PLCC and PQFP packaging Features • Supports 66-MHz Pentium proces­


    OCR Scan     		PDF CY7C1331 CY7C1332 66-MHz 7C1331) 7C1332) 52-pin

    Untitled

    Abstract: No abstract text available
    Text: CYPRESS ADVANCED INFORMATION 64K x 18 Synchronous Cache 3.3V RAM The CY7C1331 is designed for Intel Pen­ tium and i486 CPU—based systems; its counter follows the burst sequence of the Pentium and the i486 processors. The CY7C1332 is architected for processors


    OCR Scan     		PDF CY7C1331 CY7C1332 CY7C1331â CY7C1332â 52-Lead

    Untitled

    Abstract: No abstract text available
    Text: 5 / CYPRESS CY7C1331 CY7C1332 ADVANCED INFORMATION 64K x 18 Synchronous Cache 3.3V RAM F e a tu re s • D irect interface with th e processor and external cache controller S upports 66-M H z P en tiu m proces­ sor cache system s w ith zero w ait states


    OCR Scan     		PDF CY7C1332) CY7C1331 CY7C1332 52-pin

    Untitled

    Abstract: No abstract text available
    Text: CY7C1331 CY7C1332 ADVANCED INFORMATION P Y P P F ^ c : Features • Supports 50-MHz Pentium 1processor cache systems with zero wait states • Direct interface with the processor and external cache controller • Asynchronous output enable • JEDEC-standard pinout


    OCR Scan     		PDF CY7C1331 CY7C1332 50-MHz 85-pF 7C1331) 7C1332) 52-pin --16JC

    kx-5t

    Abstract: ZTE0
    Text: bSE D • SSÖ'ibbS QGlüllH Features • Supports 50-MHz Pentium proces­ sor cache systems with zero wait states • 64K by 18 common I/O • Fast clock-to-output times — 12.5 ns with 0-pF load —■ 14 ns with 85-pF load • Two-bit w raparound counter support­


    OCR Scan     		PDF CY7C1331 CY7C1332 50-MHz 85-pF 7C1331) 7C1332) 52-pin kx-5t ZTE0

    Untitled

    Abstract: No abstract text available
    Text: fax id: 5202 CY7C133 0Y70143 izzazzaar iir ^~-n m n f» o o w r 1 , 1 I n = ~- 2 K x 16 Dual-Port Static RAM Features Functional Description • True Dual-Ported memory cells which allow sim ultaneous reads of the same m em ory location • 2K x 16 organization


    OCR Scan     		PDF CY7C133 0Y70143 65-micron CY7C133 CY7C143 CY7C133; 68-pin IDT7133 IDT7143

    CY7C133

    Abstract: CY7C143 IDT7133
    Text: fax id: 5202 —— — Æ j r r ~ 'f V D I 1 CY7C133 CY7C143 D 17 Q Q IT C O O 2K x 16 Dual-Port Static RAM Functional Description Features • True Dual-Ported memory cells which allow simultaneous reads of the same m em ory location • 2K x 16 organization


    OCR Scan     		PDF CY7C133 CY7C143 65-micron CY7C133; 68-pin IDT7133 andIDT7143 CY7C143

    tcl 2272

    Abstract: 80486 microprocessor block diagram and pin diagram CY7C1331 CY7C1332 zl9j
    Text: CYPRESS ADVANCED INFORMATION 64K x 18 Synchronous Cache 3.3V RAM • Direct interface with the processor and external cache controller • Asynchronous output enable • JEDEC-standard pinout • 52-pin PLCC and PQFP packaging Featu res • Supports 66-MHz Pentium proces­


    OCR Scan     		PDF CY7C1331 CY7C1332 66-MHz CY7C1331) CY7C1332) 52-pin CY7C1332 CY7C1331 52-Lead tcl 2272 80486 microprocessor block diagram and pin diagram zl9j

    Untitled

    Abstract: No abstract text available
    Text: Revision: Monday, January 18, 1993 2 5 0 ^ 2 CYPRESS SEMI CONDUCTOR oooinzi 57E Features •• 64K x 18 Synchronous Cache 3.3V RAM • Synchronous self-timed write • Direct interface with the processor and external cache controller • Asynchronous output enable


    OCR Scan     		PDF CY7C1331 CY7C1332 50-MHz 14-ns 85-pF 7C1331) 7C1332) 52-pin

    Untitled

    Abstract: No abstract text available
    Text: fax id: 5202 p vXpX : v « *1 CY7C133 CY7C143 - 2K x 16 Dual-Port Static RAM Features Functional Description • True Dual-Ported memory cells w hich allow sim ultaneous reads of the same m em ory location • 2K x 16 organization • 0.65-micron CMOS fo r optim um speed/power


    OCR Scan     		PDF CY7C133 CY7C143 CY7C143 16-bit 32-bit