CY7C1324 Search Results

Contextual Info: CY7C1324H 2-Mbit 128K x 18 Flow-Through Sync SRAM Features • 128K x 18 common I/O • 3.3V core power supply • 3.3V/2.5V I/O supply • Fast clock-to-output times — 6.5 ns (133-MHz version) • Provide high-performance 2-1-1-1 access rate • User-selectable burst counter supporting Intel

Contextual Info: PRELIMINARY CY7C1324H 2-Mbit 128K x 18 Flow-Through Sync SRAM Features • 128K x 18 common I/O • 3.3V –5% and +10% core power supply (VDD) • 3.3V I/O supply (VDDQ) • Fast clock-to-output times — 6.5 ns (133-MHz version) — 8.0 ns (100-MHz version)

CY7C1324

Abstract: intel 80486 pin diagram
Contextual Info: 324 CY7C1324 3.3V 128K x 18 Synchronous Cache RAM Features Functional Description • Supports 117-MHz microprocessor cache systems with zero wait states • 128K by 18 common I/O • Fast clock-to-output times — 7.5 ns 117 MHz • Two-bit wrap-around counter supporting either interleaved or linear burst sequence

INTEL 80,82

Abstract: intel 80.82 intel 8082 80.82 intel
Contextual Info: CY7C1324 3.3V 128K x 18 Synchronous Cache RAM Features Functional Description • Supports 117-MHz microprocessor cache systems with zero wait states • 128K by 18 common I/O • Fast clock-to-output times — 7.5 ns 117 MHz • Two-bit wrap-around counter supporting either interleaved or linear burst sequence

CY7C1324H

Contextual Info: CY7C1324H 2-Mbit 128K x 18 Flow-Through Sync SRAM Features • 128K x 18 common I/O • 3.3V core power supply • 3.3V/2.5V I/O supply • Fast clock-to-output times — 6.5 ns (133-MHz version) • Provide high-performance 2-1-1-1 access rate • User-selectable burst counter supporting Intel

A101

Abstract: CY7C1324F CY7C1324F-117AC CY7C1324F-117AI CY7C1324F-133AC
Contextual Info: CY7C1324F 2-Mb 128K x 18 Flow-Through Sync SRAM Features • 128K x 18 common I/O • 3.3V –5% and +10% core power supply (VDD) • 3.3V I/O supply (VDDQ) • Fast clock-to-output times — 6.5 ns (133-MHz version) — 7.5 ns (117-MHz version) • Provide high-performance 2-1-1-1 access rate

80486 microprocessor block diagram and pin diagram

Abstract: CY7C1324
Contextual Info: CYPRESS CY7C1324 3.3V 128K x 18 Synchronous Cache RAM Features Functional Description • S u p p o rts 117 -M H z m icro p ro c ess o r c a ch e s y ste m s w ith zero w ait states T he C Y 7 C 1 324 is a 3.3V, 128K by 18 synch ron ous cache RAM d e sig ned to interface w ith high-speed m icro proce ssors

intel 80.82

Abstract: INTEL 80,82 80486 microprocessor block diagram and pin diagram 80486 microprocessor description CY7C1324 CODE STD NC
Contextual Info: PRELIMINARY CY7C1324 3.3V 128K x 18 Synchronous Cache RAM Features Functional Description • Supports 117-MHz microprocessor cache systems with zero wait states • 128K by 18 common I/O • Low Standby Power 3.3 mW, L version • Fast clock-to-output times

Contextual Info: CY7C1324H 2-Mbit 128K x 18 Flow-Through Sync SRAM Functional Description[1] Features • 128K x 18 common I/O • 3.3V core power supply • 3.3V I/O supply • Fast clock-to-output times — 6.5 ns (133-MHz version) • Provide high-performance 2-1-1-1 access rate

CY7C1324H

Contextual Info: CY7C1324H 2-Mbit 128K x 18 Flow-Through Sync SRAM Features • 128K x 18 common I/O • 3.3V core power supply • 3.3V/2.5V I/O supply • Fast clock-to-output times — 6.5 ns (133-MHz version) • Provide high-performance 2-1-1-1 access rate • User-selectable burst counter supporting Intel

Contextual Info: THIS SPEC IS OBSOLETE Spec No: 001-00208 Spec Title: CY7C1324H 2-MBIT 128K X 18 FLOW-THROUGH SYNC SRAM Sunset Owner: Jayasree Nayar (njy) Replaced by: NONE CY7C1324H 2-Mbit (128 K x 18) Flow-Through Sync SRAM 2-Mbit (128 K × 18) flow-through Sync SRAM

A101

Abstract: CY7C1324F CY7C1324F-117AC CY7C1324F-117AI CY7C1324F-133AC
Contextual Info: CY7C1324F 2-Mb 128K x 18 Flow-Through Sync SRAM Features • 128K x 18 common I/O • 3.3V –5% and +10% core power supply (VDD) • 3.3V I/O supply (VDDQ) • Fast clock-to-output times — 6.5 ns (133-MHz version) — 7.5 ns (117-MHz version) • Provide high-performance 2-1-1-1 access rate

INTEL 80,82

Abstract: intel 80.82 CEF 83 A 3 CY7C1324 pinout diagram of 80486 definition 7C1324-100 intel 8082 80.82 intel INTEL 80-82
Contextual Info: fax id: 1090 PRELIMINARY CY7C1324 3.3V 128K x 18 Synchronous Cache RAM Functional D escription F eatu res • S u p p o rts 117-M H z m icro p ro c ess o r c a ch e s y ste m s w ith zero w ait states T he C Y 7 C 1324 is a 3 .3 V 128 K by 18 synch ron ous cache RAM

Contextual Info: CY7C1324H 2-Mbit 128 K x 18 Flow-Through Sync SRAM 2-Mbit (128 K × 18) flow-through Sync SRAM Features Functional Description • 128 K × 18 common I/O ■ 3.3 V core power supply ■ 3.3- / 2.5-V I/O supply ■ Fast clock-to-output times ❐ 6.5 ns (133 MHz version)

Contextual Info: CY7C1324H 2-Mbit 128 K x 18 Flow-Through Sync SRAM 2-Mbit (128 K × 18) flow-through Sync SRAM Features Functional Description • 128 K × 18 common I/O ■ 3.3 V core power supply ■ 3.3- / 2.5-V I/O supply ■ Fast clock-to-output times ❐ 6.5 ns (133 MHz version)

Contextual Info: CY7C1324A 128K x 18 Synchronous Flow-thru Burst SRAM Features gated by registers controlled by a positive-edge-triggered Clock Input CLK . The synchronous inputs include all addresses, all data inputs, address-pipelining Chip Enable (CE), depth-expansion Chip Enables (CE2 and CE2), Burst

INTEL 80,82

Abstract: intel 80.82 80486 microprocessor pin out diagram 80486 80486 microprocessor block diagram and pin diagram 80486 microprocessor description 80486 microprocessor features intel 80486 CY7C1324 intel 8082
Contextual Info: fax id: 1090 PRELIMINARY CY7C1324 3.3V 128K x 18 Synchronous Cache RAM Features Functional Description • Supports 117-MHz microprocessor cache systems with zero wait states • 128K by 18 common I/O • Low Standby Power 3.3 mW, L version • Fast clock-to-output times

Contextual Info: CY7C1324A 128K x 18 Synchronous Flow-thru Burst SRAM Features gated by registers controlled by a positive-edge-triggered Clock Input CLK . The synchronous inputs include all addresses, all data inputs, address-pipelining Chip Enable (CE), depth-expansion Chip Enables (CE2 and CE2), Burst

smd transistor w16

Abstract: transistor smd w16 PALC22V10B-15DMB 256K x 8 SRAM CY7C128A SRAM PALC22V10B-20DMB Mil JAN jm38510 Cross Reference smd cross reference smd w20 CY7C245-45WMB 455b
Contextual Info: SMD Cross Reference Listed below are the SMDs for which Cypress is an approved source of supply. Please contact your local Cypress representative or see the Cypress website www.cypress.com for the latest SMD update. All part numbers that have an X in the PPL (Preferred

CY7C132

Abstract: CY7C136 CY7C146
Contextual Info: CY7C132/CY7C136 CY7C142/CY7C146 2K x 8 Dual-Port Static RAM Features Functional Description • True Dual-Ported memory cells which allow simultaneous reads of the same memory location The CY7C132/CY7C136/CY7C142 and CY7C146 are high-speed CMOS 2K by 8 dual-port static RAMs. Two ports

Z1213

Abstract: CY7C132 CY7C136 CY7C146 zl12
Contextual Info: bSE » CYPRESS SEMICONDUCTOR SSÖ'lbbE 0 0 0 ^ 7 4 7 ISb I CYP CY7C132/CY7C136 CY7C142/CY7C146 CYPRESS SEMICONDUCTOR 2K x 8 Dual-Port Static RAM output enable OE . BUSY flags are pro­ vided on each port. In addition, an interrupt Functional Description Features

CY7C136

Abstract: CY7C132 CY7C146 2Kx8 Dual-Port Static RAM z1013 CY7C132-55PI CY7C136-55NC
Contextual Info: fax id: 5201 C Y 7 C 1 3 2 /C Y 7 C 1 3 6 C Y 7 C 1 4 2 /C Y 7 C 1 4 6 2Kx8 Dual-Port Static RAM Features Functional Description • True Dual-Ported memory cells which allow sim ulta­ neous reads of the sam e memory location • 2K x 8 organization • 0.65-micron CMOS fo r optimum speed/power

CY7C4271-JC

Abstract: cypress 98267 9832 CY5037
Contextual Info: CYPRESS SEMICONDUCTOR CORPORATION PRODUCT RELIABILITY REPORT QUARTER 4, 1998 PERFORM PER THE REQUIREMENT OF 25-00008, RELIABILITY MONITOR PROGRAM SPECIFICATION Ed Russell Reliability Manager CYPRESS SEMICONDUCTOR CORPORATION PRODUCT RELIABILITY REPORT Quarter 4, 1998

30l3l

Contextual Info: CY7C132/CY7C136 CY7C142/CY7C146 CYPRESS SEMICONDUCTOR F eatures F unctional D escription • 0.8-micron CMOS for optimum speed/power • Automatic power-down • TTL compatible • Capable of withstanding greater than 2001V electrostatic discharge • Fully asynchronous operation