CAPACITANCE14 Search Results

4-28UNF

Contextual Info: CASE FINISH SOLDER CURRENT AMPS 0 .3 WORKING VOLTAGE -55 *C TD +85*C AC -55'C TD +125'C DC AC DC 50 MAXIMUM VOLTAGE DROP MAXIMUM DC RESISTANCE (OHMS) 28 DC 2.3 AC MIN, INSERTION LOSS PER MIL-STD-220 MINIMUM FULL LOAD. +25*C CAPACITANCE14 30 75 1 0 0 150 300 500 1

Contextual Info: CASE FINISH WORKING VOLTAGE CURRENT AMPS SO LD ER 1 -55 *C TD +85*C AC 24012400Hz DC 350 AC DC 240Ê400Hz MAXIMUM VOLTAGE DROP MAXIMUM DC RESISTANCE (OHMS) -55'C TD +125'C 300 0 ,60 DC AC MIN, INSERTION LOSS PER MIL-STD-220 MINIMUM FULL LOAD. +25*C CAPACITANCE14

Contextual Info: ISSP IS28F002BV/BLV 262,144 x 8 SmartVoltage BOOT BLOCK FLASH MEMORY • SmartVoltage Technology — 5V or 12V Program/Erase — 2.7V, 3.3V or 5V Read Operation A u to m a te d B y te W rite an d B lo c k E rase — In d u s try -S ta n d a rd C o m m a n d U ser

th 2167

Abstract: 2167 memory
Contextual Info: inteT 2167 HIGH SPEED 16,384 x 1 BIT STATIC RAM 2167-55 2167-70 2167L-70 2167-10 55 70 70 100 125 125 90 90 40 40 30 30 Max. Access Time ns Max. Active Current (mA) Max. Standby Current (mA) 0.8-2.0V Output Timing Reference Levels 2141/2147 Upgrade Double Poly HMOS II Technology

DN25D

Abstract: pt100 sensors SENSYM AD7707 AD7707BR AD7707BRU AD780 EVAL-AD7707EB RU-20
Contextual Info: a 3 V/5 V, ؎10 V Input Range, 1 mW 3-Channel 16-Bit, Sigma-Delta ADC AD7707 FEATURES Charge Balancing ADC 16 Bits No Missing Codes 0.003% Nonlinearity High Level ؎10 V and Low Level (؎10 mV) Input Channels True Bipolar ؎100 mV Capability on Low Level Input

1001d

Contextual Info: CYPRESS PRELIMINARY C Y 7 C 95 4D X ATM HOTLink Transceiver Features technology, functionality, and integration over the field proven CY7B923/933 HOTLink. Second generation HOTLink technology UTOPIA level I and II compatible host bus interface Three-bit Multi-phy address capability built-in

Contextual Info: Ether Module -EM2C 10Base-2 Technology, Incorporated Ethernet Transceiver Module with on Board Isolation Transformer & DC/DC Converter A p ril 1994 Introduction The Thin N e t C heapernet m odule p ro vid e s a com plete L o c a l A re a N e tw o rk in terfa ce fo ra station, w itho u t a tra n s­

Contextual Info: 83C92A SEEQ Ethernet Transceiver T echnology, Incorporated April 1994 Introduction The 83C92A is an Ethernet and Thin Net Cheapernet Transceiver that provides a complete Local Area Network interface for a station, with or without a transceiver cable, see Figure 1.

Contextual Info: SEEQ 8 3 C 9 2 A Ethernet Transceiver Technology Incorporated April 23, 1996 Introduction The 83C92A is an Ethernet and Thin Net Cheapemet Transceiver that provides a complete Local Area Network interface for a station, with o r without a transceiver cable,

Contextual Info: fax id: 1047 C Y 7 C 1 0 9 C Y 7 C 1 0 0 9 w / C Y P R E S S 128K x 8 Static RAM Features active HIG H chip enable C E 2 , an active LO W o u tp u t enable (OE), and th re e -sta te drivers. W riting to the device is acco m plished by takin g chip enable one (CE-|) and w rite enable (WE)

ad7712

Abstract: AD7712AN AD7712AQ AD7712AR AD7712AR-REEL7 AD7712SQ
Contextual Info: LC2MOS Signal Conditioning ADC AD7712* FEATURES Charge Balancing ADC 24 Bits No Missing Codes ؎0.0015% Nonlinearity High Level and Low Level Analog Input Channels Programmable Gain for Both Inputs Gains from 1 to 128 Differential Input for Low Level Channel

Intel 2147H

Abstract: intel 2147 2147 intel 2147H 2147H-1 2147H-2 2147H-3 2147HL 2147HL-3
Contextual Info: in te i 2147H HIGH SPEED 4096 x 1 BIT STATIC RAM 2147H-2 2147H-3 2147HL-3 2147H 35 45 55 55 70 70 Max. Active Current mA 180 180 180 125 160 140 Max. Standby Current (mA) 30 30 30 15 20 10 2147H-1 Max. Access Time (ns) Pinout, Function, and Power Com­ patible to Industry Standard 2147

P80A49H

Abstract: 8035HL F1L 250 V fuse BPK-70 interfacing 8275 crt controller with 8086 i8282 hall marking code A04 Transistor AF 138 DK55 82720 intel
Contextual Info: COMPONENT DATA CATALOG JANUARY 1982 Intel C orporation makes no w arranty fo r the use of its products and assumes no re sponsib ility fo r any e rrors w hich may appear in th is docum ent nor does it make a com m itm ent to update the info rm atio n contained herein.

7C172

Contextual Info: CY7C171 CY7C172 CYPRESS SEMICONDUCTOR 4096 x 4 Static R/W RAM Separate I/O Features Functional Description • A u tom atic pow er-dow n w hen d esele cted T h e C Y 7C 171 and C Y 7C 1 7 2 are high-per­ form an ce C M O S static R A M s organ ized as 4096 by 4 bits w ith sep arate I/O . E asy

ue09

Abstract: CY7B180-12GC cd 2313 UE 09
Contextual Info: CY7B180 CY7B181 AD VAN C ED IN F O R M A T IO N CYPRESS SEMICONDUCTOR 4K x 18 Cache Tag Features Functional Description • 4K x 18 tag organization T h e CY7B180 and CY7B181 are high-perform ance B iCM O S cache tag R A M s orga­ nized as 40% words by 18 bits. Each word

K74 PACKAGE DIAGRAM

Abstract: IR 10e 1h
Contextual Info: = ^~' _ = p r e l im in a r y . ^ SEMICONDUCTOR Features • CY10E494 CY100E494 CY101E494 16,384 x 4 bits organization • Ultra high speed/standard power — tAA = 7 ns — I f E — 180 mA 16,384 x 4 ECL Static RAM • Open emitter output for ease of

80C51

Abstract: 83C552 87C552 GQCC1-J68 timer highspeed a81s ABA12
Contextual Info: Philips Semiconductors Military Microcontroller Products Product specification Single-chip 8-bit EPROM microcontroller with 10-bit A/D, capture compare timer, high-speed outputs, PWM CFEATURES 87C552 PIN CONFIGURATION • 80C51 central processing unit • 8k x 8 EPROM expandable externally to 64k bytes

F-3102L

Abstract: kemet cap mica symposium
Contextual Info: The Battle for Maximum Volumetric Efficiency - Part 1: When Technologies Compete, Customers Win Randy Hahn, Mike Randall and Jonathan Paulsen KEMET Electronics Corp PO Box 5928 Greenville, SC 29606 Tel: +1 864-963-6300 Fax: +1 864-228-4333 randyhahn@kemet.com

la 76805 volt on pin

Abstract: intel 8708 eprom M3002 Pulse M3001 eprom 8708 2316a rom UPP-103 interfacing 8275 crt controller with 8086 intel 1402a Pascall
Contextual Info: Intel Corporation 3065 Bowers Avenue • Santa Clara, CA 95051 Telephone: 408 987-8080 TWX: 910-338-0026- Telex: 34-6372 inter Component Data Catalog 1978 Numerical and Functional Indexes 1 General Information 2 Random Access Memory 3 Read Only Memory 4

Contextual Info: CY7B326 PRELIMINARY CYPRESS SEMICONDUCTOR Multipurpose BiCMOS PLD Features Functional Description • 16 I/O macrocells, each having: — Program m able com binatorial syn­ chronous and asynchronous modes — Registers configurable to T-type and D-type — Array feedback from I/O pin or

Contextual Info: IS28F200BV/BLV 131,072 x 16/262,144 x 8 SmartVoltage BOOT BLOCK FLASH MEMORY ADVANCE INFORMATION NOVEMBER 1996 • SmartVoltage Technology — 5V or 12V Program/Erase — 2.7V, 3.3V o r 5V Read Operation • High-Performance Read Maximum Access Tim es — 5V: 60/80/120 ns

ad7705 bridge

Abstract: 540-6601 AD7705 AD7706 AD780 REF192 ad7705 68hc11 rtd pt100 interface to 8051 AD7705BR-REEL
Contextual Info: 3 V/5 V, 1 mW, 2-/3-Channel, 16-Bit, Sigma-Delta ADCs AD7705/AD7706 Rev. B Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use.

7B164-15

Abstract: 910U
Contextual Info: _ PRELIM INARY SEMICONDUCTOR 16,384 x 4 Static R/W RAM Features Functional Description • BiCMOS for optimum speed/power • High speed - 10 ns t* T he CY7B164 and CY7B166 are high-performance BiCMOS static RAMs organized as 16,384 x 4 bits. These RAMs are devel­

2191F

Contextual Info: _CY7C170A = ? SEMICONDUCTOR = 4096 x 4 Static R/W RAM Features Functional Description • CM OS for optim um speed/power T he CY7C170A is a high-performance CMOS static RAM organized as 4096 words by 4 bits. Easy memory expansion is