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    BA2 CODE Search Results

    BA2 CODE Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    TC4511BP Toshiba Electronic Devices & Storage Corporation CMOS Logic IC, BCD-to-7-Segment Decoder, DIP16 Visit Toshiba Electronic Devices & Storage Corporation
    54184J/B Rochester Electronics LLC 54184 - BCD to Binary Converters Visit Rochester Electronics LLC Buy
    74184N Rochester Electronics LLC 74184 - BCD to Binary Converters Visit Rochester Electronics LLC Buy
    74185AN Rochester Electronics LLC 74185 - Binary to BCD Converters Visit Rochester Electronics LLC Buy
    54185AJ/B Rochester Electronics LLC 54185A - Binary to BCD Converters Visit Rochester Electronics LLC Buy

    BA2 CODE Datasheets Context Search

    Catalog Datasheet Type Document Tags PDF

    DA2B105

    Abstract: No abstract text available
    Text: 30/08/2013 Wrap & Fill, Axial Leads, Oval RA2, DA2, BA2 Series Search Products Applications Industries Partners Support About Us You are here: Home > Products > Film Capacitors > Metallized Polycarbonate > Wrap & Fill, Axial Leads, Oval (RA2, DA2, BA2 Series)


    Original     		ROUND-CYLINDRICA100 com/category-s/105 DA2B105 PDF

    NT5CC256

    Abstract: NT5CB256M8GN- CG
    Text: 2Gb DDR3 SDRAM G-Die NT5CB512M4GN / NT5CB256M8GN NT5CC512M4GN / NT5CC256M8GN Feature  1.35V -0.0675V/+0.1V & 1.5V ± 0.075V JEDEC  Output Driver Impedance Control Standard Power Supply  Differential bidirectional data strobe  8 Internal memory banks (BA0- BA2)


    Original     		NT5CB512M4GN NT5CB256M8GN NT5CC512M4GN NT5CC256M8GN 78Balls NT5CC256 NT5CB256M8GN- CG PDF

    NT5CC256

    Abstract: No abstract text available
    Text: 2Gb DDR3 SDRAM G-Die NT5CB512M4GN / NT5CB256M8GN NT5CC512M4GN / NT5CC256M8GN Feature  1.35V -0.0675V/+0.1V & 1.5V ± 0.075V JEDEC  Output Driver Impedance Control Standard Power Supply  Differential bidirectional data strobe  8 Internal memory banks (BA0- BA2)


    Original     		NT5CB512M4GN NT5CB256M8GN NT5CC512M4GN NT5CC256M8GN 78Balls NT5CC256 PDF

    NT5CB256

    Abstract: srt 8n JESD79-3 NT5CB128M8CN NT5CB128M8CN-CG NT5CB128M TI ddr3 controller datasheet NT5CB128
    Text: 1Gb DDR3 SDRAM C-Die NT5CB256M4CN / NT5CB128M8CN Feature  1.5V ± 0.075V JEDEC Standard Power Supply  Write Leveling  8 Internal memory banks (BA0- BA2)  OCD Calibration  Differential clock input (CK, )  Dynamic ODT (Rtt_Nom & Rtt_WR)


    Original     		NT5CB256M4CN NT5CB128M8CN 78-Ball NT5CB256 srt 8n JESD79-3 NT5CB128M8CN NT5CB128M8CN-CG NT5CB128M TI ddr3 controller datasheet NT5CB128 PDF

    NT5CB128M8CN

    Abstract: NT5CB256M4CN NT5CB128
    Text: 1Gb DDR3 SDRAM C-Die NT5CB256M4CN / NT5CB128M8CN Feature  1.5V ± 0.075V JEDEC Standard Power Supply  Write Leveling  8 Internal memory banks (BA0- BA2)  OCD Calibration  Differential clock input (CK, )  Dynamic ODT (Rtt_Nom & Rtt_WR)


    Original     		NT5CB256M4CN NT5CB128M8CN 78-Ball Rate32 NT5CB128M8CN NT5CB128 PDF

    NT5CB128

    Abstract: NT5CB128M NT5CB256 NT5CB128M8CN-CG NT5CB256m NT5CB128M8 NT5CB128M8CN srt 8n JESD79-3 Nanya DDR3
    Text: 1Gb DDR3 SDRAM C-Die NT5CB256M4CN / NT5CB128M8CN Feature  1.5V ± 0.075V JEDEC Standard Power Supply  Write Leveling  8 Internal memory banks (BA0- BA2)  OCD Calibration  Differential clock input (CK, )  Dynamic ODT (Rtt_Nom & Rtt_WR)


    Original     		NT5CB256M4CN NT5CB128M8CN 78-Ball NT5CB128 NT5CB128M NT5CB256 NT5CB128M8CN-CG NT5CB256m NT5CB128M8 NT5CB128M8CN srt 8n JESD79-3 Nanya DDR3 PDF

    NT5CB64M16AP-BE

    Abstract: No abstract text available
    Text: NT5CB256M4AN / NT5CB128M8AN / NT5CB64M16AP 1Gb DDR3 SDRAM A-Die Features • VDD=VDDQ=1.5V ± 0.075V JEDEC Standard Power Supply • Write Leveling • OCD Calibration • 8 internal banks (BA0 - BA2) • Dynamic ODT (Rtt_Nom & Rtt_WR) • Differential clock inputs (CK, CK)


    Original     		NT5CB256M4AN NT5CB128M8AN NT5CB64M16AP NT5CB64M16AP-BE PDF

    nt5cb64m16

    Abstract: NT5CB64m NT5CB64M16AP NT5CB64 NT5CB64M16AP-CF NT5CB64M16AP-BE nanya NT5CB64M16AP NT5CB256M4AN NT5CB64M16AP-CG NT5CB64M16AP-AC
    Text: 1Gb DDR3 SDRAM A-Die NT5CB256M4AN / NT5CB128M8AN / NT5CB64M16AP Feature  Write Leveling  1.5V ± 0.075V JEDEC Standard Power Supply  OCD Calibration  8 Internal memory banks (BA0- BA2)  Dynamic ODT (Rtt_Nom & Rtt_WR)  Differential clock input (CK, )


    Original     		NT5CB256M4AN NT5CB128M8AN NT5CB64M16AP 78-Ball 96-Ball nt5cb64m16 NT5CB64m NT5CB64M16AP NT5CB64 NT5CB64M16AP-CF NT5CB64M16AP-BE nanya NT5CB64M16AP NT5CB64M16AP-CG NT5CB64M16AP-AC PDF

    NT5CB64M16AP-CF

    Abstract: nt5cb64m16 NT5CB64M16AP-CG NT5CB64M16AP nanya NT5CB64M16AP NT5CB64m NT5CB64M16AP-BE nt5cb64m16ap-dh MPR 20 20 CF RESISTOR NT5CB64M16AP-AC
    Text: 1Gb DDR3 SDRAM A-Die NT5CB256M4AN / NT5CB128M8AN / NT5CB64M16AP Feature  Write Leveling  1.5V ± 0.075V JEDEC Standard Power Supply  OCD Calibration  8 Internal memory banks (BA0- BA2)  Dynamic ODT (Rtt_Nom & Rtt_WR)  Differential clock input (CK, )


    Original     		NT5CB256M4AN NT5CB128M8AN NT5CB64M16AP 60-Ball 84-Ball NT5CB64M16AP-CF nt5cb64m16 NT5CB64M16AP-CG NT5CB64M16AP nanya NT5CB64M16AP NT5CB64m NT5CB64M16AP-BE nt5cb64m16ap-dh MPR 20 20 CF RESISTOR NT5CB64M16AP-AC PDF

    nt5cb64m16

    Abstract: NT5CB64M16AP-CF NT5CB64M16AP-AC NT5CB64M16AP NT5CB64M16AP-BE nt5cb128m8an-cg NT5CB128M8AN-DG
    Text: 1Gb DDR3 SDRAM A-Die NT5CB256M4AN / NT5CB128M8AN / NT5CB64M16AP Feature  Write Leveling  1.5V ± 0.75V JEDEC Standard Power Supply  OCD Calibration  8 Internal memory banks (BA0- BA2)  Dynamic ODT (Rtt_Nom & Rtt_WR)  Differential clock input (CK, )


    Original     		NT5CB256M4AN NT5CB128M8AN NT5CB64M16AP 60-Ball 84-Ball Rate32 nt5cb64m16 NT5CB64M16AP-CF NT5CB64M16AP-AC NT5CB64M16AP NT5CB64M16AP-BE nt5cb128m8an-cg NT5CB128M8AN-DG PDF

    NT5CB256M4AN-BE

    Abstract: No abstract text available
    Text: 1Gb DDR3 SDRAM A-Die NT5CB256M4AN / NT5CB128M8AN / NT5CB64M16AP Feature  Write Leveling  1.5V ± 0.75V JEDEC Standard Power Supply  OCD Calibration  8 Internal memory banks (BA0- BA2)  Dynamic ODT (Rtt_Nom & Rtt_WR)  Differential clock input (CK, )


    Original     		NT5CB256M4AN NT5CB128M8AN NT5CB64M16AP NT5CB256M4AN-BE PDF

    NT5CB64m

    Abstract: nt5cb64m16 NT5CB64 NT5CB128M8AN NT5CB128 NT5CB256m
    Text: NT5CB256M4AN / NT5CB128M8AN / NT5CB64M16AP 1Gb DDR3 SDRAM A-Die Preliminary Edition Features • VDD=VDDQ=1.5V ± 0.075V JEDEC Standard Power Supply • Write Leveling • OCD Calibration • 8 internal banks (BA0 - BA2) • Dynamic ODT (Rtt_Nom & Rtt_WR)


    Original     		NT5CB256M4AN NT5CB128M8AN NT5CB64M16AP NT5CB64m nt5cb64m16 NT5CB64 NT5CB128 NT5CB256m PDF

    NT5CB128M16HP

    Abstract: NT5CB128M16HP-DI NT5CC128M16HP NT5CB128M16HP-CG NT5CC128M16HP-DI NT5CC128M16HP-CG NT5CB128M16H nt5cb128m16 DDR32133 PS-1045
    Text: 2Gb DDR3 SDRAM H-Die NT5CB128M16HP NT5CC128M16HP Feature  1.35V -0.067V/+0.1V & 1.5V ± 0.075V JEDEC  Through ZQ pin (RZQ:240 ohm±1% Standard Power Supply)  Differential bidirectional data strobe  8 Internal memory banks (BA0- BA2)  Internal(self) calibration:Internal self calibration


    Original     		NT5CB128M16HP NT5CC128M16HP NT5CB128M16HP-DI NT5CC128M16HP NT5CB128M16HP-CG NT5CC128M16HP-DI NT5CC128M16HP-CG NT5CB128M16H nt5cb128m16 DDR32133 PS-1045 PDF

    N2CB1G80CN-BE

    Abstract: No abstract text available
    Text: N2CB1G40CN / N2CB1G80CN 1Gb DDR3 SDRAM C-Die Features  VDD=VDDQ=1.5V ± 0.075V JEDEC Standard Power Supply  Output Driver Impedance Control  Write Leveling  8 internal banks (BA0 - BA2)  OCD Calibration  Differential clock inputs (CK, )


    Original     		N2CB1G40CN N2CB1G80CN 78Balls N2CB1G80CN-BE PDF

    srt 8n

    Abstract: "2Gb DDR3 SDRAM" DDR3-1066 DDR3-1333 Nanya DDR3 wrs4
    Text: NT5CB512T4AN-BE/CG 2Gb DDR3 SDRAM A-Die DDP Features VDD=VDDQ=1.5V ± 0.075V (JEDEC Standard Power Supply) Write Leveling OCD Calibration 8 internal banks (BA0 - BA2) Differential clock inputs (CK, Programmable Dynamic ODT (Rtt_Nom & Rtt_WR) ) Auto Self-Refresh


    Original     		NT5CB512T4AN-BE/CG srt 8n "2Gb DDR3 SDRAM" DDR3-1066 DDR3-1333 Nanya DDR3 wrs4 PDF

    Untitled

    Abstract: No abstract text available
    Text: ESM T M15F1G1664A DDR III SDRAM 8M x 16 Bit x 8 Banks DDR III SDRAM Features 1.5V ± 0.075V JEDEC Standard Power Supply 8 Internal memory banks (BA0- BA2) Differential clock input (CK, CK) Programmable CAS Output Driver Impedance Control Differential bidirectional data strobe


    Original     		M15F1G1664A M15F1G1664A PDF

    Untitled

    Abstract: No abstract text available
    Text: N2CB2G40BN / N2CB2G80BN / N2CB2G16BP 2Gb DDR3 SDRAM B-Die Feature  1.5V ± 0.075V JEDEC Standard Power Supply  Write Leveling  8 Internal memory banks (BA0- BA2)  OCD Calibration  Differential clock input (CK, )  Dynamic ODT (Rtt_Nom & Rtt_WR)


    Original     		N2CB2G40BN N2CB2G80BN N2CB2G16BP 78-Ball PDF

    nt5cb64m16

    Abstract: NT5CB64M16AP-CF NT5CB64M16AP-AC NT5CB256M4AN NT5CB64M16AP srt 8n NT5CB64M16AP-CG nt5cb64m16ap-dh NT5CB128M8 NT5CB256M4AN-CG
    Text: 1Gb DDR3 SDRAM A-Die NT5CB256M4AN / NT5CB128M8AN / NT5CB64M16AP Feature  Write Leveling  1.5V ± 0.75V JEDEC Standard Power Supply  OCD Calibration  8 Internal memory banks (BA0- BA2)  Dynamic ODT (Rtt_Nom & Rtt_WR)  Differential clock input (CK, )


    Original     		NT5CB256M4AN NT5CB128M8AN NT5CB64M16AP 60-Ball 84-Ball nt5cb64m16 NT5CB64M16AP-CF NT5CB64M16AP-AC NT5CB64M16AP srt 8n NT5CB64M16AP-CG nt5cb64m16ap-dh NT5CB128M8 NT5CB256M4AN-CG PDF

    NT5CB256M8

    Abstract: nt5cb128m16 NT5CB256 NT5CB256M8BN-CG NT5CB256M8BN-BE NT5CB256M4CN NT5CB512M4BN NT5CB128M
    Text: 2Gb DDR3 SDRAM B-Die NT5CB512M4BN / NT5CB256M8BN / NT5CB128M16BP Feature  1.5V ± 0.075V JEDEC Standard Power Supply  Write Leveling  8 Internal memory banks (BA0- BA2)  OCD Calibration  Differential clock input (CK, )  Dynamic ODT (Rtt_Nom & Rtt_WR)


    Original     		NT5CB512M4BN NT5CB256M8BN NT5CB128M16BP 78-Ball 96-Ball Rate32 483tomer NT5CB256M8 nt5cb128m16 NT5CB256 NT5CB256M8BN-CG NT5CB256M8BN-BE NT5CB256M4CN NT5CB128M PDF

    1756-BA2

    Abstract: Allen-Bradley 1756-ba2 1756-BA2 battery 1756-BA1 1756-BAta Maintain 1756-BA2 1770-XYC 1769-BA 1756-BA1 BATTERY Lithium
    Text: Technical Data Guidelines for Handling Lithium Batteries Catalog Number: 1770-XO, 1770-XR, 1770-XY, 1770-XYB, 1770-XYC, 1770-XZ, 1756-BA1, 1756-BA2, 1756-BATA, 1769-BA, 6630-U1 Lithium batteries are primary not rechargeable cells that give extended memory support for Rockwell Automation products.


    Original     		1770-XO, 1770-XR, 1770-XY, 1770-XYB, 1770-XYC, 1770-XZ, 1756-BA1, 1756-BA2, 1756-BATA, 1769-BA, 1756-BA2 Allen-Bradley 1756-ba2 1756-BA2 battery 1756-BA1 1756-BAta Maintain 1756-BA2 1770-XYC 1769-BA 1756-BA1 BATTERY Lithium PDF

    Untitled

    Abstract: No abstract text available
    Text: ESMT M15F1G1664A 2R DDR III SDRAM 8M x 16 Bit x 8 Banks DDR III SDRAM Feature z 1.5V ± 0.075V (JEDEC Standard Power Supply) z Output Driver Impedance Control z Programmable CAS Latency: 5, 6, 7, 8, 9,10,11 z Differential bidirectional data strobe z 8 Internal memory banks (BA0- BA2)


    Original     		M15F1G1664A PDF

    Untitled

    Abstract: No abstract text available
    Text: ESM T M15F2G16128A DDR III SDRAM 16M x 16 Bit x 8 Banks DDR III SDRAM Feature 1.5V ± 0.075V JEDEC Standard Power Supply Output Driver Impedance Control 8 Internal memory banks (BA0- BA2) Differential bidirectional data strobe through ZQ pin Differential clock input (CK, CK )


    Original     		M15F2G16128A PDF

    Untitled

    Abstract: No abstract text available
    Text: THIS DRAWING IS A CONTROLLED DOCUMENT. LOC REVISIONS DIST B LTR DESCRIPTION BA2 DWN DATE ECR-13-015529 APVD TN KR 04OCT2013 2008 RECOMMENDED LAND PATTERN FOR INDUCTANCE VALUES 100µH OR HIGHER 10.3 0.3 2.2 2.2 12.7 1.0 11.0 0.5 0.8 2.5 RELEASED FOR PUBLICATION


    Original     		ECR-13-015529 04OCT2013 03-Sep-08 3632B PDF

    M15F2G16128A

    Abstract: No abstract text available
    Text: ESMT M15F2G16128A DDR III SDRAM 16M x 16 Bit x 8 Banks DDR III SDRAM Feature z 1.5V ± 0.075V JEDEC Standard Power Supply z Output Driver Impedance Control z 8 Internal memory banks (BA0- BA2) z Differential bidirectional data strobe through ZQ pin z Differential clock input (CK, CK )


    Original     		M15F2G16128A M15F2G16128A PDF