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Catalog Datasheet	MFG & Type	PDF	Document Tags
AVR1304 Abstract: DMAC Text: AVR1304: Using the XMEGA DMA Controller Features • • • • • • • • • Four separate DMA channels Flexible channel priority selection Three addressing modes: static, increment, and decrement Source and/or destination address reload capabilities	Original	PDF	AVR1304: 8046B-AVR-04/08 AVR1304 DMAC
AVR1005: Getting started with XMEGA Abstract: Application Notes xmega 128 xmega 128 A1 xmega 16 A4 XMEGA Application Notes xmega 128 a3 AVR1005 AVR1302 xmega a3* pdi Text: AVR1005: Getting started with XMEGA Features • • • • • XMEGA vs. megaAVR XMEGA feature and peripherals Tool-chain - programming and debugging In-system Programming Hardware design considerations 1 Introduction 8-bit Microcontrollers Application Note	Original	PDF	AVR1005: 8169B-AVR-11/09 AVR1005: Getting started with XMEGA Application Notes xmega 128 xmega 128 A1 xmega 16 A4 XMEGA Application Notes xmega 128 a3 AVR1005 AVR1302 xmega a3* pdi
AVR1307: Using the XMEGA USART Abstract: USART applications AVR1307 AVR1304 Atmel AVR XMEGA dma Text: AVR1307: Using the XMEGA USART Features • Setup and use of the USART • Code examples - Polled USART - Interrupt controlled USART 8-bit Microcontrollers Application Note 1 Introduction The USART Universal Synchronous Asynchronous Receiver Transmitter is the	Original	PDF	AVR1307: 049A-AVR-02/08 AVR1307: Using the XMEGA USART USART applications AVR1307 AVR1304 Atmel AVR XMEGA dma
AVR1301: Using the XMEGA DAC Abstract: Application Notes sample code adc store avr AVR1301 AVR1303 sample code dac store avr 8033b AVR1304 xmega ADC AVR1000 Text: AVR1301: Using the XMEGA DAC Features • • • • • • 8-bit Microcontrollers 12 bit resolution Up to 1 M conversions per second Continuous drive or sample-and-hold output Built-in offset and gain calibration High drive capabilities Driver source code included	Original	PDF	AVR1301: 8033B-AVR-04/08 AVR1301: Using the XMEGA DAC Application Notes sample code adc store avr AVR1301 AVR1303 sample code dac store avr 8033b AVR1304 xmega ADC AVR1000
AVR121 Abstract: 8032d XMega 256 AVR1301 AVR120 xmega ADC AVR1300 AVR1304 sample code adc store avr XMEGA Application Notes Text: AVR1300: Using the XMEGA ADC Features • • • • • • • • • • Up to 12 bit resolution Up to 2M samples per second Signed and unsigned mode Selectable gain Pipelined architecture Up to 4 virtual channels Result comparator Automatic calibration	Original	PDF	AVR1300: 8032D-AVR-02/10 AVR121 8032d XMega 256 AVR1301 AVR120 xmega ADC AVR1300 AVR1304 sample code adc store avr XMEGA Application Notes
AVR121 Abstract: AVR1301 AVR1300 xmega ADC AVR1304 AVR1001 xmega 128 AVR120 XMega 256 Atmel AVR XMEGA dma Text: AVR1300: Using the XMEGA ADC Features • • • • • • • • • • Up to 12 bit resolution Up to 2M samples per second Signed and unsigned mode Selectable gain Pipelined architecture 4 virtual channels Result comparator Automatic calibration Internal connection to DAC output	Original	PDF	AVR1300: 8032C-AVR-09/09 AVR121 AVR1301 AVR1300 xmega ADC AVR1304 AVR1001 xmega 128 AVR120 XMega 256 Atmel AVR XMEGA dma
MC310 schematic Abstract: SOCKET TQFP100 tiny23 ATSTK504 ATSTK503 ATTINY44 AT32UC3A0512 Text: AVR Microcontrollers ATMEL CORPORATION AVR® Microcontrollers: Product Line Reference December 2008 Customer Edition Table of Contents 1 AVR Product Family . 2	Original	PDF	AT32UC3Bx AVR32 MC310 schematic SOCKET TQFP100 tiny23 ATSTK504 ATSTK503 ATTINY44 AT32UC3A0512
Counter Abstract: AVR1306 AVR1001 AVR1304 AVR1311 DIV1024 DIV256 AVR130 xmega ocd TCX0 Text: AVR1306: Using the XMEGA Timer/Counter Features • True 16 bit operation • Double buffered timer period setting • 4 2 compare or capture channels per timer - 4 channels on each Timer 0 - 2 channels on each Timer 1 - Double buffered • 32 bit operation with 32 bit input capture by timer cascading	Original	PDF	AVR1306: 16-bit 804nts 045A-AVR-02/08 Counter AVR1306 AVR1001 AVR1304 AVR1311 DIV1024 DIV256 AVR130 xmega ocd TCX0
AVR1318: Using the XMEGA built-in AES accelerator Abstract: Application Notes add round key for aes algorithm key expansion for aes algorithm avr 256 aes AVR1318 AVR1304 XMega 256 AES with DMA Atmel AVR XMEGA dma Text: AVR1318: Using the XMEGA built-in AES accelerator Features 8-bit Microcontrollers • Full compliance with AES FIPS Publication 197, 2002 - Both encryption and decryption procedures • 128-bit Key and State memory • XOR load option to State memory useful for cipher block coding	Original	PDF	AVR1318: 128-bit 106A-AVR-04/08 AVR1318: Using the XMEGA built-in AES accelerator Application Notes add round key for aes algorithm key expansion for aes algorithm avr 256 aes AVR1318 AVR1304 XMega 256 AES with DMA Atmel AVR XMEGA dma
AVR1315 Abstract: AVR1316 AVR101 AVR1304 Text: AVR1315: Accessing the XMEGA EEPROM Features • • • • • 8-bit Microcontrollers I/O-mapped access Memory-mapped access Split erase and write operations supported Efficient page-oriented access Driver source code included Application Note 1 Introduction	Original	PDF	AVR1315: 066A-AVR-04/08 AVR1315 AVR1316 AVR101 AVR1304
0X0102 Abstract: AVR1316 AVR1008 AVR1315 8066b AVR101 AVR1304 Text: AVR1315: Accessing the XMEGA EEPROM Features • • • • • 8-bit Microcontrollers I/O-mapped access Memory-mapped access Split erase and write operations supported Efficient page-oriented access Driver source code included Application Note 1 Introduction	Original	PDF	AVR1315: A3/D3/256A3B AVR1008. 8066B-AVR-es 8066B-AVR-08/10 0X0102 AVR1316 AVR1008 AVR1315 8066b AVR101 AVR1304
Atmel AVR XMEGA dma Abstract: xmega ADC AVR1001 AVR1301 sample code adc store avr XMEGA D AVR1305 AVR120 AVR121 AVR1304 Text: AVR1300: Using the XMEGA ADC Features • • • • • • • • • • Up to 12 bit resolution Up to 2M samples per second Signed and unsigned mode Selectable gain Pipelined architecture Up to 4 virtual channels Result comparator Automatic calibration	Original	PDF	AVR1300: 8032E-AVR-10/10 Atmel AVR XMEGA dma xmega ADC AVR1001 AVR1301 sample code adc store avr XMEGA D AVR1305 AVR120 AVR121 AVR1304