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    Alliance Memory Inc AS7C33512NTD18A-166TQC

    9Mb SYNC SRAM 512K x 18 3.3V No Turn Around Delay 100Pin TQFP 166 MHz Commercial Temp
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    Karl Kruse GmbH & Co KG AS7C33512NTD18A-166TQC 63
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    AS7C33512NTD18A Datasheets (29)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF
    AS7C33512NTD18A Alliance Semiconductor 3.3V NTD Synchronous SRAM, 8M, 512Kx18 Original PDF
    AS7C33512NTD18A-100BC Alliance Semiconductor 3.3 V 512K x 18 SRAM with NTD Original PDF
    AS7C33512NTD18A-100BI Alliance Semiconductor 3.3 V 512K x 18 SRAM with NTD Original PDF
    AS7C33512NTD18A-100TQC Alliance Semiconductor 3.3 V 512K x 18 SRAM with NTD Original PDF
    AS7C33512NTD18A-100TQI Alliance Semiconductor 3.3V 512K x 18 SRAM with NTD Original PDF
    AS7C33512NTD18A-133BC Alliance Semiconductor 3.3 V 512K x 18 SRAM with NTD Original PDF
    AS7C33512NTD18A-133BI Alliance Semiconductor 3.3 V 512K x 18 SRAM with NTD Original PDF
    AS7C33512NTD18A-133TQC Alliance Semiconductor 3.3V 512K x 18 Pipelined burst Synchronous SRAM with NTD Original PDF
    AS7C33512NTD18A-133TQC Alliance Semiconductor 3.3V 512K x 18 SRAM with NTD Original PDF
    AS7C33512NTD18A-133TQCN Alliance Semiconductor 3.3V 512K x 18 Pipelined burst Synchronous SRAM with NTD Original PDF
    AS7C33512NTD18A-133TQI Alliance Semiconductor 3.3 V 512K x 18 SRAM with NTD Original PDF
    AS7C33512NTD18A-133TQI Alliance Semiconductor 3.3V 512K x 18 Pipelined burst Synchronous SRAM with NTD Original PDF
    AS7C33512NTD18A-133TQIN Alliance Semiconductor 3.3V 512K x 18 Pipelined burst Synchronous SRAM with NTD Original PDF
    AS7C33512NTD18A-150BC Alliance Semiconductor 3.3 V 512K x 18 SRAM with NTD Original PDF
    AS7C33512NTD18A-150BI Alliance Semiconductor 3.3 V 512K x 18 SRAM with NTD Original PDF
    AS7C33512NTD18A-150TQC Alliance Semiconductor 3.3V 512K x 18 SRAM with NTD Original PDF
    AS7C33512NTD18A-150TQI Alliance Semiconductor 3.3 V 512K x 18 SRAM with NTD Original PDF
    AS7C33512NTD18A-166BC Alliance Semiconductor 3.3 V 512K x 18 SRAM with NTD Original PDF
    AS7C33512NTD18A-166BI Alliance Semiconductor 3.3 V 512K x 18 SRAM with NTD Original PDF
    AS7C33512NTD18A-166HBC Alliance Semiconductor 3.3 V 512K x 18 SRAM with NTD Original PDF

    AS7C33512NTD18A Datasheets Context Search

    Catalog Datasheet MFG & Type Document Tags PDF

    V17H

    Abstract: No abstract text available
    Text: February 2002 AS7C33512NTD16A AS7C33512NTD18A 3.3V 512K x 16/18 65$0 ZLWK 17'TM Features • • • • • • • • • • • • • • • • • Organization: 524,288 words × 16 or 18 bits NTD 1 architecture for efficient bus operation Fast clock speeds to 166 MHz in LVTTL/LVCMOS


    Original     		AS7C33512NTD16A AS7C33512NTD18A in100-pin 119-ball V17H PDF

    AS7C33256PFD32A

    Abstract: AS7C33256PFS32A AS7C33256PFS36A AS7C33512NTD18A AS7C33512PFD18A AS7C33512PFS18A
    Text: November 2004 AS7C33512NTD18A 3.3V 512K x 18 Pipelined burst Synchronous SRAM with NTDTM Features • Byte write enables • Clock enable for operation hold • Multiple chip enables for easy expansion • 3.3V core power supply • 2.5V or 3.3V I/O operation with separate VDDQ


    Original     		AS7C33512NTD18A in100-pin AS7C33256PFD32A AS7C33256PFS32A AS7C33256PFS36A AS7C33512NTD18A AS7C33512PFD18A AS7C33512PFS18A PDF

    Untitled

    Abstract: No abstract text available
    Text: December 2001 Preliminary Information AS7C33512NTD16A AS7C33512NTD18A 3.3V 512K x 16/18 65$0 ZLWK 17'TM* Features • • • • • • • • Organization: 524,288 words × 16 or 18 bits Fast clock speeds to 166 MHz in LVTTL/LVCMOS Fast clock to data access: 3.5/3.8/4.0/5.0 ns


    Original     		AS7C33512NTD16A AS7C33512NTD18A 100-pin PDF

    Untitled

    Abstract: No abstract text available
    Text: August 2002 Preliminary AS7C33512NTD18A 3.3V 512K x 18 65$0 ZLWK 17'TM Features • • • • • • • • • • • • • • • • • Organization: 524,288 words × 18 bits NTD 1 architecture for efficient bus operation Fast clock speeds to 166 MHz in LVTTL/LVCMOS


    Original     		AS7C33512NTD18A in100-pin PDF

    Untitled

    Abstract: No abstract text available
    Text: February 2003 AS7C33512NTD16A AS7C33512NTD18A 3.3V 512K x 16/18 65$0 ZLWK 17'TM Features • • • • • • • • • • • • • • • • • Organization: 524,288 words × 16 or 18 bits NTD 1 architecture for efficient bus operation Fast clock speeds to 166 MHz in LVTTL/LVCMOS


    Original     		AS7C33512NTD16A AS7C33512NTD18A in100-pin PDF

    AS7C33512NTD18A

    Abstract: No abstract text available
    Text: September 2001 Preliminary Information AS7C33512NTD16A AS7C33512NTD18A 3.3V 512K x 16/18 65$0 ZLWK 17'TM* Features • • • • • • • • Organization: 524,288 words × 16 or 18 bits Fast clock speeds to 166 MHz in LVTTL/LVCMOS Fast clock to data access: 3.5/3.8/4.0/5.0 ns


    Original     		AS7C33512NTD16A AS7C33512NTD18A 100-pin AS7C33512NTD18A PDF

    Untitled

    Abstract: No abstract text available
    Text: December 2002 Preliminary AS7C33512NTD18A 3.3V 512K x 18 65$0 ZLWK 17'TM Features • • • • • • • • • • • • • • • • • Organization: 524,288 words × 18 bits NTD 1 architecture for efficient bus operation Fast clock speeds to 166 MHz in LVTTL/LVCMOS


    Original     		AS7C33512NTD18A in100-pin PDF

    Untitled

    Abstract: No abstract text available
    Text: April 2004 AS7C33512NTD18A 3.3V 512K x 18 SRAM with NTDTM Features • • • • • • Organization: 524,288 words × 18 bits NTD 1 architecture for efficient bus operation Fast clock speeds to 166 MHz in LVTTL/LVCMOS Fast clock to data access: 3.0/3.5/3.8/4.0/5.0 ns


    Original     		AS7C33512NTD18A in100-pin PDF

    Untitled

    Abstract: No abstract text available
    Text: August 2002 Preliminary AS7C33512NTD18A 3.3V 512K x 18 65$0 ZLWK 17'TM Features • • • • • • • • • • • • • • • • • Organization: 524,288 words × 18 bits NTD 1 architecture for efficient bus operation Fast clock speeds to 166 MHz in LVTTL/LVCMOS


    Original     		AS7C33512NTD18A in100-pin PDF

    Untitled

    Abstract: No abstract text available
    Text: September 2001 Preliminary Information AS7C33512NTD16A AS7C33512NTD18A 3.3V 512K x 16/18 65$0 ZLWK 17'TM* Features • • • • • • • • Organization: 524,288 words × 16 or 18 bits Fast clock speeds to 166 MHz in LVTTL/LVCMOS Fast clock to data access: 3.5/3.8/4.0/5.0 ns


    Original     		AS7C33512NTD16A AS7C33512NTD18A 100-pin PDF

    AS7C33512NTD18A

    Abstract: No abstract text available
    Text: March 2002 AS7C33512NTD16A AS7C33512NTD18A 3.3V 512K x 16/18 65$0 ZLWK 17'TM Features • • • • • • • • • • • • • • • • • Organization: 524,288 words × 16 or 18 bits NTD 1 architecture for efficient bus operation Fast clock speeds to 166 MHz in LVTTL/LVCMOS


    Original     		AS7C33512NTD16A AS7C33512NTD18A in100-pin 119-ball AS7C33512NTD18A PDF

    Untitled

    Abstract: No abstract text available
    Text: May 2003 AS7C33512NTD16A AS7C33512NTD18A 3.3V 512K x 16/18 65$0 ZLWK 17'TM • • • • • • • • • • Features • • • • • Organization: 524,288 words × 16 or 18 bits NTD 1 architecture for efficient bus operation Fast clock speeds to 166 MHz in LVTTL/LVCMOS


    Original     		AS7C33512NTD16A AS7C33512NTD18A in100-pin PDF

    Untitled

    Abstract: No abstract text available
    Text: June 2002 AS7C33512NTD16A AS7C33512NTD18A 3.3V 512K x 16/18 65$0 ZLWK 17'TM Features • • • • • • • • • • • • • • • • • Organization: 524,288 words × 16 or 18 bits NTD 1 architecture for efficient bus operation Fast clock speeds to 166 MHz in LVTTL/LVCMOS


    Original     		AS7C33512NTD16A AS7C33512NTD18A in100-pin PDF

    Untitled

    Abstract: No abstract text available
    Text: November 2000 Advance Information AS7C33512PFS16A AS7C33512PFS18A 3.3V 512K x 16/18 pipeline burst synchronous SRAM Features • Organization: 524,288 words × 16 or 18 bits • Fast clock speeds to 166 MHz in LVTTL/LVCMOS • Fast clock to data access: 3.5/3.8/4.0/5.0 ns


    Original     		AS7C33512PFD16A/ AS7C33512PFD18A) AS7C33512PFS16A AS7C33512PFS18A 100-pin PDF

    Untitled

    Abstract: No abstract text available
    Text: August 2002 Preliminary AS7C33512PFS18A 3.3V 512K x 18 pipelined burst synchronous SRAM Features • Multiple chip enables for easy expansion • 3.3V core power supply • 2.5V or 3.3V I/O operation with separate VDDQ • 30 mW typical standby power in power down mode


    Original     		AS7C33512PFS18A AS7C33512NTD18A) PDF

    Untitled

    Abstract: No abstract text available
    Text: October 2001 Preliminary Information AS7C33512PFS16A AS7C33512PFS18A 3.3V 512K x 16/18 pipeline burst synchronous SRAM Features • Pentium®* compatible architecture and timing • Asynchronous output enable control • Economical 100-pin TQFP package


    Original     		AS7C33512PFS16A AS7C33512PFS18A AS7C33512PFD16A/ AS7C33512PFD18A) AS7C33512PFS18A2 100-pin PDF

    1H08S

    Abstract: PI6C2405A-1HW ASM706CUA SOIC-6 microchip ADM809RAR ADM705AN MAX809SEUR T ASM5P2309-1H-16-S K7N163601B MAX810JEUR
    Text: Supervisors Cross Reference Guide Alliance Maxim/Dallas IMP ASM1232LP DS1232LPS-2 IMP1232LP ASM1232LPCMA DS1232LP IMP1232LPCMA ASM1232LPEMA DS1232LP IMP1232LPEMA ASM1232LPN DS1232LP IMP1232LPN Analog Devices Micrel Microchip MIC1232N TC1232CPA - - - - - -


    Original     		ASM1232LP DS1232LPS-2 IMP1232LP ASM1232LPCMA DS1232LP IMP1232LPCMA ASM1232LPEMA IMP1232LPEMA ASM1232LPN 1H08S PI6C2405A-1HW ASM706CUA SOIC-6 microchip ADM809RAR ADM705AN MAX809SEUR T ASM5P2309-1H-16-S K7N163601B MAX810JEUR PDF

    ADM809RAR

    Abstract: AS7C256A hsbga 416 lcd cross reference IDT CYPRESS CROSS REFERENCE clocks DS1232* watch dog timer Product Selector Guide mbg* sot143 FS781 IDT74SSTV16857
    Text: DISCLAIMER Alliance Semiconductor Corporation reserves the right to make changes to its products or specifications at any time, without notice, in order to improve design or performance and to supply the best possible product. Alliance Semiconductor does not assume any responsibility for use of any circuitry described other than the circuitry embodied


    Original     		IS61LV25616AL IS61LV5128AL IS61LV6416 IS61C6416 IS61LV1024 48-pin AS9C25256M2036L AS9C25512M2018L 512Kx18 ADM809RAR AS7C256A hsbga 416 lcd cross reference IDT CYPRESS CROSS REFERENCE clocks DS1232* watch dog timer Product Selector Guide mbg* sot143 FS781 IDT74SSTV16857 PDF

    Untitled

    Abstract: No abstract text available
    Text: June 2002 Preliminary AS7C33512PFS16A AS7C33512PFS18A 3.3V 512K x 16/18 pipeline burst synchronous SRAM Features • Multiple chip enables for easy expansion • 3.3V core power supply • 2.5V or 3.3V I/O operation with separate VDDQ • 30 mW typical standby power in power down mode


    Original     		AS7C33512PFS16A AS7C33512PFS18A AS7C33512NTD16A/AS7C33512NTD18A) PDF

    Untitled

    Abstract: No abstract text available
    Text: September 2001 Preliminary Information AS7C33512PFD16A AS7C33512PFD18A 3.3V 512K x 16/18 pipeline burst synchronous SRAM Features • Pentium®* compatible architecture and timing • Asynchronous output enable control • Economical 100-pin TQFP package


    Original     		AS7C33512PFD16A AS7C33512PFD18A AS7C33512PFS16A/ AS7C33512PFS18A) AS7C33512PFD18A2 100-pin PDF

    Untitled

    Abstract: No abstract text available
    Text: March 2002 AS7C33512PFD16A AS7C33512PFD18A 3.3V 512K x 16/18 pipeline burst synchronous SRAM Features • Asynchronous output enable control • Available in 100-pin TQFP and 119-pin BGA package • Byte write enables • Multiple chip enables for easy expansion


    Original     		AS7C33512PFD16A AS7C33512PFD18A AS7C33512PFS16A/ AS7C33512PFS18A) AS7C33512PFD18A2 100-pin 119-pin PDF

    Untitled

    Abstract: No abstract text available
    Text: April 2004 AS7C33256PFS32A AS7C33256PFS36A 3.3V 256K x 32/36 pipelined burst synchronous SRAM Features • • • • • • • • • • • • • • Organization: 262,144 words x 32 or 36 bits Fast clock speeds to 166 MHz in LVTTL/LVCMOS Fast clock to data access: 3.5/3.8/4.0/5.0 ns


    Original     		AS7C33256PFS32A AS7C33256PFS36A AS7C33512PFD18A, AS7C33256PFD32A/AS7C33256PFD36A) in100-pin PDF

    Untitled

    Abstract: No abstract text available
    Text: July 2001 Advance Information AS7C33512PFS16A AS7C33512PFS18A 3.3V 512K x 16/18 pipeline burst synchronous SRAM Features • Organization: 524,288 words × 16 or 18 bits • Fast clock speeds to 166 MHz in LVTTL/LVCMOS • Fast clock to data access: 3.5/3.8/4.0/5.0 ns


    Original     		AS7C33512PFS16A AS7C33512PFS18A AS7C33512PFD16A/ AS7C33512PFD18A) AS7C33512PFS18A2 100-pin PDF

    Untitled

    Abstract: No abstract text available
    Text: July 2004 AS7C33512PFD18A 3.3V 512K x 18 pipeline burst synchronous SRAM Features • • • • • • • • • • • • • Organization: 524,288 words × 18 bits Fast clock speeds to 166 MHz in LVTTL/LVCMOS Fast clock to data access: 3.5/3.8/4.0/5.0 ns


    Original     		AS7C33512PFD18A AS7C33512PFS18A) 100-pin PDF