AD 149 AE9
Abstract: AA23 PQ208 QL3040 QL3040-1PB456C QL3040-1PQ208C
Text: QL3040 pASIC 3 FPGA Data Sheet •••••• 40,000 Usable PLD Gate pASIC 3 FPGA Combining High Performance and High Density Device Highlights High Performance & High Density • 40,000 Usable PLD Gates with 252 I/Os • 300 MHz 16-bit Counters, 400 MHz Datapaths
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QL3040
16-bit
AD 149 AE9
AA23
PQ208
QL3040-1PB456C
QL3040-1PQ208C
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AE21 ARRAY DIODE
Abstract: QL3060 AD 149 AE9 AA23 PQ208 QL3060-1PB456C QL3060-1PQ208C B14 ON
Text: QL3060 pASIC 3 FPGA Data Sheet •••••• 60,000 Usable PLD Gate pASIC 3 FPGA Combining High Performance and High Density Device Highlights High Performance & High Density • 60,000 Usable PLD Gates with 316 I/Os • 300 MHz 16-bit Counters, 400 MHz Datapaths
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QL3060
16-bit
AE21 ARRAY DIODE
AD 149 AE9
AA23
PQ208
QL3060-1PB456C
QL3060-1PQ208C
B14 ON
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diodes t25 4 l9
Abstract: EPF10K30AB356 EPF10K200E
Text: FLEX 10KE Embedded Programmable Logic Family August 1998, ver. 1 Features. Data Sheet • Preliminary Information ■ ■ ■ Embedded programmable logic device PLD family, providing system integration in a single device – Enhanced embedded array for implementing megafunctions
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16-bit
diodes t25 4 l9
EPF10K30AB356
EPF10K200E
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lcmx01200c
Abstract: smd m21 sot23 fuse smd marking f5 marking w25 SMD smd diode U12 c526 LCMXO1200C-CSBGA132 npn transistor smd w19 transistor C535 SMD BGA 672 DRAWING SPI-M2564
Text: LatticeECP2M PCI Express Solutions Board User’s Guide September 2008 Revision: EB33_01.0 LatticeECP2M PCI Express Solutions Board User’s Guide Lattice Semiconductor Introduction As PCI Express applications have emerged, the LatticeECP2M FPGA family has become a well-suited solution
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CY2304SC-1
CTS-CB3LV-3C100
00MHZ
CB3LV-3C-100M0000-T
EXB2HV471JV
33R-0603SMT
ERJ-3EKF33R0V
1/16W
1M-0603SMT
lcmx01200c
smd m21 sot23
fuse smd marking f5
marking w25 SMD
smd diode U12 c526
LCMXO1200C-CSBGA132
npn transistor smd w19
transistor C535
SMD BGA 672 DRAWING
SPI-M2564
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PQ208
Abstract: PQ240 QL4058 QL4058-1PB456C QL4058-1PQ208C QL4058-1PQ240C aldec g2
Text: QL4058 QuickRAM Data Sheet • • • • • • 58,000 Usable PLD Gate QuickRAM ESP Combining Performance, Density and Embedded RAM Device Highlights Advanced I/O Capabilities • Interfaces with both 3.3 V and 5.0 V devices High Performance & High Density
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QL4058
16-bit
PQ208
PQ240
QL4058-1PB456C
QL4058-1PQ208C
QL4058-1PQ240C
aldec g2
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AD 149 AE9
Abstract: PQ208 PQ240 QL4090 QL4090-1PB456C QL4090-1PQ208C QL4090-1PQ240C aldec g2 CQFP 240
Text: QL4090 QuickRAM Data Sheet • • • • • • 90,000 Usable PLD Gate QuickRAM ESP Combining Performance, Density and Embedded RAM Device Highlights Advanced I/O Capabilities • Interfaces with both 3.3 V and 5.0 V devices High Performance & High Density
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QL4090
16-bit
AD 149 AE9
PQ208
PQ240
QL4090-1PB456C
QL4090-1PQ208C
QL4090-1PQ240C
aldec g2
CQFP 240
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diode t25 4 k8
Abstract: diode t25 4 B9 diode t25 4 H9 diode t25 4 k5 diode t25 4 L9 diode AA17 diode t25 4 k6 diode t25 4 g8 diode t25 4 G9 T4 w4 DIODE
Text: Pin Information For The Stratix EP1S10 Device, ver 3.1 Bank Number B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B1 B1 VREF Bank Pin Name/Function Optional Function s
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EP1S10
diode t25 4 k8
diode t25 4 B9
diode t25 4 H9
diode t25 4 k5
diode t25 4 L9
diode AA17
diode t25 4 k6
diode t25 4 g8
diode t25 4 G9
T4 w4 DIODE
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diode AB26
Abstract: F17 DIODE AF12 diode
Text: Pin Information For The Stratix EP1S25 Device, ver 3.0 Bank Number B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 VREF Bank Pin Name/Function Optional Function s VREF0B2 VREF0B2 VREF0B2 VREF0B2
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EP1S25
RX38p
RX38n
TX38p
TX38n
RX37p
RX37n
TX37p
TX37n
RX36p
diode AB26
F17 DIODE
AF12 diode
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diode t25 4 H9
Abstract: diode t25 4 B8 diode t25 4 G9 diode t25 4 k6 diode t25 4 H8 diode t25 4 F8 diode t25 4 e9 diode t25 4 e8 diode t25 4 g8 diode t25 4 L9
Text: Pin Information For The Stratix EP1S25 Device, ver 3.6 Bank Number B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2
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EP1S25
PT-EP1S25-3
EP1S25.
diode t25 4 H9
diode t25 4 B8
diode t25 4 G9
diode t25 4 k6
diode t25 4 H8
diode t25 4 F8
diode t25 4 e9
diode t25 4 e8
diode t25 4 g8
diode t25 4 L9
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diode t25 4 H9
Abstract: diode t25 4 L9 diode t25 4 k6 diode t25 4 k8 diode t25 4 G9 diode t25 4 F8 diode t25 4 B9 diode t25 4 g8 diode t25 4 F7 diode t25 4 L8
Text: Pin Information For The Stratix EP1S10 Device, ver 3.7 Note 2 Bank Number B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B1 B1 B1 B1 B1 B1 B1 B1 B1
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EP1S10
PT-EP1S10-3
EP1S10F484.
diode t25 4 H9
diode t25 4 L9
diode t25 4 k6
diode t25 4 k8
diode t25 4 G9
diode t25 4 F8
diode t25 4 B9
diode t25 4 g8
diode t25 4 F7
diode t25 4 L8
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diode t25 4 g8
Abstract: diode AA19 diode t25 4 H9 diode AA16 T4 w4 DIODE diode t25 4 G9 DSAUTAZ001023.txt diode t25 4 k8 Diode D25 N12 diode v6 N9
Text: Pin Information For The Stratix EP1S20 Device, ver 3.0 Bank Number B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 VREF Bank Pin Name/Function Optional Function s VREF0B2 VREF0B2 VREF0B2 VREF0B2
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EP1S20
RX32p
RX32n
TX32p
TX32n
RX31p
RX31n
TX31p
TX31n
RX30p
diode t25 4 g8
diode AA19
diode t25 4 H9
diode AA16
T4 w4 DIODE
diode t25 4 G9
DSAUTAZ001023.txt
diode t25 4 k8
Diode D25 N12
diode v6 N9
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Untitled
Abstract: No abstract text available
Text: BACK Accelerator Series FPGAs – ACT 3 PCI-Compliant Family Features • Up to 10,000 Gate Array Equivalent Gates. • Up to 250 MHz On-Chip Performance. • 9.0 ns Clock-to-Output. • Up to 1,153 Dedicated Flip-Flops. • Up to 228 User-Programmable I/O Pins.
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20-Pin
16-Bit)
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ACT 3 Accelerator
Abstract: ACT 3 accelerator FPGAs Actel Accelerator fpga datasheet DLM8 A1425A-3
Text: Accelerator Series FPGAs – ACT 3 PCI-Compliant Family Features • Up to 10,000 Gate Array Equivalent Gates. • Up to 250 MHz On-Chip Performance. • 9.0 ns Clock-to-Output. • Up to 1,153 Dedicated Flip-Flops. • Up to 228 User-Programmable I/O Pins.
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A1460BP
A14100BP
ACT 3 Accelerator
ACT 3 accelerator FPGAs
Actel Accelerator fpga datasheet
DLM8
A1425A-3
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Diode D25 N12
Abstract: diode AA17 diode AA19 diode t25 4 G9 diode t25 4 H9 AA12 diode diode t25 4 L9 diode t25 4 g8 diode t25 4 k8 diode M21
Text: Pin Information For The Stratix EP1S10 Device, ver 3.3 Bank Number B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B1 B1 B1 B1 B1 B1 B1 B1 B1 B1 B1 B1
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EP1S10
Diode D25 N12
diode AA17
diode AA19
diode t25 4 G9
diode t25 4 H9
AA12 diode
diode t25 4 L9
diode t25 4 g8
diode t25 4 k8
diode M21
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diode t25 4 k8
Abstract: diode t25 4 L9 diode t25 4 g8 diode t25 4 G9 diode t25 4 k6 diode t25 4 B9 Diode D25 N12 diode t25 4 d7 diode t25 4 j6 diode t25 4 F6
Text: Pin Information For The Stratix EP1S20 Device, ver 3.1 Bank Number B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2
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EP1S20
diode t25 4 k8
diode t25 4 L9
diode t25 4 g8
diode t25 4 G9
diode t25 4 k6
diode t25 4 B9
Diode D25 N12
diode t25 4 d7
diode t25 4 j6
diode t25 4 F6
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A1425A-3
Abstract: No abstract text available
Text: ACT3PCI.fm v6 Page 1 Tuesday, August 12, 1997 11:17 AM Accelerator Series FPGAs: ACT 3 PCI-Compliant Family F e atures • Up to 10,000 Gate Array Equivalent Gates. • Up to 250 MHz On-Chip Performance. • 9.0 ns Clock-to-Output. • Up to 1,153 Dedicated Flip-Flops.
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A1460B
A1425A-3
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896-Pin
Abstract: smartpower IO290 Axcelerator Family FPGAs
Text: v2.2 Axcelerator Family FPGAs u e Leading-Edge Performance • • • • – 350+ MHz System Performance 500+ MHz Internal Performance High-Performance Embedded FIFOs 700 Mb/s LVDS Capable I/Os Specifications • • • • • Up to 2 Million Equivalent System Gates
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MA 6013
Abstract: No abstract text available
Text: v2.5 Axcelerator Family FPGAs u e Leading-Edge Performance • • • • – 350+ MHz System Performance 500+ MHz Internal Performance High-Performance Embedded FIFOs 700 Mb/s LVDS Capable I/Os Specifications • • • • • Up to 2 Million Equivalent System Gates
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ACTEL CCGA 1152 mechanical
Abstract: AX125 AX2000 CQ208 CQ256 CS180 FG256 PQ208 Trd16 Axcelerator Family FPGAs
Text: v2.8 Axcelerator Family FPGAs u e Leading-Edge Performance • • • • – 350+ MHz System Performance 500+ MHz Internal Performance High-Performance Embedded FIFOs 700 Mb/s LVDS Capable I/Os Specifications • • • • • Up to 2 Million Equivalent System Gates
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ACTEL CCGA 1152 mechanical
Abstract: lga 4x4 footprint AX125 AX2000 CQ208 CS180 FG256 PQ208 624-Pin tx 434
Text: v2.7 Axcelerator Family FPGAs u e Leading-Edge Performance • • • • – 350+ MHz System Performance 500+ MHz Internal Performance High-Performance Embedded FIFOs 700 Mb/s LVDS Capable I/Os Specifications • • • • • Up to 2 Million Equivalent System Gates
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GCLR
Abstract: 676P Axcelerator Family FPGAs
Text: v2.4 Axcelerator Family FPGAs u e Leading-Edge Performance • • • • – 350+ MHz System Performance 500+ MHz Internal Performance High-Performance Embedded FIFOs 700 Mb/s LVDS Capable I/Os Specifications • • • • • Up to 2 Million Equivalent System Gates
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AF4 din 74
Abstract: AF2.5 din 74 diode t25 4 g8 Axcelerator Family FPGAs
Text: v2.5 Axcelerator Family FPGAs u e Leading-Edge Performance • • • • – 350+ MHz System Performance 500+ MHz Internal Performance High-Performance Embedded FIFOs 700 Mb/s LVDS Capable I/Os Specifications • • • • • Up to 2 Million Equivalent System Gates
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altera an33 configuring FLEX 8000
Abstract: No abstract text available
Text: FLEX 10KE Embedded Programmable Logic Family November 1998. ver. 1.01 Features. Data Sheet • Preliminary Information ■ ■ ■ Em bedded program m able logic device PLD family, providing system integration in a single device Enhanced em bedded array for im plem enting megafunctions
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OCR Scan
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PDF
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16-bit
256-Pin
EPF10K30E
EPF10K50E
EPF10K100B
672-Pin
EPF10K100E
484-Pin
EPF10K130E
EPF10K200E
altera an33 configuring FLEX 8000
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rd8 f01 ad
Abstract: MOCK
Text: Æ k ù iil Accelerator Series FPGAs ACT 3 PCI-Compliant Family • HI m*S M F e a tu re s • Up to 10,000 Gate Array Equivalent Gates. • Highly Predictable, Synthesis-Friendly Architecture Supports High-Level Design Methodologies. . Up to 250 MHz On-Chip Performance.
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OCR Scan
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PDF
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20-Pin
16-Bit)
10Kresistorlo
rd8 f01 ad
MOCK
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