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    QL4058 Search Results

    QL4058 Datasheets (92)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF
    QL4058 Unknown 58,000 Usable PLD Gate QuickRAM ESP Combining Performance, Density and Embedded RAM Original PDF
    QL4058 QuickLogic Performance, Density and Embedded RAM with Low Cost and Complete Flexibility Original PDF
    QL4058-0PB456C QuickLogic 58,000 usable PLD gate QuickRAM ESP combining performance, density and embedded RAM. Original PDF
    QL4058-0PB456C QuickLogic 58,000 Usable PLD Gate QuickRAM ESP Combining Performance, Density, and Embedded RAM Original PDF
    QL4058-0PB456I QuickLogic 58,000 Usable PLD Gate QuickRAM ESP Combining Performance, Density, and Embedded RAM Original PDF
    QL4058-0PB456I QuickLogic 58,000 usable PLD gate QuickRAM ESP combining performance, density and embedded RAM. Original PDF
    QL4058-0PB456M QuickLogic 58,000 Usable PLD Gate QuickRAM ESP Combining Performance, Density, and Embedded RAM Original PDF
    QL4058-0PB456M QuickLogic 58,000 usable PLD gate QuickRAM ESP combining performance, density and embedded RAM. Original PDF
    QL4058-0PQ208C QuickLogic 58,000 Usable PLD Gate QuickRAM ESP Combining Performance, Density, and Embedded RAM Original PDF
    QL4058-0PQ208C QuickLogic 58,000 usable PLD gate QuickRAM ESP combining performance, density and embedded RAM. Original PDF
    QL4058-0PQ208I QuickLogic 58,000 usable PLD gate QuickRAM ESP combining performance, density and embedded RAM. Original PDF
    QL4058-0PQ208I QuickLogic 58,000 Usable PLD Gate QuickRAM ESP Combining Performance, Density, and Embedded RAM Original PDF
    QL4058-0PQ208M QuickLogic 58,000 usable PLD gate QuickRAM ESP combining performance, density and embedded RAM. Original PDF
    QL4058-0PQ208M QuickLogic 58,000 Usable PLD Gate QuickRAM ESP Combining Performance, Density, and Embedded RAM Original PDF
    QL4058-0PQ240C QuickLogic 58,000 Usable PLD Gate QuickRAM ESP Combining Performance, Density, and Embedded RAM Original PDF
    QL4058-0PQ240C QuickLogic 58,000 usable PLD gate QuickRAM ESP combining performance, density and embedded RAM. Original PDF
    QL4058-0PQ240I QuickLogic 58,000 Usable PLD Gate QuickRAM ESP Combining Performance, Density, and Embedded RAM Original PDF
    QL4058-0PQ240I QuickLogic 58,000 usable PLD gate QuickRAM ESP combining performance, density and embedded RAM. Original PDF
    QL4058-0PQ240M QuickLogic 58,000 usable PLD gate QuickRAM ESP combining performance, density and embedded RAM. Original PDF
    QL4058-0PQ240M QuickLogic 58,000 Usable PLD Gate QuickRAM ESP Combining Performance, Density, and Embedded RAM Original PDF

    QL4058 Datasheets Context Search

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    Untitled

    Abstract: No abstract text available
    Text: QL4058 QuickRAM Data Sheet • • • • • • 58,000 Usable PLD Gate QuickRAM ESP Combining Performance, Density and Embedded RAM Device Highlights Advanced I/O Capabilities • Interfaces with both 3.3 V and 5.0 V devices High Performance & High Density


    Original     		PDF QL4058 16-bit

    PQ208

    Abstract: PQ240 QL4058 QL4058-1PB456C QL4058-1PQ208C QL4058-1PQ240C aldec g2
    Text: QL4058 QuickRAM Data Sheet • • • • • • 58,000 Usable PLD Gate QuickRAM ESP Combining Performance, Density and Embedded RAM Device Highlights Advanced I/O Capabilities • Interfaces with both 3.3 V and 5.0 V devices High Performance & High Density


    Original     		PDF QL4058 16-bit PQ208 PQ240 QL4058-1PB456C QL4058-1PQ208C QL4058-1PQ240C aldec g2

    Untitled

    Abstract: No abstract text available
    Text: QL4058 - QuickRAMTM 58,000 Usable PLD Gate QuickRAM ESP Combining Performance, Density, and Embedded RAM QL4058 - QuickRAM DEVICE HIGHLIGHTS Device Highlights High Performance & High Density • 58,000 Usable PLD Gates with 252 I/Os ■ 300 MHz 16-bit Counters, 400 MHz Datapaths,


    Original     		PDF QL4058 16-bit

    Untitled

    Abstract: No abstract text available
    Text: QL4058 - QuickRAMTM 58,000 Usable PLD Gate QuickRAM ESP Combining Performance, Density, and Embedded RAM last updated 5/17/2000 QL4058 - QuickRAM DEVICE HIGHLIGHTS Device Highlights High Performance & High Density • 58,000 Usable PLD Gates with 252 I/Os


    Original     		PDF QL4058 16-bit

    240-PIN

    Abstract: AA23 QL3060-1PQ240C QL4058 QL4058-1PB456C QL4058-1PQ208C
    Text: QL4058 58,000 Usable PLD Gate QuickRAM ESP Combining Performance, Density, and Embedded RAM Last Updated: April 15, 1999 QuickRAM HIGHLIGHTS … 58,000 usable PLD gates, 252 I/O pins High Performance and High Density - 58,000 Usable PLD Gates with 252 I/Os


    Original     		PDF QL4058 16-bit 152-bit QL4058 240-PIN AA23 QL3060-1PQ240C QL4058-1PB456C QL4058-1PQ208C

    240-PIN

    Abstract: AA23 QL4058 QL4058-1PB456C QL4058-1PQ208C QL4058-1PQ240C
    Text: Back QL4058 58,000 Usable PLD Gate QuickRAM ESP Combining Performance, Density, and Embedded RAM PRELIMINARY DATA QuickRAM HIGHLIGHTS … 58,000 usable PLD gates, 252 I/O pins Last Updated: August 27, 1998 High Performance and High Density - 58,000 Usable PLD Gates with 252 I/Os


    Original     		PDF QL4058 16-bit 152-bit QL4058 456-PIN 240-PIN AA23 QL4058-1PB456C QL4058-1PQ208C QL4058-1PQ240C

    Untitled

    Abstract: No abstract text available
    Text: QL4058 - QuickRAMTM 58,000 Usable PLD Gate QuickRAM ESP Combining Performance, Density, and Embedded RAM last updated 5/17/2000 QL4058 - QuickRAM DEVICE HIGHLIGHTS Device Highlights High Performance & High Density • 58,000 Usable PLD Gates with 252 I/Os


    Original     		PDF QL4058 16-bit

    QL4090

    Abstract: pASIC 1 Family 160CQFP 208-CQFP
    Text: QL16x24B pASIC 1 Family Very-High-Speed CMOS FPGA Rev C pASIC HIGHLIGHTS …4,000 usable ASIC gates, 122 I/O pins Very High Speed – ViaLink metal-to-metal programmable–via antifuse technology, allows counter speeds over 150 MHz and logic cell delays of under 2 ns.


    Original     		PDF QL16x24B 16-by-24 84-pin 100-pin 144-pin 160-pin 16-bit V144-TQFP QL24x32B QL4090 pASIC 1 Family 160CQFP 208-CQFP

    208CQFP

    Abstract: No abstract text available
    Text: QL2007  3.3V and 5.0V pASIC 2 FPGA Combining Speed, Density, Low Cost and Flexibility Rev. E pASIC 2 HIGHLIGHTS Ultimate Verilog/VHDL Silicon Solution -Abundant, high-speed interconnect eliminates manual routing -Flexible logic cell provides high efficiency and performance


    Original     		PDF QL2007 -16-bit l144-TQFP QL24x32B 208-PQFP 208-CQFP 125oC MIL-STD-883 208CQFP

    asynchronous fifo vhdl

    Abstract: 8 BIT ALU design with verilog/vhdl code full subtractor using ic 74138 74139 for bcd to excess 3 code vhdl code for 8bit bcd to seven segment display 32 BIT ALU design with verilog/vhdl code 74594 16 BIT ALU design with verilog/vhdl code B1516 RAM1024
    Text: QuickWorks User Manual with SpDE Reference Release 2009.2.1 Contact Information QuickLogic Corporation 1277 Orleans Drive Sunnyvale, CA 94089 Phone: (408) 990-4000 (US) (905) 940-4149 (Canada) +(44) 1932-57-9011 (Europe) +(852) 2567-5441 (Asia) E-mail: info@quicklogic.com


    Original     		PDF

    FPGA 144 CPGA ASIC

    Abstract: QL5032 144TQFP PACKAGE 160-CQFP PLCC 144
    Text: p ASIC QUICKLOGIC DEVELOPMENT TOOLS Part Number Product Name QS-QWK-PC QuickWorks QS-QTL-WS QuickTools for Workstations N/A QuickWorks - Lite N/A QuickMap QT-DFP-PC-A 1 DeskFab Programmer Kit N/A Synosys Interface Kit N/A Viewlogic Interface Kit N/A Mentor Interface Kit


    Original     		PDF 44-PLCC 68-PLCC 68-CPGA 100-TQFP 84-PLCC 84-CPGA FPGA 144 CPGA ASIC QL5032 144TQFP PACKAGE 160-CQFP PLCC 144

    vhdl code for 4 channel dma controller

    Abstract: verilog code of 8 bit comparator vhdl code dma controller latgn pci to pci bridge verilog code asynchronous fifo vhdl verilog code 8 bit LFSR design of dma controller using vhdl vhdl code for DMA verilog code 16 bit LFSR
    Text: QL5032 User’s Guide Preliminary Draft March 9, 1999 QL5032 User’s Guide TABLE OF CONTENTS Setting up a QL5032 Project _ 1 Step-by-step Project Setup 1 Step 1: Create a QL5032 Project Folder _ 1


    Original     		PDF QL5032 1152-bits vhdl code for 4 channel dma controller verilog code of 8 bit comparator vhdl code dma controller latgn pci to pci bridge verilog code asynchronous fifo vhdl verilog code 8 bit LFSR design of dma controller using vhdl vhdl code for DMA verilog code 16 bit LFSR

    QL4090

    Abstract: QL4016 QL4058 240-PQFP
    Text: QuickRAM ESP Family 160 MHz FIFOs! Family Highlights High Performance and High Density ● Densities up to 150,000 usable PLD gates with 363 I/Os ● Faster than competing FPGA families at any density level ● 250 MHz 16-bit counters, 275 MHz Datapaths, 156 MHz


    Original     		PDF 16-bit 44-pin 456-pin QL4016 QL4036 QL4058 QL4090 QL4090 QL4016 QL4058 240-PQFP

    QL4016

    Abstract: QL4058 QL4090 5-input-XOR
    Text: Back QuickRAM ESP FAMILY Performance, Density and Embedded RAM with Low Cost and Complete Flexibility PRELIMINARY DATA FAMILY HIGHLIGHTS Last Updated: August 27, 1998 High Performance and High Density - Densities up to 150,000 usable PLD gates with 363 I/Os


    Original     		PDF 16-bit 152-bit QL4016 QL4058 QL4090 5-input-XOR

    Untitled

    Abstract: No abstract text available
    Text: QuickRAM Family Data Sheet • • • • • • QuickRAM ESP Combining Performance, Density and Embedded RAM Device Highlights High Performance & High Density Up to 316 I/O Pins • Up to 308 bi-directional input/output pins, PCI-compliant for 5.0 V and 3.3 V buses for


    Original     		PDF 16-bit

    84-PIN

    Abstract: 84-PLCC
    Text: QL2005  3.3V and 5.0V pASIC 2 FPGA Combining Speed, Density, Low Cost and Flexibility Rev. C pASIC 2 HIGHLIGHTS Ultimate Verilog/VHDL Silicon Solution -Abundant, high-speed interconnect eliminates manual routing -Flexible logic cell provides high efficiency and performance


    Original     		PDF QL2005 -16-bit 144-TQFP QL24x32B 208-PQFP 208-CQFP 125oC MIL-STD-883 84-PIN 84-PLCC

    100TQFP

    Abstract: 344RAM QL3040
    Text: QL2003  3.3V and 5.0V pASIC 2 FPGA Combining Speed, Density, Low Cost and Flexibility Rev. C pASIC 2 HIGHLIGHTS Ultimate Verilog/VHDL Silicon Solution -Abundant, high-speed interconnect eliminates manual routing -Flexible logic cell provides high efficiency and performance


    Original     		PDF QL2003 -16-bit l144-TQFP QL24x32B 208-PQFP 208-CQFP 125oC MIL-STD-883 100TQFP 344RAM QL3040

    QL4090

    Abstract: No abstract text available
    Text: QL12X16B pASIC 1 Family Very-High-Speed CMOS FPGA Rev C pASIC HIGHLIGHTS …2,000 usable ASIC gates, 88 I/O pins Very High Speed – ViaLink metal-to-metal programmable–via antifuse technology, allows counter speeds over 150 MHz and logic cell delays of under 2 ns.


    Original     		PDF QL12X16B 12-by-16 68-pin 84-pin 100-pin 16-bit Synops144-TQFP QL24x32B 208-PQFP QL4090

    QuickRAM Family Data Sheet

    Abstract: quickram TQFP 100PIN TMS 4016 QL4009 QL4009-1PF100C QL4009-1PL68C QL4009-1PL84C QL4016 QL4058
    Text: QuickRAM Family Data Sheet • • • • • • QuickRAM ESP Combining Performance, Density and Embedded RAM Device Highlights High Performance & High Density Up to 316 I/O Pins • Up to 308 bi-directional input/output pins, PCI-compliant for 5.0 V and 3.3 V buses for


    Original     		PDF 16-bit QuickRAM Family Data Sheet quickram TQFP 100PIN TMS 4016 QL4009 QL4009-1PF100C QL4009-1PL68C QL4009-1PL84C QL4016 QL4058

    intel 4040

    Abstract: QL3004 transistor equivalent table 557 cmos 4040 datasheet general cross references QL5064 QL4009 QL4016 QL4058 QL5030
    Text: EMBEDDED STANDARD PRODUCT A GENERATION AHEAD ! The Vialink Antifuse in 0.35µ µm CMOS QuickLogic Corporation 1277 Orleans Dr. Sunnyvale, CA 94089-1138 General Information: Applications Hotline FAX: EMAIL: WEB SITE: 408 990-4000 (408) 990-4100 (408) 990-4040


    Original     		PDF

    Untitled

    Abstract: No abstract text available
    Text: QuickRAM Family Data Sheet • • • • • • QuickRAM ESP Combining Performance, Density and Embedded RAM Device Highlights High Performance & High Density Up to 316 I/O Pins • Up to 308 bi-directional input/output pins, PCI-compliant for 5.0 V and 3.3 V buses for


    Original     		PDF 16-bit

    vhdl code for a grey-code counter

    Abstract: RAM256X4 electronic stethoscope project QL4090 QL5064 vhdl code of 4 bit comparator
    Text: Q U I C K L O G I C ’ S QUICKNEWS CONTENTS VOLUME Tech Talk with John Birkner • pages 2-3 QL4090-M New Military Product ■ page 4 QL2003 at Elevated Temperatures ■ page 5 Marketing Update ■ page 6 Technical Notes ■ page 7 Technical Q&A ■ pages 8-9


    Original     		PDF QL4090-M QL2003 QL907-2 vhdl code for a grey-code counter RAM256X4 electronic stethoscope project QL4090 QL5064 vhdl code of 4 bit comparator

    QL401

    Abstract: QL4009 QL4016 QL4058 QL4090
    Text: QuickRAM ESP FAMILY Performance, Density and Embedded RAM with Low Cost and Complete Flexibility Last Updated: April 21, 1999 FAMILY HIGHLIGHTS High Performance and High Density - Densities up to 90,000 usable PLD gates with 316 I/Os - Faster than competing FPGA families available at any density level


    Original     		PDF 16-bit 152-bit QL401 QL4009 QL4016 QL4058 QL4090

    Untitled

    Abstract: No abstract text available
    Text: QL4058 58,000 Usable PLD Gate QuickRAM ESP Combining Performance, Density, and Embedded RAM Last Updated: April 15, 1999 QuickRAM HIGHLIGHTS . 58,000 usable PLD gates, 252 I/O pins B High Performance and High Density - 58,000 Usable PLD Gates with 252 I/Os


    OCR Scan     		PDF QL4058 16-bit 152-bit OL4058