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    DS1002 Price and Stock

    Dinkle Enterprises DS10-02P

    JUMPER TERM BLK 2POS SCREW IN
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    DigiKey DS10-02P Bulk 1
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    Homevision Inc TYDS10022BLK

    Dual arms Sit-Stand Workstation
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    DigiKey TYDS10022BLK Box 1
    • 1 $304.99
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    Homevision Inc TYDS10020BLK

    TygerClaw Ergonomic Sit-Stand De
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    DigiKey TYDS10020BLK Ammo Pack 1
    • 1 $434.99
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    TDK-Lambda Corporation RDS100-24-12

    DC/DC CONVERTER 12V 100W
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    Homevision Inc TYDS10026BLK

    Notebook Stand
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    DigiKey TYDS10026BLK Box 1
    • 1 $86.99
    • 10 $73.98
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    DS1002 Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    lcmxo1200c

    Abstract: LCMXO256C-3TN100C LCMXO640C-3TN100C LCMXO1200C-4TN144C LCMXO1200C-3FTN256C LCMXO1200C-4FTN256C LCMXO256C LCMXO640C-3FTN256C fT324 LCMXO640C-3TN144C
    Text: MachXO Family Data Sheet Introduction Data Sheet DS1002 • Flexible I/O Buffer Features • Programmable sysIO buffer supports wide range of interfaces: − LVCMOS 3.3/2.5/1.8/1.5/1.2 − LVTTL − PCI − LVDS, Bus-LVDS, LVPECL, RSDS ■ Non-volatile, Infinitely Reconfigurable


    Original     		PDF DS1002 LCMXO640E-3TN144C LCMXO640E-4TN144C LCMXO640E-5TN144C LCMXO640E-3MN132C LCMXO640E-4MN132C LCMXO640E-5MN132C LCMXO640E-3FTN256C LCMXO640E-4FTN256C LCMXO640E-5FTN256C lcmxo1200c LCMXO256C-3TN100C LCMXO640C-3TN100C LCMXO1200C-4TN144C LCMXO1200C-3FTN256C LCMXO1200C-4FTN256C LCMXO256C LCMXO640C-3FTN256C fT324 LCMXO640C-3TN144C

    FTBGA

    Abstract: DS1002 LCMXO2280C-3MN132C LCMXO1200E-3FTN256C FTBGA 256 LCMXO2280C-4FTN324C fT324 LCMXO2280 132-BA LVCMOS15
    Text: MachXO Family Data Sheet Introduction Data Sheet DS1002 • Flexible I/O Buffer Features • Programmable sysIO buffer supports wide range of interfaces: − LVCMOS 3.3/2.5/1.8/1.5/1.2 − LVTTL − PCI − LVDS, Bus-LVDS, LVPECL, RSDS ■ Non-volatile, Infinitely Reconfigurable


    Original     		PDF DS1002 LCMXO2280E-4MN132C LCMXO2280E-5MN132C LCMXO2280E-3FTN256C LCMXO2280E-4FTN256C LCMXO2280E-5FTN256C LCMXO2280E-3FTN324C LCMXO2280E-4FTN324C LCMXO2280E-5FTN324C FTBGA DS1002 LCMXO2280C-3MN132C LCMXO1200E-3FTN256C FTBGA 256 LCMXO2280C-4FTN324C fT324 LCMXO2280 132-BA LVCMOS15

    TN1087

    Abstract: P6V1
    Text: MachXO Family Data Sheet DS1002 Version 02.6 August 2007 MachXO Family Data Sheet Introduction August 2006 Data Sheet DS1002 • Flexible I/O Buffer Features • Programmable sysIO buffer supports wide range of interfaces: − LVCMOS 3.3/2.5/1.8/1.5/1.2


    Original     		PDF DS1002 DS1002 MachXO640. 400ns) 100ns) TN1087 P6V1

    Untitled

    Abstract: No abstract text available
    Text: MachXO Family Data Sheet DS1002 Version 02.1 May 2006 MachXO Family Data Sheet Introduction April 2006 Data Sheet DS1002 • Flexible I/O Buffer Features • Programmable sysIO buffer supports wide range of interfaces: − LVCMOS 3.3/2.5/1.8/1.5/1.2 − LVTTL


    Original     		PDF DS1002 DS1002 256-ftBGA MachXO640.

    Untitled

    Abstract: No abstract text available
    Text: MachXO Family Data Sheet DS1002 Version 02.3 November 2006 MachXO Family Data Sheet Introduction August 2006 Data Sheet DS1002 • Flexible I/O Buffer Features • Programmable sysIO buffer supports wide range of interfaces: − LVCMOS 3.3/2.5/1.8/1.5/1.2


    Original     		PDF DS1002 DS1002 256-ftBGA MachXO640. 400ns) 100ns)

    Untitled

    Abstract: No abstract text available
    Text: MachXO Family Data Sheet DS1002 Version 03.0, June 2013 MachXO Family Data Sheet Introduction June 2013 Data Sheet DS1002  Flexible I/O Buffer Features • Programmable sysIO buffer supports wide range of interfaces:  LVCMOS 3.3/2.5/1.8/1.5/1.2  LVTTL


    Original     		PDF DS1002 DS1002 256-pin MachXO1200 MachXO2280

    PR4B

    Abstract: No abstract text available
    Text: MachXO Family Data Sheet DS1002 Version 02.5 February 2007 MachXO Family Data Sheet Introduction August 2006 Data Sheet DS1002 • Flexible I/O Buffer Features • Programmable sysIO buffer supports wide range of interfaces: − LVCMOS 3.3/2.5/1.8/1.5/1.2


    Original     		PDF DS1002 DS1002 MachXO640. 400ns) 100ns) PR4B

    FTBGA 256

    Abstract: LCMXO2280C-3FTN256I LCMXO256C-3TN100I LCMXO1200C-3FTN256I LCMXO640C-3TN100I LCMXO1200C DS1002 LCMXO2280C-3FTN324C FTN256 LCMXO2280C-4FTN324C
    Text: MachXO Family Data Sheet Introduction Data Sheet DS1002 • Flexible I/O Buffer Features • Programmable sysIO buffer supports wide range of interfaces: − LVCMOS 3.3/2.5/1.8/1.5/1.2 − LVTTL − PCI − LVDS, Bus-LVDS, LVPECL, RSDS ■ Non-volatile, Infinitely Reconfigurable


    Original     		PDF DS1002 N144I LCMXO2280C-4TN144I LCMXO2280C-3MN132I LCMXO2280C-4MN132I LCMXO2280C-3FTN256I LCMXO2280C-4FTN256I LCMXO2280C-3FTN324I LCMXO2280C-4FTN324I FTBGA 256 LCMXO2280C-3FTN256I LCMXO256C-3TN100I LCMXO1200C-3FTN256I LCMXO640C-3TN100I LCMXO1200C DS1002 LCMXO2280C-3FTN324C FTN256 LCMXO2280C-4FTN324C

    Untitled

    Abstract: No abstract text available
    Text: MachXO Family Data Sheet DS1002 Version 03.0, June 2013 MachXO Family Data Sheet Introduction November 2012 Data Sheet DS1002  Flexible I/O Buffer Features • Programmable sysIO buffer supports wide range of interfaces:  LVCMOS 3.3/2.5/1.8/1.5/1.2


    Original     		PDF DS1002 DS1002 256-pin MachXO1200 MachXO2280

    LCMXO640C-3FT256C

    Abstract: LCMXO2280C-3FTN324C LCMXO640C-3TN100C LCMXO1200C-3TN100C LCMXO1200C-3FTN256I LCMXO640C-4TN144I LCMXO640C-3T100C LCMXO2280C-4FTN324C LCMXO640C-3T144I lattice machxo lcmxo1200c
    Text: MachXO Family Data Sheet DS1002 Version 02.7, November 2007 MachXO Family Data Sheet Introduction August 2006 Data Sheet DS1002 • Flexible I/O Buffer Features • Programmable sysIO buffer supports wide range of interfaces: − LVCMOS 3.3/2.5/1.8/1.5/1.2


    Original     		PDF DS1002 DS1002 400ns) 100ns) LCMXO640C-3FT256C LCMXO2280C-3FTN324C LCMXO640C-3TN100C LCMXO1200C-3TN100C LCMXO1200C-3FTN256I LCMXO640C-4TN144I LCMXO640C-3T100C LCMXO2280C-4FTN324C LCMXO640C-3T144I lattice machxo lcmxo1200c

    LCMXO2280C-3TN144I

    Abstract: LCMXO1200 LCMXO2280 LCMXO256 LCMXO640 LVCMOS15 LVCMOS25 LVCMOS33 LCMXO640C-3TN100C 3TN100C
    Text: MachXO Family Data Sheet DS1002 Version 02.2 August 2006 MachXO Family Data Sheet Introduction August 2006 Data Sheet DS1002 • Flexible I/O Buffer Features • Programmable sysIO buffer supports wide range of interfaces: − LVCMOS 3.3/2.5/1.8/1.5/1.2


    Original     		PDF DS1002 DS1002 256-ftBGA MachXO640. LCMXO2280C-3TN144I LCMXO1200 LCMXO2280 LCMXO256 LCMXO640 LVCMOS15 LVCMOS25 LVCMOS33 LCMXO640C-3TN100C 3TN100C

    LCMXO256C-3MN100C

    Abstract: LCMXO2280C-3FTN256I lcmxo1200c-3bn256c FTBGA LCMXO2280E-4M132I CABGA FTBGA 256 lattice machxo lcmxo1200c-3tn144c LCMXO1200C-4TN144C LCMXO640
    Text: MachXO Family Data Sheet DS1002 Version 02.8, June 2009 MachXO Family Data Sheet Introduction June 2009 Data Sheet DS1002 • Flexible I/O Buffer Features • Programmable sysIO buffer supports wide range of interfaces: − LVCMOS 3.3/2.5/1.8/1.5/1.2 − LVTTL


    Original     		PDF DS1002 DS1002 256-pin LCMXO256C-3MN100C LCMXO2280C-3FTN256I lcmxo1200c-3bn256c FTBGA LCMXO2280E-4M132I CABGA FTBGA 256 lattice machxo lcmxo1200c-3tn144c LCMXO1200C-4TN144C LCMXO640

    LCMXO2280

    Abstract: LCMXO2280C-3FTN324C LCMXO640C-3FT256C FTBGA LCMXO2280C-3FTN256I LCMXO2280C-4FTN324C LCMXO640C-3T100C LCMXO1200 LCMXO256 LCMXO640
    Text: MachXO Family Data Sheet DS1002 Version 02.9, July 2010 MachXO Family Data Sheet Introduction June 2009 Data Sheet DS1002  Flexible I/O Buffer Features • Programmable sysIO buffer supports wide range of interfaces:  LVCMOS 3.3/2.5/1.8/1.5/1.2  LVTTL


    Original     		PDF DS1002 DS1002 100ns) 256-pin LCMXO2280 LCMXO2280C-3FTN324C LCMXO640C-3FT256C FTBGA LCMXO2280C-3FTN256I LCMXO2280C-4FTN324C LCMXO640C-3T100C LCMXO1200 LCMXO256 LCMXO640

    FTBGA

    Abstract: No abstract text available
    Text: MachXO Family Data Sheet DS1002 Version 02.4 December 2006 MachXO Family Data Sheet Introduction August 2006 Data Sheet DS1002 • Flexible I/O Buffer Features • Programmable sysIO buffer supports wide range of interfaces: − LVCMOS 3.3/2.5/1.8/1.5/1.2


    Original     		PDF DS1002 DS1002 256-ftBGA MachXO640. 400ns) 100ns) FTBGA

    Untitled

    Abstract: No abstract text available
    Text: MachXO Family Data Sheet DS1002 Version 02.2 August 2006 MachXO Family Data Sheet Introduction August 2006 Data Sheet DS1002 • Flexible I/O Buffer Features • Programmable sysIO buffer supports wide range of interfaces: − LVCMOS 3.3/2.5/1.8/1.5/1.2


    Original     		PDF DS1002 DS1002 256-ftBGA MachXO640.

    Untitled

    Abstract: No abstract text available
    Text: MachXO Family Data Sheet DS1002 Version 02.7, November 2007 MachXO Family Data Sheet Introduction August 2006 Data Sheet DS1002 • Flexible I/O Buffer Features • Programmable sysIO buffer supports wide range of interfaces: − LVCMOS 3.3/2.5/1.8/1.5/1.2


    Original     		PDF DS1002 DS1002 400ns) 100ns)

    ROM16X1

    Abstract: ROM16x8 8x1 mux machxo256 IEEE1532 LCMXO1200 LCMXO2280 LCMXO256 LCMXO640 LVCMOS33
    Text: DS1002Ver. 2.8-J June 2009 MachXO ファミリ・データシート DS1002 Version 02.8, June 2009 DISCLAIMER Translation of Lattice materials into languages other than English is intended as a convenience for our non-English reading customers. Although we attempt to provide


    Original     		PDF DS1002Ver. DS1002 256-ball ROM16X1 ROM16x8 8x1 mux machxo256 IEEE1532 LCMXO1200 LCMXO2280 LCMXO256 LCMXO640 LVCMOS33

    Untitled

    Abstract: No abstract text available
    Text: MachXO Family Data Sheet DS1002 Version 02.8, June 2009 MachXO Family Data Sheet Introduction June 2009 Data Sheet DS1002 • Flexible I/O Buffer Features • Programmable sysIO buffer supports wide range of interfaces: − LVCMOS 3.3/2.5/1.8/1.5/1.2 − LVTTL


    Original     		PDF DS1002 DS1002 256-pin

    LCMXO2280C-4T100I

    Abstract: No abstract text available
    Text: MachXO Family Data Sheet DS1002 Version 02.7, November 2007 MachXO Family Data Sheet Introduction August 2006 Data Sheet DS1002 • Flexible I/O Buffer Features • Programmable sysIO buffer supports wide range of interfaces: − LVCMOS 3.3/2.5/1.8/1.5/1.2


    Original     		PDF DS1002 DS1002 400ns) 100ns) LCMXO2280C-4T100I

    54ACTQ657

    Abstract: No abstract text available
    Text: 54ACTQ657 Quiet Series Octal Bidirectional Transceiver with 8-Bit Parity Generator/Checker and TRI-STATE Outputs General Description Features The ACTQ657 contains eight non-inverting buffers with TRI-STATE outputs and an 8-bit parity generator/checker. Intended for bus oriented applications, the device combines


    Original     		PDF 54ACTQ657 ACTQ657 54ACTQ657

    54AC253

    Abstract: 54ACT253
    Text: 54AC253 • 54ACT253 Dual 4-Input Multiplexer with TRI-STATE Outputs General Description The ’AC/’ACT253 is a dual 4-input multiplexer with TRI-STATE outputs. It can select two bits of data from four sources using common select inputs. The outputs may be individually switched to a high impedance state with a HIGH


    Original     		PDF 54AC253 54ACT253 ACT253 AC253: ACT253: DS100285-1 DS10028959 54AC253 54ACT253

    54ACQ374

    Abstract: 54ACTQ374 ACQ374 ACT374 ACTQ374
    Text: 54ACQ374 • 54ACTQ374 Quiet Series Octal D Flip-Flop with TRI-STATE Outputs General Description The ’ACQ/’ACTQ374 is a high-speed, low-power octal D-type flip-flop featuring separate D-type inputs for each flip-flop and TRI-STATE outputs for bus-oriented applications. A buffered Clock CP and Output Enable (OE) are


    Original     		PDF 54ACQ374 54ACTQ374 ACTQ374 54ACQ374 54ACTQ374 ACQ374 ACT374

    54ACQ245

    Abstract: 54ACTQ245 ACQ245 ACT245
    Text: 54ACQ245 • 54ACTQ245 Quiet Series Octal Bidirectional Transceiver with TRI-STATE Inputs/Outputs General Description Features The ’ACQ/’ACTQ245 contains eight non-inverting bidirectional buffers with TRI-STATE outputs and is intended for bus-oriented applications. Current sinking capability is


    Original     		PDF 54ACQ245 54ACTQ245 ACTQ245 quiet959 54ACQ245 54ACTQ245 ACQ245 ACT245

    DS100233

    Abstract: 54ACTQ543 54ACTQ543DMQB 54ACTQ543FMQB 54ACTQ543LMQB E28A J24A W24C actq543
    Text: 54ACTQ543 Quiet Series Octal Registered Transceiver with TRI-STATE Outputs General Description Features The ACTQ543 is a non-inverting octal transceiver containing two sets of D-type registers for temporary storage of data flowing in either direction. Separate Latch Enable and Output Enable inputs are provided for each register to permit independent input and output control in either direction of data


    Original     		PDF 54ACTQ543 ACTQ543 dyna959 DS100233 54ACTQ543 54ACTQ543DMQB 54ACTQ543FMQB 54ACTQ543LMQB E28A J24A W24C