74AC11032DBLE Search Results
74AC11032DBLE Price and Stock
Texas Instruments 74AC11032DBLE |
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Distributors | Part | Package | Stock | Lead Time | Min Order Qty | Price | Buy | ||||
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74AC11032DBLE | 12,000 |
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74AC11032DBLE | 9,600 |
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74AC11032DBLE Datasheets (3)
Part | ECAD Model | Manufacturer | Description | Curated | Datasheet Type | |
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74AC11032DBLE |
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QUADRUPLE 2-INPUT POSITIVE-OR GATES | Original | |||
74AC11032DBLE |
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Quadruple 2-Input Positive-OR Gates 16-SSOP -40 to 85 | Original | |||
74AC11032DBLE |
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74AC11032 - Quadruple 2-Input Positive-OR Gates 16-SSOP -40 to 85 | Original |
74AC11032DBLE Datasheets Context Search
Catalog Datasheet | Type | Document Tags | |
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Contextual Info: 74AC11032 QUADRUPLE 2-INPUT POSITIVE-OR GATE SCAS007C – JULY 1987 – REVISED APRIL 1996 D D D D D, DB, OR N PACKAGE TOP VIEW Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-µm Process |
Original |
74AC11032 SCAS007C 500-mA 300-mil 74AC11032DR 74AC11032N 74AC11032NSR | |
74AC11032
Abstract: 74AC11032D 74AC11032DBLE 74AC11032DBR 74AC11032DR 74AC11032N 74AC11032NSR MO-150
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Original |
74AC11032 SCAS007C 500-mA 300-mil 74AC11032 74AC11032D 74AC11032DBLE 74AC11032DBR 74AC11032DR 74AC11032N 74AC11032NSR MO-150 | |
Contextual Info: 74AC11032 QUADRUPLE 2-INPUT POSITIVE-OR GATE SCAS007C – JULY 1987 – REVISED APRIL 1996 D D D D D, DB, OR N PACKAGE TOP VIEW Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-µm Process |
Original |
74AC11032 SCAS007C 500-mA 300-mil | |
Contextual Info: 74AC11032 QUADRUPLE 2-INPUT POSITIVE-OR GATE SCAS007C – JULY 1987 – REVISED APRIL 1996 D D D D D, DB, OR N PACKAGE TOP VIEW Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-µm Process |
Original |
74AC11032 SCAS007C 500-mA 300-mil | |
Contextual Info: 74AC11032 QUADRUPLE 2-INPUT POSITIVE-OR GATE SCAS007C – JULY 1987 – REVISED APRIL 1996 D D D D D, DB, OR N PACKAGE TOP VIEW Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-µm Process |
Original |
74AC11032 SCAS007C 500-mA 300-mil | |
Contextual Info: 74AC11032 QUADRUPLE 2-INPUT POSITIVE-OR GATE SCAS007C – JULY 1987 – REVISED APRIL 1996 D D D D D, DB, OR N PACKAGE TOP VIEW Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-µm Process |
Original |
74AC11032 SCAS007C 500-mA 300-mil MSSO002E MO-150 | |
Contextual Info: 74AC11032 QUADRUPLE 2-INPUT POSITIVE-OR GATE SCAS007C – JULY 1987 – REVISED APRIL 1996 D D D D D, DB, OR N PACKAGE TOP VIEW Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-µm Process |
Original |
74AC11032 SCAS007C 500-mA 300-mil MSSO002E MO-150 | |
Contextual Info: 74AC11032 QUADRUPLE 2-INPUT POSITIVE-OR GATE SCAS007C – JULY 1987 – REVISED APRIL 1996 D D D D D, DB, OR N PACKAGE TOP VIEW Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-µm Process |
Original |
74AC11032 SCAS007C 500-mA 300-mil MSSO002E MO-150 | |
Contextual Info: 74AC11032 QUADRUPLE 2-INPUT POSITIVE-OR GATE SCAS007C – JULY 1987 – REVISED APRIL 1996 D D D D D, DB, OR N PACKAGE TOP VIEW Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-µm Process |
Original |
74AC11032 SCAS007C 500-mA 300-mil | |
74AC11032
Abstract: 74AC11032D 74AC11032DBLE 74AC11032DBR 74AC11032DBRE4 74AC11032DE4 74AC11032DR 74AC11032DRE4 74AC11032N
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Original |
74AC11032 SCAS007C 500-mA 300-mil 74AC11032 74AC11032D 74AC11032DBLE 74AC11032DBR 74AC11032DBRE4 74AC11032DE4 74AC11032DR 74AC11032DRE4 74AC11032N | |
74AC11032
Abstract: 74AC11032D 74AC11032DBLE 74AC11032DBR 74AC11032DBRE4 74AC11032DBRG4 74AC11032DE4 74AC11032DG4 74AC11032DR
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Original |
74AC11032 SCAS007C 500-mA 300-mil 74AC11032 74AC11032D 74AC11032DBLE 74AC11032DBR 74AC11032DBRE4 74AC11032DBRG4 74AC11032DE4 74AC11032DG4 74AC11032DR | |
Contextual Info: 74AC11032 QUADRUPLE 2-INPUT POSITIVE-OR GATE SCAS007C – JULY 1987 – REVISED APRIL 1996 D D D D D, DB, OR N PACKAGE TOP VIEW Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-µm Process |
Original |
74AC11032 SCAS007C 500-mA 300-mil MSSO002E MO-150 | |
Contextual Info: 74AC11032 QUADRUPLE 2-INPUT POSITIVE-OR GATE SCAS007C – JULY 1987 – REVISED APRIL 1996 D D D D D, DB, OR N PACKAGE TOP VIEW Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-µm Process |
Original |
74AC11032 SCAS007C 500-mA 300-mil scla008 scyd013 sdyu001x sgyc003d scyb017a | |
74AC11032
Abstract: 74AC11032D 74AC11032DBLE 74AC11032DBR 74AC11032DBRE4 74AC11032DBRG4 74AC11032DE4 74AC11032DG4 74AC11032DR
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Original |
74AC11032 SCAS007C 500-mA 300-mil MO-150 74AC11032 74AC11032D 74AC11032DBLE 74AC11032DBR 74AC11032DBRE4 74AC11032DBRG4 74AC11032DE4 74AC11032DG4 74AC11032DR | |
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Contextual Info: 74AC11032 QUADRUPLE 2-INPUT POSITIVE-OR GATE SCAS007C – JULY 1987 – REVISED APRIL 1996 D D D D D, DB, OR N PACKAGE TOP VIEW Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-µm Process |
Original |
74AC11032 SCAS007C 500-mA 300-mil |