64 X 1 SDRAM CONTROLLER Search Results

Contextual Info: NT2GC64B C H4B0PF / NT4GC64B(C)88B0(1)NF / NT8GC64B(C)8HB0NF 2GB: 256M x 64 / 4GB: 512M x 64 / 8GB: 1024M x 64 PC3(L)-12800 Unbuffered DDR3 SDRAM DIMM Based on DDR3(L)-1600 256Mx16 and 512Mx8 SDRAM B-Die Features •Performance: Speed Sort PC3(L)-12800 -DI

Contextual Info: NT2GC64B C H4B0PS / NT4GC64B(C)88B0(1)NS / NT8GC64B(C)8HB0NS 2GB: 256M x 64 / 4GB: 512M x 64 / 8GB: 1024M x 64 PC3(L)-10600 / PC3(L)-12800 Unbuffered DDR3 SO-DIMM Based on DDR3(L)-1333/1600 256Mx16 and 512Mx8 SDRAM B-Die Features •Performance: Speed Sort

Contextual Info: White Electronic Designs W3H32M64E-XSBX 32M x 64 DDR2 SDRAM 208 PBGA Multi-Chip Package FEATURES „ Data rate = 667, 533, 400 „ Write latency = Read latency - 1* tCK „ Package: „ Commercial, Industrial and Military Temperature Ranges „ Organized as 32M x 64, user configurable as 2 x

Contextual Info: White Electronic Designs W3H32M64E-XSBX 32M x 64 DDR2 SDRAM 208 PBGA Multi-Chip Package FEATURES „ Data rate = 667, 533, 400 „ Write latency = Read latency - 1* tCK „ Package: „ Commercial, Industrial and Military Temperature Ranges „ Organized as 32M x 64, user configurable as 2 x

Contextual Info: White Electronic Designs W3H32M64E-XSBX 32M x 64 DDR2 SDRAM 208 PBGA Multi-Chip Package FEATURES  Data rate = 667, 533, 400 Mb/s  Write latency = Read latency - 1* tCK  Package:  Commercial, Industrial and Military Temperature Ranges  Organized as 32M x 64, user configurable as 2 x

Contextual Info: White Electronic Designs W3H32M64E-XSBX 32M x 64 DDR2 SDRAM 208 PBGA Multi-Chip Package FEATURES „ Data rate = 667, 533, 400 Mb/s „ Write latency = Read latency - 1* tCK „ Package: „ Commercial, Industrial and Military Temperature Ranges „ Organized as 32M x 64, user configurable as 2 x

NT2GC64B88G0

Abstract: 12PER NT2GC64B
Contextual Info: NT2GC64B C 88G0(1)NS / NT4GC64B(C)8HG0(1)NS 2GB: 256M x 64 / 4GB: 512M x 64 PC3(L)-10600 / PC3(L)-12800 Unbuffered DDR3 SO-DIMM Based on DDR3-1333/1600 256Mx8 SDRAM G-Die Features •Performance: Speed Sort PC3(L)-10600 PC3(L)-12800 -CG -DI Unit DIMM CAS Latency

Contextual Info: APAX-5520CE PC-based Controller with XScale CPU Features NEW ƒ Onboard XScale® PXA270 520 MHz processor ƒ 64 MB SDRAM on board, 32 MB Flash ƒ Expands I/O by connecting with APAX-5000 I/O modules ƒ Windows CE .NET ready platform ƒ 1 x VGA port for display and 1 x USB ports

Contextual Info: ADVANCE 64 MEG: x4, x8, x16 SDRAM p i i c n o N MT48LC16M4A1 /A2 -4 Meg x 4 x 4 banks MT48LC8M8A1/A2 - 2 Meg x 8 x 4 banks MT48LC4M16A1 /A2 -1 Meg x 16 x 4 banks SYNCHRONOUS DRAM FEATURES • PC 100-compliant functionality • Fully synchronous; all signals registered on positive

Contextual Info: ADVANCE 64 MEG: x4, x8, x16 SDRAM p i i c n o N MT48LC16M4A1 /A2 -4 Meg x 4 x 4 banks MT48LC 8M8A1/A2 - 2 Meg x 8 x 4 banks MT48LC4M16A1 /A2 -1 Meg x 16 x 4 banks SYNCHRONOUS DRAM FEATURES PIN ASSIGNMENT Top View • PC 100-compliant functionality • Fully synchronous; all signals registered on positive

PS-8000

Abstract: W3H64M64E W3H32M64E-XSBX
Contextual Info: White Electronic Designs W3H64M64E-XSBX ADVANCED* 64M x 64 DDR2 SDRAM 208 PBGA Multi-Chip Package FEATURES „ Data rate = 667*, 533, 400 „ Write latency = Read latency - 1* tCK „ Package: „ Commercial, Industrial and Military Temperature Ranges • 1.0mm pitch

icc20

Contextual Info: White Electronic Designs W3H128M64E-XSBX ADVANCED* 128M x 64 DDR2 SDRAM 208 PBGA Multi-Chip Package FEATURES „ Data rate = 667, 533, 400 Mb/s „ Posted CAS additive latency: 0, 1, 2, 3 or 4 „ Package: „ Write latency = Read latency - 1* tCK • 208 Plastic Ball Grid Array PBGA , 16 x 22mm

W3H64M64E

Contextual Info: White Electronic Designs W3H64M64E-XSBX 64M x 64 DDR2 SDRAM 208 PBGA Multi-Chip Package FEATURES „ Data rate = 667, 533, 400 „ Write latency = Read latency - 1* tCK „ Package: „ Commercial, Industrial and Military Temperature Ranges • 1.0mm pitch „

Contextual Info: White Electronic Designs W3H64M64E-XSBX 64M x 64 DDR2 SDRAM 208 PBGA Multi-Chip Package FEATURES „ Data rate = 667, 533, 400 „ Write latency = Read latency - 1* tCK „ Package: „ Commercial, Industrial and Military Temperature Ranges • 1.0mm pitch „

SL64A6M32M8L

Abstract: SL64A6M32M8L-A05AWU
Contextual Info: SL64A6M32M8L-A05AWU Where U = RoHS lead-free compliance 32M X 64 Bit (256 MB) 200-Pin DDR SDRAM SO-DIMM (PC3200) 1 Rank x 16 FEATURES GENERAL DESCRIPTION • PC3200 Compliant (DDR400 200MHz-5ns; CL-tRCD-tRP=3-3-3 clks) • 200-Pin SO-DIMM form factor • Auto and self refresh capability

mPGA604

Abstract: CBL-0036 PWS-0045 mpga604 amp FPD-PNSC-02
Contextual Info: Hom e C onta ct Us Adva nce d Se arch Search SuperWorkstation 7043A-i / 7043A-iB Products Systems 4U [ 7043A-i / 7043A-iB ] Integrated Board Key Features 1. Dual Intel Xeon® Support up to 3.2 GHz 2. Up to 12GB DDR 266/200 SDRAM 3. 2x 64-bit, 2x 32-bit PCI-X expansion

INTEL 82550

Abstract: SKT-095E MB-MEC-002 MOTHERBOARD C AIC-7902 mPGA603 CSE-SCA-001 SKT-124 SC80-42
Contextual Info: Hom e C onta ct Us Adva nce d Se arch Search SuperServer 8052-8 Products Systems Pedestal [ 8052-8 ] Integrated Board Key Features 1. Quad Intel Xeon® MP Support up to 3.0 GHz 2. Up to 32GB DDR 266/200 SDRAM w ith Memory Expansion Card 3. 6x 64-bit PCI-X expansion slots

AIC-7902

Abstract: CBL-0036 PWS-0045 CBL-037-U320 Adaptec AIC-7902 mPGA604 CBL-0040
Contextual Info: Hom e C onta ct Us Adva nce d Se arch Search SuperServer 7043M-8 / 7043M-8B Products Systems 4U [ 7043M-8 / 7043M-8B ] Integrated Board Key Features 1. Dual Intel Xeon® Support up to 3.20 GHz 2. Up to 12GB DDR 266/200 SDRAM 3. 3x 64-bit, 3x 32-bit PCI-X expansion

MA10

Abstract: MA11 MC9328MX1 MC9328MXL AN2478
Contextual Info: Application Note AN2478/D Rev. 0, 04/2003 Using the MC9328MX1 and MC9328MXL SDRAM Controller By Michael Kjar 1 Introduction This document provides a detailed overview on how the Motorola DragonBall MC9328MX1 and MC9328MXL processors interface to SDRAM memory devices of

sdram controller

Abstract: SDRAM AN2478 4Mx16x controller for sdram M110 MA10 MA11 MC9328MX1 MC9328MX1RM
Contextual Info: Freescale Semiconductor Application Note Document Number: AN2478 Rev. 5, 02/2007 Using the SDRAM Controller MC9328MX1, MC9328MXL, and MC9328MXS By: Michael Kjar 1 Introduction This document provides a comprehensive discussion on how the Freescale Semiconductor’s i.MX applications

sdram controller

Abstract: AN2478 M110 MA10 MA11 MC9328MX1 MC9328MXL
Contextual Info: Freescale Semiconductor, Inc. Application Note AN2478/D Rev. 1.0, 08/2003 Using the MC9328MX1 and MC9328MXL SDRAM Controller Freescale Semiconductor, Inc. By: Michael Kjar Contents Introduction 1 Overview of the MC9328MX1/ MXL SDRAM Controller. 1 MC9328MX1/MXL SDRAM

AN2478

Abstract: M110 MA10 MA11 MC9328MX1 MC9328MX1RM MC9328MXL MC9328MXLRM MC9328MXS
Contextual Info: Freescale Semiconductor Application Note Using the SDRAM Controller MC9328MX1, MC9328MXL, and MC9328MXS By: Michael Kjar 1 Introduction This document provides a comprehensive discussion on how the Freescale Semiconductor’s i.MX applications processors interface to different configurations of

K4S511632D

Abstract: SH7203 SH7263 0C00 EDS1216AGTA resistor SH2A K4S511632
Contextual Info: APPLICATION NOTE SH7263/SH7203 Groups Example of BSC SDRAM Interface Connection 16-Bit Data Bus Introduction This application note describes the synchronous DRAM (SDRAM) interface of the bus state controller (BSC) and provides a practical example of connection with a data-bus width of 16 bits.

DDR2 DIMM VHDL

Abstract: 3CA3F DS414 DDR2 SDRAM Controller JESD79-2A 1446-69 sdram controller CLK180 DS532 interface ddr2 sdram with spartan3
Contextual Info: Multi-CHannel OPB Double Data Rate DDR2 Synchronous DRAM (SDRAM) Controller DS532 March 20, 2006 Product Specification Introduction LogiCORE Facts The Xilinx Multi-CHannel On-chip Peripheral Bus Double Data Rate Synchronous DRAM (MCH OPB DDR2 SDRAM) controller for Xilinx FPGAs provides a DDR2 SDRAM controller that connects to the OPB and multiple channel interfaces and provides the control interface for DDR2