536BIT Search Results

EN 1452-3

Abstract: J416
Contextual Info: SMJ4164 65.536-BIT DYNAMIC RANDOM-ACCESS MEMORY JU LY 1985 - J D PA C K A G E 6 5 ,5 3 6 x 1 Organization TO P V IEW Single 5-V Supply (± 1 0% Tolerance) w Ç AOQ A2C A1 C VddC 8 Long Refresh Period . . . 4 ms FG PA C K A G E Low Refresh Overhead Time . .

Signetics OR Mullard

Abstract: SBB2664D SBB2664E SBB2664P TW417
Contextual Info: DEVELOPMENT SAMPLE DATA I t r o m ri :v SBB2664P.D.E n o n . Il d o r i t o r i ? q u I¿1 r p o d u c T«plV t h; i r t he 65 536-BIT STATIC READ ONLY MEMORY T h e S B B 2 6 6 4 is a 6 5 5 3 6 h it M O S N -cha n n el s ta tic R O M orga n ised as 8 1 9 2 e ig h t b it w o rd s . T h is

Contextual Info: DS2506 PRELIMINARY DALLAS SEMICONDUCTOR FEATURES DS2506 64K bit Add-O nly Memory PIN ASSIGNMENT PR 35 • 65536 bits Electrically Program m able Read O nly Memory EPROM communicates with the econom y of one signal plus ground QE 1 NC QE 2 DATA QE 3 NC • Unique, factory-1 asered and tested 6 4 -b it registra­

Contextual Info: P4C187/P4C187L ULTRA HIGH SPEED 64K x 1 STATIC CMOS RAMS FEATURES Full CMOS, 6T Cell Data Retention with 2.0V Supply P4C187L Military High Speed (Equal Access and Cycle Times) – 10/12/15/20/25 ns (Commercial) – 12/15/20/25/35 ns (Industrial) – 15/20/25/35/45 ns (Military)

NMC27C64Q

Abstract: EPROM 27C32 Vpp of 27256 eprom 27C32 2732 cmos eprom NMC27C64 27c32 eprom 2716 EPROM 24 PINS otp eprom 27C16 eprom 27c64 PROGRAMMER CIRCUIT
Contextual Info: NMC27C64 65 536-Bit 8192 x 8 CMOS EPROM General Description Features The NMC27C64 is a 64K UV erasable electrically reprogrammable and one-time programmable (OTP) CMOS EPROM ideally suited for applications where fast turnaround pattern experimentation and low power consumption are important requirements

Contextual Info: P4C187/P4C187L ULTRA HIGH SPEED 64K x 1 STATIC CMOS RAMS FEATURES Full CMOS, 6T Cell Three-State Output High Speed Equal Access and Cycle Times – 10/12/15/20/25/35/45 ns (Commercial) – 12/15/20/25/35 /45 ns (Industrial) – 15/20/25/35/45/55/70/85 ns (Military)

amcc volta

Contextual Info: S4814PBI21 Volta 48 FINAL Datasheet Revision 1.13 November 21, 2005 AMCC - PROPRIETARY AND CONFIDENTIAL RESTRICTED DISTRIBUTION NDA REQUIRED Disclaimer: AMCC is providing information within this data sheet relating to LCAS mode in which a customer may choose to operate the Volta. The data set forth

h1010

Contextual Info: PRELIMINARY BiCMOS SRAM KM64B66 BiCMOS 1 6 K X 4 Bit Static RAM With OE FEATURES GENERAL DESCRIPTION • Fast A ccess Time: 10, 12, 15, 20 ns (max.) • Low Power Dissipation S ta n d b y . 20m A (max.) O perating . 160m A (max.)

Contextual Info: MITSUBISHI LSIs M5K4164AND-12, -15 6 5 5 3 6 -B IT 6 5 536-W O R D BY &-BIT DYNAMIC RAM D E S C R IP T IO N P IN C O N F IG U R A T IO N (TO P V IE W ) This is a fa m ily o f 65 536-word by 1-bit dynamic RAMs, fabricated w ith the high performance N-channel silicongate

EPROM 2764-25

Abstract: 2764-25 INTEL MBM 2764-25 2764-30 eprom INTEL 2764 2764-30 EPROM 2764 2764 2764-20 2764 eprom
Contextual Info: UV ERASABLE FU JITSU 6 5 536-BIT READ 010200020101020089010000000102010001 ONLY MEMORY MBM 2764-20 MBM 2764-25 MBM 2764-30 J a n u a ry 198* E d itio n 4 .0 MOS 8 1 9 2 x 8 B IT U V ERASABLE A N D ELE C T R IC A L LY PROGRAM M ABLE READ O N L Y M EM O RY T h e F u jits u M B M 2 7 6 4 is a high speed 6 5 ,5 3 6 -b it s ta tic N -channel M OS

BPW22A

Abstract: cm .02m z5u 1kv pin configuration of BFW10 la4347 B2X84 TDA3653 equivalent TRIAC TAG 9322 HEF40106BP equivalent fx4054 core dsq8
Contextual Info: Contents Page Page New product index Combined index and status codes viii x Mullard approved components BS9000, CECC, and D3007 lists CV list Integrated circuits Section index xliii 1 5 Standard functions LOGIC FAMILIES CMOS HE4000B family specifications CMOS HE4000B family survey

Contextual Info: NATL S E n i C O N D NATL NMC27C49 6501126 SEMICOND, -CMEnORY> flb hSQllEfc. □□51122 □ Ô6D 5 9 1 2 2 MEMORY National Semiconductor Corporation PRELIMINARY NMC27C49 65, 536-Bit (8k x 8) UV Erasable CMOS PROM (Very High Speed Version) Pin Compatible with 64k Bipolar PROMS

22-PIN

Abstract: P4C187 P4C187L
Contextual Info: P4C187/P4C187L ULTRA HIGH SPEED 64K x 1 STATIC CMOS RAMS FEATURES Full CMOS, 6T Cell Data Retention with 2.0V Supply P4C187L Military High Speed (Equal Access and Cycle Times) – 10/12/15/20/25/35/45 ns (Commercial) – 12/15/20/25/35 /45 ns (Industrial)

Contextual Info: ÜMC U M 6264A Series 8K x 8 CMOS SRAM PRELIMINARY Features • S ingle+ 5 v o lt power supply ■ Access times: 100/120 ns m ax. 1 ■ F u lly static operation, no clock or refreshing required ■ D ire ctly T T L com patible: A ll inputs and outputs ■ Current:

24-Pin Plastic DIP

Abstract: smd code WZ P4C187 P4C187L
Contextual Info: P4C187/P4C187L ULTRA HIGH SPEED 64K x 1 STATIC CMOS RAMS FEATURES Full CMOS, 6T Cell Data Retention with 2.0V Supply P4C187L Military High Speed (Equal Access and Cycle Times) – 10/12/15/20/25 ns (Commercial) – 12/15/20/25/35 ns (Industrial) – 15/20/25/35/45 ns (Military)

TAA 521 A

Abstract: TAA 521
Contextual Info: CMOS STATIC RAM 64K 8K x 8-BIT CACHE-TAG RAM IDT7174S NOT RECOMMENDED FOR NEW DESIGNS SEE IDT71B74 PAGE 6.15 FEATURES: DESCRIPTION: • H ig h -sp e e d a d d re s s to M A T C H c o m p a ris o n tim e — M ilitary: 3 5 /4 5 /5 5 n s (m ax.) — C o m m e rc ia l: 3 0 /3 5 /4 5 n s (m ax.)

Contextual Info: P4C187/P4C187L ULTRA HIGH SPEED 64K x 1 STATIC CMOS RAMS FEATURES Full CMOS, 6T Cell Data Retention with 2.0V Supply P4C187L Military High Speed (Equal Access and Cycle Times) – 10/12/15/20/25 ns (Commercial) – 12/15/20/25/35 ns (Industrial) – 15/20/25/35/45 ns (Military)

Contextual Info: P A I R C H F1620 16,384 x 4-Bit Static RAM I L O A S chlum b erg er C om pany Memory and High Speed Logic Description Connection Diagrams T h e F1620 is a 65 .536-bit fu lly sta tic a s y n c h ro n o u s random access m e m ory, o rganize d as 16,384 w ord s by 4 -b its per

S19225PBI22

Abstract: S19225PBI AMCC Virtual Concatenation deskew SRAM SAMSUNG
Contextual Info: S19225PBI22 Volta 192 Datasheet Revision 1.14 February 23, 2006 AMCC - PROPRIETARY AND CONFIDENTIAL RESTRICTED DISTRIBUTION NDA REQUIRED Disclaimer: AMCC is providing information within this data sheet relating to LCAS mode in which a customer may choose to operate the Volta. The data set forth

texas 74 series TTL logic gates

Abstract: ic tms 1000 ccd memory 1S77 3064
Contextual Info: TMS 3064 JL 65,536-BIT CCD MEMORY MOS LSI N O V E M B E R 1977 65,536 X 1 Organization 16 Addressable 4096-Bit Loops Performance: LATEN C Y T IM E A T 5- M H ? (M A X ) REA D OR W R ÍT E CYCLE 8 2 0 jis 2 0 0 ns 4M IN) 1 6 -F IN C E R A M I C D U A L - IN L I N E P A C K A G E

din 2982

Abstract: IDT7174S TAA 521 A IDT7174 I2114 TAA 521
Contextual Info: CMOS STATIC RAM 64K 8K x 8-BIT CACHE-TAG RAM IDT7174S NOT RECOMMENDED FOR NEW DESIGNS SEE IDT71B74 PAGE 6.15 FEATURES: DESCRIPTION: • H ig h -sp e e d ad d re s s to M A T C H co m p a ris o n tim e — M ilitary: 3 5 /4 5 /5 5 n s (m ax.) — C o m m e rc ia l: 3 0 /3 5 /4 5 n s (m ax.)

TMS4464

Abstract: TMS 2764 Texas Instruments IC mk4564 mcm6256 tms4500a Fuji Electric tv schematic diagram ET 439 power module fuji mcm6665 74L5138 TMS4500
Contextual Info: SMYOOO2 . ,MOS Memory Data Book 1984 II I III \' h' \/ Commercial and Military , :\ Specifications ' 1'/ ! . .Jf TEXAS INSTRUMENTS Alphanumeric Index, Table of Contents, Selection Guide Interchangeability Guide _ Glossary/Timing Conventions/Data Sheet Structure

P4C187

Contextual Info: P4C187/P4C187L ULTRA HIGH SPEED 64K x 1 STATIC CMOS RAMS FEATURES Full CMOS, 6T Cell Three-State Output High Speed Equal Access and Cycle Times – 10/12/15/20/25/35/45 ns (Commercial) – 12/15/20/25/35 /45 ns (Industrial) – 15/20/25/35/45/55/70/85 ns (Military)

Contextual Info: CMOS STATIC RAMS 64K 16Kx 4-BIT IDT71981S/L IDT71982S/L Separate Data Inputs and Outputs Integrated Device Technology, Inc. FEATURES: • Optim ized for fast R IS C processors including the ID T 7 9R 300 0 • S eparate d ata inputs and outputs • ID 171981S /L: outputs track inputs during write mode