Untitled
Abstract: No abstract text available
Text: MS46H64M32L2SB-XX *PRELIMINARY 2Gb LPDDR 2 x 32Mx32 FEATURES Package: GENERAL DESCRIPTION • 152 Plastic Ball Grid Array (PBGA), 14 x 14 mm Microsemi MS46H64M32L2SB package-on-package (PoP) MCP product combines two Mobile LPDRAM devices in a single MCP.
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MS46H64M32L2SB-XX
32Mx32)
MS46H64M32L2SB
268M-bit
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"32Mx32" DRAM 72-pin simm
Abstract: HANBit 72-pin SIMM HMD32M32M16G 1760
Text: HANBit HMD32M32M16G 128Mbyte 32Mx32 72-pin Fast Page Mode 4K Ref. SIMM Design 5V Part No. HMD32M32M16G GENERAL DESCRIPTION The HMD32M32M16G is a 32M x 32bit dynamic RAM high-density memory module. The module consists of sixteen CMOS 16M x 4bit DRAMs in 32-pin TSOPII packages mounted on a 72-pin, double-sided, FR-4-printed circuit board. A
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HMD32M32M16G
128Mbyte
32Mx32)
72-pin
HMD32M32M16G
32bit
32-pin
72-pin,
"32Mx32" DRAM 72-pin simm
HANBit 72-pin SIMM
1760
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H5MS1G22
Abstract: h5ms1g H5MS1G22MFP H5MS1G32MFP hynix mcp
Text: 1Gbit MOBILE DDR SDRAM based on 8M x 4Bank x32 I/O Specification of 1Gb 32Mx32bit Mobile DDR SDRAM Memory Cell Array - Organized as 4banks of 8,388,608 x32 This document is a general product description and is subject to change without notice. Hynix does not assume any responsibility for
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32Mx32bit)
32bit)
H5MS1G22MFP
H5MS1G32MFP
page23)
100mA
120mA
450uA
500uA
H5MS1G22
h5ms1g
hynix mcp
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Untitled
Abstract: No abstract text available
Text: FEDR26V01G54R-01-01 OKI Semiconductor MR26V01G54R 32M–Word x 32–Bit Page Mode Issue Date: Oct 30, 2007 P2ROM PIN CONFIGURATION TOP VIEW FEATURES 32Mx32 or 64Mx16-bit electrically switchable configuration • Page size of 8-word x 32-Bit or 16-word x 16-Bit
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FEDR26V01G54R-01-01
MR26V01G54R
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D3157
Abstract: 2A243 D1267
Text: FEDR26V01G54R-002-03 Issue Date: Oct. 01, 2008 MR26V01G54R 32M–Word 32–Bit or 64M–Word 16–Bit Page Mode P2ROM FEATURES 32Mx32 or 64Mx16-bit electrically switchable configuration • Page size of 8-word x 32-Bit or 16-word x 16-Bit · 3.0 V to 3.6 V power supply
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FEDR26V01G54R-002-03
MR26V01G54R
32Mx32
64Mx16-bit
32-Bit
16-word
16-Bit
D3157
2A243
D1267
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1170D28
Abstract: No abstract text available
Text: FEDR26V01G54R-002-03 Issue Date: Oct. 01, 2008 MR26V01G54R 32M–Word x 32–Bit or 64M–Word × 16–Bit Page Mode P2ROM PIN CONFIGURATION TOP VIEW FEATURES 32Mx32 or 64Mx16-bit electrically switchable configuration • Page size of 8-word x 32-Bit or 16-word x 16-Bit
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FEDR26V01G54R-002-03
MR26V01G54R
32Mx32
64Mx16-bit
32-Bit
16-word
16-Bit
1170D28
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KMM53232004CK
Abstract: KMM53232004CKG
Text: DRAM MODULE KMM53232004CK/CKG 4Byte 32Mx32 SIMM 16Mx4 base Revision 0.0 June 1999 DRAM MODULE Revision History Version 0.0 (June 1999) • The 4th. generation of 64Mb DRAM components are applied for this module. KMM53232004CK/CKG DRAM MODULE KMM53232004CK/CKG
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KMM53232004CK/CKG
32Mx32
16Mx4
KMM53232004CK/CKG
16Mx4,
KMM53232004C
32Mx32bits
KMM53232004CK
KMM53232004CKG
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Untitled
Abstract: No abstract text available
Text: DRAM MODULE M53213200BE0/BJ0-C 4Byte 32Mx32 SIMM 16Mx4 base Revision 0.1 June 1998 DRAM MODULE M53213200BE0/BJ0-C Revision History Version 0.0 (Sept. 1997) • Removed two AC parameters tCACP(access time from CAS) and tAAP(access time from col. addr.) in AC CHARACTERISTICS.
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M53213200BE0/BJ0-C
32Mx32
16Mx4
M53213200BE0/BJ0-C
16Mx4,
32Mx32bits
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Untitled
Abstract: No abstract text available
Text: SU5323285D8F6CU August 19, 2004 Ordering Information Part Numbers Description Module Speed SM5323285D8F6CG 32Mx32 128MB , DDR, 100-pin DIMM, Unbuffered, Non-ECC, 32Mx8 Based, DDR266A, 30.48mm, 22Ω DQ termination. PC2100 @ CL 2.0, 2.5 SB5323285D8F6CG 32Mx32 (128MB), DDR, 100-pin DIMM, Unbuffered, Non-ECC,
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SU5323285D8F6CU
SM5323285D8F6CG
SB5323285D8F6CG
32Mx32
128MB)
100-pin
32Mx8
DDR266A,
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samsung CL21
Abstract: K4X1G323PC K4X1G323PC-7 K4X1G323 CL21 CL31 DDR266 DDR333 row decoder
Text: K4X1G323PC - L F E/G Mobile DDR SDRAM 32Mx32 Mobile DDR SDRAM 1. FEATURES • VDD/VDDQ = 1.8V/1.8V • Double-data-rate architecture; two data transfers per clock cycle • Bidirectional data strobe(DQS) • Four banks operation • Differential clock inputs(CK and CK)
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K4X1G323PC
32Mx32
samsung CL21
K4X1G323PC-7
K4X1G323
CL21
CL31
DDR266
DDR333
row decoder
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EMRS-2
Abstract: K4J10324QD-HC12 k4j10324qd-hj1a K4J10324QD EMRS2 k4j10324
Text: Application Application Note Note 32Mx32 GDDR3 1GHz Setting - How to set 1Ghz operation in EMRS2 mode - May, 2008 Product Planning & Application Engineering Team MEMORY DIVISION SAMSUNG ELECTRONICS Co., LTD Product Product Planning Planning & & Application
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32Mx32
K4J10324QD-HJ1A
1000MHz
K4J10324QD-HC12/14
800/700MHz
EMRS-2
K4J10324QD-HC12
k4j10324qd-hj1a
K4J10324QD
EMRS2
k4j10324
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K4J10324QD-HC12
Abstract: k4j10324qd-hj1a 32Mx32 K4J10324QDHC12 K4J10324QD gddr3 k4j10324qdhj1a k4j10324qd-hc
Text: Application Application Note Note 32Mx32 GDDR3 900MHz - Compatibility of 900MHz & 1GHz - May, 2008 Product Planning & Application Engineering Team MEMORY DIVISION SAMSUNG ELECTRONICS Co., LTD Product Product Planning Planning & & Application Application Eng.
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32Mx32
900MHz
900MHz/1GHz
K4J10324QD-HJ1A
K4J10324QD-HC12/14
800/700MHz
900MHz
K4J10324QD-HC12
k4j10324qd-hj1a
K4J10324QDHC12
K4J10324QD
gddr3
k4j10324qdhj1a
k4j10324qd-hc
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Untitled
Abstract: No abstract text available
Text: DRAM MODULE M53233200CE0/CJ0-C 4Byte 32Mx32 SIMM 16Mx4 base Revision 0.0 June 1999 DRAM MODULE Revision History Version 0.0 (June 1999) • The 4th. generation of 64Mb DRAM components are applied for this module. M53233200CE0/CJ0-C DRAM MODULE M53233200CE0/CJ0-C
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M53233200CE0/CJ0-C
32Mx32
16Mx4
M53233200CE0/CJ0-C
16Mx4,
32Mx32bits
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MT46H32M32LFCM-6
Abstract: MICRON Cross Reference AS4MDDR32M32PBG-6/ET AS4MDDR32M32PBG-6
Text: 1Gb MOBILE DDR SRAM AS4MDDR32M32PBG Micross Components Data Sheet Addendum 32Mx32 mobile DDR SDRAM Micross Device part# AS4MDDR32M32PBG-6/ET Base OEM part# MT46H32M32LFCM-6 L IT:A OEM vendor: Micron About this Addendum: Micross Components sources the plastic encapsulated part from the
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AS4MDDR32M32PBG
32Mx32
AS4MDDR32M32PBG-6/ET
MT46H32M32LFCM-6
-46oC
105oC
-40oC
105oC
MICRON Cross Reference
AS4MDDR32M32PBG-6/ET
AS4MDDR32M32PBG-6
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Untitled
Abstract: No abstract text available
Text: SM532323578F63R April 30, 2002 Orderable Part Numbers Part Numbers SM532323578F63R Description 32Mx32 128MB , SDRAM 100-pin DIMM, Unbuffered 16Mx16 Based, PC133, CL3, 25.40mm Revision History • April 30, 2002 Datasheet released. Corporate Headquarters: P. O. Box 1757, Fremont, CA 94538, USA • Tel:(510) 623-1231 • Fax:(510) 623-1434 • E-mail: info@smartm.com
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SM532323578F63R
SM532323578F63R
32Mx32
128MB)
100-pin
16Mx16
PC133,
128MByte
32Mx32)
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DDR333B
Abstract: No abstract text available
Text: SU5323285D8F6CL January 17, 2005 Ordering Information Part Numbers Description Module Speed SM5323285D8F6CL 32Mx32 128MB , DDR, 100-pin DIMM, Unbuffered, Non-ECC, 32Mx8 Based, DDR333B, 30.48mm, 22Ω DQ termination. PC2700 @ CL 2.5 SB5323285D8F6CL 32Mx32 (128MB), DDR, 100-pin DIMM, Unbuffered, Non-ECC,
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SU5323285D8F6CL
SM5323285D8F6CL
SB5323285D8F6CL
32Mx32
128MB)
100-pin
32Mx8
DDR333B,
DDR333B
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RA-Z
Abstract: No abstract text available
Text: SM532328574F03R May 1, 2002 Orderable Part Numbers Part Numbers SM532328574F03R Description 32Mx32 128MB , SDRAM 100-pin DIMM, Unbuffered 16Mx8 Based, PC133, CL3, 29.72mm Revision History • May 1, 2002 Datasheet released. Corporate Headquarters: P. O. Box 1757, Fremont, CA 94538, USA • Tel:(510) 623-1231 • Fax:(510) 623-1434 • E-mail: info@smartm.com
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SM532328574F03R
SM532328574F03R
32Mx32
128MB)
100-pin
16Mx8
PC133,
128MByte
32Mx32)
RA-Z
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32Mx32
Abstract: DIMM 100-pin 3232ZASQM4G09T 100-pin SDRAM
Text: 32M x 32 Bit 100 PIN SDRAM DIMM 100 PIN SYNCHRONOUS DRAM DIMM 3232ZASQM4G09T 100 Pin 32Mx32 SDRAM DIMM Unbuffered, 4k Refresh, 3.3V with SPD Pin Assignment Pin# Pin# 1 Vss 51 2 DQ0 52 3 DQ1 53 4 DQ2 54 5 DQ3 55 6 Vcc 56 7 DQ4 57 8 DQ5 58 9 DQ6 59 10 DQ7 60
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3232ZASQM4G09T
32Mx32
256x8
DS623-11
DIMM 100-pin
100-pin SDRAM
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"24 pin" DRAM
Abstract: No abstract text available
Text: DRAM MODULE KM M53232000B K/B KG 4Byte 32Mx32 SIMM 16Mx4 base Revision 0.0 Sept. 1997 ELECTRONICS DRAM MODULE KM M53232000B K/B KG Revision History Version 0.0 (Sept, 1997) • Removed two AC parameters t ELECTRONICS c acp (access time from CAS) and tAAP (access time from col. addr.) in A C CHARACTERISTICS.
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M53232000B
32Mx32
16Mx4
KMM53232000BK/BKG
16Mx4,
KMM53232000B
32Mx32bits
16Mx4bits
"24 pin" DRAM
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SD1G32VS2490
Abstract: No abstract text available
Text: MEMORY MODULE SDRam 32Mx32-SOP Synchronous Dynamic Ram MODULE 3D SD1G32VS2490 1Gbit SDRam organized as 32Mx32, based on 32Mx16 Pin Assignment Top View SOP 70 - (Pitch : 0.635 mm) Features - Stack of two 512Mbit SDRam. - Organized as 32Mx32-bit. - Single +3.3V power supply.
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32Mx32-SOP
SD1G32VS2490
32Mx32,
32Mx16
512Mbit
32Mx32-bit.
FP-0490-R
SD1G32VS2490
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32Mx32
Abstract: 3DFP
Text: MEMORY MODULE SDRam 64Mx32-SOP a HE ICO company Synchronous Dynamic Ram MODULE 3D SD2G32VS4484 2Gbit SDRam organized as 64Mx32, based on 32Mx16 Pin Assignment Top View SOP 70 - (Pitch : 0.635 mm) Features - Stack of four 512Mbit SDRam. - Organized as 32Mx32-bit.
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64Mx32-SOP
SD2G32VS4484
64Mx32,
32Mx16
512Mbit
32Mx32-bit.
3DFP-0484-REV
32Mx32
3DFP
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CACP
Abstract: No abstract text available
Text: DRAM MODULE KM M53232004B K/B KG 4Byte 32Mx32 SIMM 16Mx4 base Revision 0.0 Sept. 1997 ELECTRONICS DRAM MODULE KM M53232004B K/B KG Revision History Version 0.0 (Sept, 1997) • Removed two AC parameters t ELECTRONICS cacp (access time from CAS) and tAAP (access time from col. addr.) in A C CHARACTERISTICS.
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M53232004B
32Mx32
16Mx4
16Mx4,
KMM53232004B
32Mx32bits
16Mx4bits
CACP
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Untitled
Abstract: No abstract text available
Text: DRAM MODULE KMM53232004AK/AKG KMM53232004AK/AKG EDO Mode 32M X 32 DRAM SIMM Using 16Mx4, 4K Refresh, 5V GENERAL DESCRIPTION FEATURES The Samsung KM M 53232004A is a 32Mx32bits RAM high density KM M 53232004A memory consists of module. sixteen Dynamic The Samsung
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KMM53232004AK/AKG
16Mx4,
3232004A
32Mx32bits
16Mx4bits
KMM53232004AK/AKG
M53232004AK
cycles/64ms
M53232004AKG
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64mb 72-pin simm
Abstract: No abstract text available
Text: DRAM MODULE KMM53232004BK/BKG 4Byte 32Mx32 SIMM 16Mx4 base Revision 0.0 Sept. 1997 DRAM MODULE KMM53232004BK/BKG Revision History Version 0.0 (Sept, 1997) • Removed two AC parameters t CACP(access time from CAS) and tAAP(access time from col. addr.) in A C CHARACTERISTICS.
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KMM53232004BK/BKG
32Mx32
16Mx4
KMM53232004BK/BKG
16Mx4,
16Mx4bits
KMM53232004BK
cycles/64ms
64mb 72-pin simm
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