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Catalog Datasheet	MFG & Type	Document Tags	PDF
ISO11172-2 Abstract: ISO13818-2 CLK81 ISO11172-1 ISO13818-1 NJU28001 NJU28001F QFP144 6ha6 PDI 95 Text: NJU２８００１２８００１ PRELIMINARY MPEG-2 IMAGE PROCESSOR • GENERAL DESCRIPTION The NJU28001 is MPEG-2/DVD video decoding IC. It de-multiplexes MPEG-2 as well as DVD system program streams and holds them in its external DRAM. It decodes MPEG-2 compressed video and outputs digital video (in	Original	NJU28001 NJU28001 27MHz ISO11172-2 ISO13818-2 CLK81 ISO11172-1 ISO13818-1 NJU28001F QFP144 6ha6 PDI 95	PDF
STI5518 Abstract: transistor D331 circuit diagram application sti5518 jtag sti5505 sti5508 CCIR Report 624-4 STi5518 Register Manual LT 542 seven segment display data sheet STI5500 pin diagram of sti5518 Text: D I F N L A I T N E STi5518 SINGLE-CHIP SET-TOP BOX DECODER WITH MP3 AND HARD DISK DRIVE SUPPORT n n n n n n n n n n n n n Integrated 32-bit host CPU up to 81 MHz • 2 Kbytes of Icache, 2 Kbytes of Dcache, and 4 Kbytes of SRAM configurable as Dcache. Audio decoder	Original	STi5518 32-bit IEC60958 -IEC61937 STI5518 transistor D331 circuit diagram application sti5518 jtag sti5505 sti5508 CCIR Report 624-4 STi5518 Register Manual LT 542 seven segment display data sheet STI5500 pin diagram of sti5518	PDF
qxga Abstract: SGRAM IP00C703 2x16Mbit YUV422 "Frame rate conversion" Text: 10-bit Image Scaler General Description The IP00C703 is a dedicated device for real-time image resizing and frame rate conversion at high resolution and high speed. It features a 4x4 pixels interpolation core for image size reduction or enlargement. Its 20-bit wide image input port supports 2 x10-bit pixels or a single YUV4:2:2 pixel	Original	10-bit IP00C703 20-bit x10-bit 12-bit 16-color 208-pin qxga SGRAM 2x16Mbit YUV422 "Frame rate conversion"	PDF

Catalog Datasheet

MFG & Type

Document Tags

PDF

ISO11172-2

Abstract: ISO13818-2 CLK81 ISO11172-1 ISO13818-1 NJU28001 NJU28001F QFP144 6ha6 PDI 95
Text: NJU２８００１２８００１ PRELIMINARY MPEG-2 IMAGE PROCESSOR • GENERAL DESCRIPTION The NJU28001 is MPEG-2/DVD video decoding IC. It de-multiplexes MPEG-2 as well as DVD system program streams and holds them in its external DRAM. It decodes MPEG-2 compressed video and outputs digital video (in

Original

NJU28001 NJU28001 27MHz ISO11172-2 ISO13818-2 CLK81 ISO11172-1 ISO13818-1 NJU28001F QFP144 6ha6 PDI 95

PDF

STI5518

Abstract: transistor D331 circuit diagram application sti5518 jtag sti5505 sti5508 CCIR Report 624-4 STi5518 Register Manual LT 542 seven segment display data sheet STI5500 pin diagram of sti5518
Text: D I F N L A I T N E STi5518 SINGLE-CHIP SET-TOP BOX DECODER WITH MP3 AND HARD DISK DRIVE SUPPORT n n n n n n n n n n n n n Integrated 32-bit host CPU up to 81 MHz • 2 Kbytes of Icache, 2 Kbytes of Dcache, and 4 Kbytes of SRAM configurable as Dcache. Audio decoder

Original

STi5518 32-bit IEC60958 -IEC61937 STI5518 transistor D331 circuit diagram application sti5518 jtag sti5505 sti5508 CCIR Report 624-4 STi5518 Register Manual LT 542 seven segment display data sheet STI5500 pin diagram of sti5518

PDF

qxga

Abstract: SGRAM IP00C703 2x16Mbit YUV422 "Frame rate conversion"
Text: 10-bit Image Scaler General Description The IP00C703 is a dedicated device for real-time image resizing and frame rate conversion at high resolution and high speed. It features a 4x4 pixels interpolation core for image size reduction or enlargement. Its 20-bit wide image input port supports 2 x10-bit pixels or a single YUV4:2:2 pixel

Original

10-bit IP00C703 20-bit x10-bit 12-bit 16-color 208-pin qxga SGRAM 2x16Mbit YUV422 "Frame rate conversion"

PDF