12SEP05 Search Results
12SEP05 Datasheets Context Search
Catalog Datasheet | Type | Document Tags | |
---|---|---|---|
1044369Contextual Info: 12SEP05_ 10:51am us001 193 H:\ dm tm od\ ECs\ e012405clndia\ 104436-c.dwq 4 3 2 LOC NOTED PO IN T OF OBSOLETE D IM E N S IO N S MEASUREMENT APPLY FOR 00 AT TH E PLATING R E V IS IO N S D IS T AD TH E 1 P LTR D E S C R IP T IO N DATE 2, EC 0G3C 0 1 2 4 05 |
OCR Scan |
31MAR2000 12SEP05 us001193 \dmtmod\ECs\e01 2405clndia\1 1044369 | |
Contextual Info: 6 7 THIS DRAWING IS UNPUBLISHED. COPYRIGHT - 5 2 RELEASED FOR PUBLICATION BY TYCO ELECTRONICS CORPORATION. ALL RIGHTS RESERVED. LOC DIST AD 00 R E VIS IO N S P LTR DESCRIPTION DATE H EC 0G3C 0 2 3 2 H1 REV PER ECO — 09 —021 826 05 DWN APVD 12SEP05 BSV JLG |
OCR Scan |
||
Contextual Info: 8 7 THIS DRAWING IS UNPUBLISHED. /p\ ^ COPYRIGHT - RELEASED FOR PUBLICATION BY TYCO ELECTRONICS CORPORATION. 6 5 4 3 2 - ALL RIGHTS RESERVED. LOC DIST AD 00 1 R E VIS IO N S P LTR DESCRIPTION H EC 0G3C 0 2 3 2 DATE DWN 12SEP05 05 APVD BSV JLG D D C REF .092 + .003 |
OCR Scan |
12SEP05 31MAR2000 | |
54HMContextual Info: 4 3 THIS DRAWING IS UNPUBLISHED. COPYRIGHT RELEASED FOR PUBLICATION BY TYCO ELECTRONICS CORPORATION. - 2 - LOC ALL RIGHTS RESERVED. 2x DIST R E V IS IO N S GP 00 1 6.33- 10 -2X #4-40 DESCRIPTION GP 12SEP05 RELEASED PER EC 0S13 - 0 0 8 7 - 0 5 INSERT JG |
OCR Scan |
12SEP05 31MAR2000 54HM | |
Contextual Info: DG2799 Vishay Siliconix Low Voltage, Low On-Resistance, Dual DPDT Analog Switch DESCRIPTION The DG2799 is a dual double-pole/double-throw monolithic CMOS analog switch designed for high performance switching of analog signals. Combining low power, high speed, low |
Original |
DG2799 DG2799 HP4192A S-51893â 12-Sep-05 | |
Si7117DNContextual Info: Si7117DN New Product Vishay Siliconix P-Channel 150-V D-S MOSFET PRODUCT SUMMARY VDS (V) –150 FEATURES rDS(on) (W) ID (A) 1.2 @ VGS = –10 V –2.17 1.3 @ VGS = –6 V –2.1 Qg (Typ) 7 7 nC 7.7 D TrenchFETr Power MOSFETs D PowerPAKr Package – Low Thermal Resistance |
Original |
Si7117DN Si7117DN-T1--E3 08-Apr-05 | |
MC9S12XF512RMV1
Abstract: S12XF temperature controller CHB 401 asea MBT 225 PMF15B6C MC9S12XF256 P112l ifr 2310 Operating Manual ASEA motor b3 freescale superflash
|
Original |
MC9S12XF512 MC9S12XF512 MC9S12XF384 MC9S12XF256 MC9S12XF128 MC9S12XF512RMV1 10-Nov-2010 MC9S12XF512V1RM 02-Nov-2010 MC9S12XF512RMV1 S12XF temperature controller CHB 401 asea MBT 225 PMF15B6C MC9S12XF256 P112l ifr 2310 Operating Manual ASEA motor b3 freescale superflash | |
ladder networkContextual Info: Model TxxS Vishay Techno Single-In-Line, Coated, 4 Bits to 8 Bits R/2R Ladder Networks APPLICATIONS R/2R Ladder networks for D/A and A/D converter with bi-polar or CMOS switches ELECTRICAL SPECIFICATIONS Ladder Network Accuracy on Linearity: ± 1/2 LSB. Ladder Network Resistance Tolerance: ± 2 %. |
Original |
08-Apr-05 ladder network | |
9S12XEP100
Abstract: DELAY code for MC9S12XEP100 S12XMPUV1 9S12XEP768 9S12XE S12XMMCV4 ADC12B16C example MC9S12XEP100 MC9S12XE100 9S12x
|
Original |
MC9S12XEP100 MC9S12XE HCS12 9S12XEP100 DELAY code for MC9S12XEP100 S12XMPUV1 9S12XEP768 9S12XE S12XMMCV4 ADC12B16C example MC9S12XEP100 MC9S12XE100 9S12x | |
Contextual Info: 4 THIS DRAWING IS UNPUBLISHED. COPYRIGHT 2 3 RELEASED BY TYCO ELECTRONICS CORPORATION. FOR PUBLICATION - - LOC ALL RIGHTS RESERVED. GP REVISIONS DIST 00 P LTR DESCRIPTION A D 2x 1 0 -38.99 2x HOUSING: 0 3 .0 5 [. 1 20] [ 1 .5 35 ] 1 2 3 4 5 6 7 8 POLYESTER, |
OCR Scan |
24JAN 54jum HD-20 12SEP05 31MAR2000 | |
Contextual Info: 4 THIS DRAWING IS UNPUBLISHED. COPYRIGHT - 3 RELEASED FOR PUBLICATION - 2 - LOC ALL RIGHTS RESERVED. DIST R E V IS IO N S GP 00 By - -2x #4-40 P LTR A1 IN S E R T !A D DESCRIPTION HOUSING: BLACK INSERTS: BRASS PO LYE STE R , UL 9 4 V - 0 DATE REVISED PER ECO -1 1 - 00483 5 |
OCR Scan |
1MAR11 76/zm 54/zm 12SEP05 | |
manual temperature controller CHB 702
Abstract: MC9S12XF asea MBT 160 S12XF256 NVP 1204 1M64J S12XF384 transistor f a614 729 PIN CONFIGURATION 2M64J Logic Cross-Reference
|
Original |
MC9S12XF512 MC9S12XF384 MC9S12XF256 MC9S12XF128 MC9S12XF512V1RM 02-October-2008 manual temperature controller CHB 702 MC9S12XF asea MBT 160 S12XF256 NVP 1204 1M64J S12XF384 transistor f a614 729 PIN CONFIGURATION 2M64J Logic Cross-Reference | |
Contextual Info: Si5858DU New Product Vishay Siliconix N-Channel 20-V D-S MOSFET with Schottky Diode FEATURES MOSFET PRODUCT SUMMARY rDS(on) (W) ID (A)a 0.039 @ VGS = 4.5 V 6 0.045 @ VGS = 2.5 V 6 0.055 @ VGS = 1.8 V 6 VDS (V) 20 D LITTLE FOOTr Plus Power MOSFET D New Thermally Enhanced PowerPAKr |
Original |
Si5858DU 08-Apr-05 | |
Si4810BDYContextual Info: SPICE Device Model Si4810BDY Vishay Siliconix N-Channel 30-V D-S MOSFET with Schottky Diode CHARACTERISTICS • N-Channel Vertical DMOS • Macro Model (Subcircuit Model) • Level 3 MOS • Apply for both Linear and Switching Application • Accurate over the −55 to 125°C Temperature Range |
Original |
Si4810BDY 18-Jul-08 | |
|
|||
Si3454ADVContextual Info: SPICE Device Model Si3454ADV Vishay Siliconix N-Channel 30-V D-S MOSFET CHARACTERISTICS • N-Channel Vertical DMOS • Macro Model (Subcircuit Model) • Level 3 MOS • Apply for both Linear and Switching Application • Accurate over the −55 to 125°C Temperature Range |
Original |
Si3454ADV S-51867Rev. 12-Sep-05 | |
Contextual Info: 4 TH IS DRAWING IS U N P U B L IS H E D . RELEASED FOR PUBLICATIO N A L L RIGHTS COPYRIGHT 2 3 - - LOC BY TYCO ELECTRONICS CORPORATION. 1 2 3 4 5 R E V IS IO N S 6 7 8 9 D E S C R IP TIO N —5 5 . 4 7 ± 0 . 1 5 [2.1 8 4 - . 0 0 6 ] D D IS T GP 00 RESERVED. |
OCR Scan |
0S13-0087-05 12SEP05 31MAR2000 | |
PLD-10Contextual Info: MC9S12XEP100 Reference Manual Covers MC9S12XE Family HCS12 Microcontrollers MC9S12XEP100 Rev. 1.07 05/2007 freescale.com To provide the most up-to-date information, the revision of our documents on the World Wide Web will be the most current. Your printed copy may be an earlier revision. To verify you have the latest information |
Original |
MC9S12XEP100 MC9S12XE HCS12 PLD-10 | |
Contextual Info: DG2731/2732/2733 Vishay Siliconix Low Voltage, 0.4 Ω, Dual SPDT Analog Switch DESCRIPTION The DG2731/2732/2733 are low voltage, low on-resistance, dual single-pole/double-throw SPDT monolithic CMOS analog switches designed for high performance switching of analog signals. Combining |
Original |
DG2731/2732/2733 DG2731/2732/2733 DG2731 DG2732 DG2733 18-Jul-08 | |
Si5853DCContextual Info: SPICE Device Model Si5853DC Vishay Siliconix P-Channel 1.8-V G-S MOSFET with Schottky Diode CHARACTERISTICS • P-Channel Vertical DMOS • Macro Model (Subcircuit Model) • Level 3 MOS • Apply for both Linear and Switching Application • Accurate over the −55 to 125°C Temperature Range |
Original |
Si5853DC S-51891Rev. 12-Sep-05 | |
Si1913EDHContextual Info: SPICE Device Model Si1913EDH Vishay Siliconix Dual P-Channel 20-V D-S MOSFET CHARACTERISTICS • P-Channel Vertical DMOS • Macro Model (Subcircuit Model) • Level 3 MOS • Apply for both Linear and Switching Application • Accurate over the −55 to 125°C Temperature Range |
Original |
Si1913EDH S-51866Rev. 12-Sep-05 | |
suu50n025-09bpContextual Info: SUU50N025-09BP New Product Vishay Siliconix N-Channel 25-V D-S MOSFET FEATURES PRODUCT SUMMARY rDS(on) (W) ID (A)a, e 0.0086 @ VGS = 10 V 62 0.012 @ VGS = 4.5 V 52 VDS (V) 25 D TrenchFETr Power MOSFET D 100% Rg Tested D RoHS Compliant Qg (Typ) 18 5 nC 18.5 |
Original |
SUU50N025-09BP O-251 SUU50N025-09BP--E3 51875--Rev. 12-Sep-05 suu50n025-09bp | |
mos 6550
Abstract: SUV85N10-10 1723c as89
|
Original |
SUV85N10-10 S-51885Rev. 12-Sep-05 mos 6550 SUV85N10-10 1723c as89 | |
SURGE RESISTOR
Abstract: GR-1089 TSR100FF
|
Original |
GR-1089 GR-1089: TSR100FF 12-Sep-05 SURGE RESISTOR TSR100FF | |
dp83848vvContextual Info: DP83848I PHYTER - Industrial Temperature Single Port 10/100 Mb/s Ethernet Physical Layer Transceiver General Description Features The DP83848I is a robust fully featured 10/100 single port Physical Layer device offering low power consumption, including several intelligent power down |
Original |
DP83848I 9-Oct-06 3-Jul-06 4-Aug-06 6-Jul-06 dp83848vv |