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    1050PS Price and Stock

    3M Interconnect P51-050P-SR1-EA

    Board to Board & Mezzanine Connectors PAK50 CONNECTOR/ROHS
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    Mouser Electronics P51-050P-SR1-EA
    • 1 -
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    • 1000 $4.38
    • 10000 $3.83
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    IKO International Inc LRX45R1050PS2 (ALTERNATE: LRX45R1050HS2)

    Linear Roller Way, 1050 mm Rail, Precision Accuracy Grade, To assemble with MXC | IKO International Inc. LRX45R1050PS2
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    RS LRX45R1050PS2 (ALTERNATE: LRX45R1050HS2) Bulk 1
    • 1 $803.08
    • 10 $803.08
    • 100 $803.08
    • 1000 $803.08
    • 10000 $803.08
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    IKO International Inc LRX45R1050HS2 (ALTERNATE: LRX45R1050PS2)

    Linear Roller Way, 1050 mm Rail, High Accuracy Grade, To assemble with MXC45, M | IKO International Inc. LRX45R1050HS2
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    RS LRX45R1050HS2 (ALTERNATE: LRX45R1050PS2) Bulk 1
    • 1 $707.6
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    • 100 $707.6
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    • 10000 $707.6
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    IKO International Inc LRX45R1050HS2/HP (ALTERNATE: LRX45R1050PS2/HP)

    Linear Roller Way, 1050 mm Rail, Half Pitch Specification, High Accuracy Grade, | IKO International Inc. LRX45R1050HS2/HP
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    RS LRX45R1050HS2/HP (ALTERNATE: LRX45R1050PS2/HP) Bulk 1
    • 1 $768.69
    • 10 $768.69
    • 100 $768.69
    • 1000 $768.69
    • 10000 $768.69
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    IKO International Inc LRX45R1050PS2/HP (ALTERNATE: LRX45R1050HS2/HP)

    Linear Roller Way, 1050 mm Rail, Half Pitch Specification, Precision Accuracy G | IKO International Inc. LRX45R1050PS2/HP
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    RS LRX45R1050PS2/HP (ALTERNATE: LRX45R1050HS2/HP) Bulk 1
    • 1 $872.41
    • 10 $872.41
    • 100 $872.41
    • 1000 $872.41
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    1050PS Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    F100K

    Abstract: SY100S304 SY100S304FC SY100S304JC SY100S304JCTR
    Text: QUINT AND/NAND GATE FEATURES SY100S304 DESCRIPTION • Max. propagation delay of 1050ps ■ IEE min. of –60mA ■ Extended supply voltage option: VEE = –4.2V to –5.5V ■ Voltage and temperature compensation for improved noise immunity ■ Internal 75KΩ input pull-down resistors


    Original     		PDF SY100S304 1050ps F100K 24-pin 28-pin SY100S304 SY100S304FC F24-1 SY100S304JC J28-1 F100K SY100S304FC SY100S304JC SY100S304JCTR

    Marking D1c

    Abstract: F100K SY100S304 SY100S304JC SY100S304JCTR
    Text: QUINT AND/NAND GATE Micrel, Inc. FEATURES SY100S304 SY100S304 DESCRIPTION • Max. propagation delay of 1050ps ■ IEE min. of –60mA ■ Extended supply voltage option: VEE = –4.2V to –5.5V ■ Voltage and temperature compensation for improved noise immunity


    Original     		PDF SY100S304 1050ps F100K 28-pin SY100S304 M9999-042307 Marking D1c F100K SY100S304JC SY100S304JCTR

    Untitled

    Abstract: No abstract text available
    Text: QUINT AND/NAND GATE Micrel, Inc. FEATURES SY100S304 SY100S304 DESCRIPTION • Max. propagation delay of 1050ps ■ IEE min. of –60mA ■ Extended supply voltage option: VEE = –4.2V to –5.5V ■ Voltage and temperature compensation for improved noise immunity


    Original     		PDF SY100S304 1050ps F100K 24-pin 28-pin SY100S304 M9999-032206

    d2b 1

    Abstract: SY100S304 F100K SY100S304FC SY100S304JC SY100S304JCTR
    Text: QUINT AND/NAND GATE FEATURES SY100S304 FINAL DESCRIPTION • Max. propagation delay of 1050ps ■ IEE min. of –60mA ■ Extended supply voltage option: VEE = –4.2V to –5.5V ■ Voltage and temperature compensation for improved noise immunity ■ Internal 75KΩ input pull-down resistors


    Original     		PDF SY100S304 1050ps F100K 24-pin 28-pin SY100S304 0S304FC F24-1 SY100S304JC J28-1 d2b 1 F100K SY100S304FC SY100S304JC SY100S304JCTR

    E142 wafer format

    Abstract: HEL32 MR 4710 IC 300w power amplifier circuit diagram HEL05 klt22 HEL12 HEL31 HEL16 HLT22 HLT28
    Text: DL140/D Rev. 6, Jan-2001 High Performance ECL Data ECLinPS and ECLinPS Lite™ High Performance ECL Device Data ECLinPS, ECLinPS Lite, and Low Voltage ECLinPS DL140/D Rev. 6, Jan–2001  SCILLC, 2001 Previous Edition  2000 “All Rights Reserved”


    Original     		PDF DL140/D Jan-2001 r14525 E142 wafer format HEL32 MR 4710 IC 300w power amplifier circuit diagram HEL05 klt22 HEL12 HEL31 HEL16 HLT22 HLT28

    EDE5108AJSE-6E-E

    Abstract: EDE5104AJSE EDE5104AJSE-8E-E EDE5108AJSE EDE5116AJSE ELPIDA DDR2 SDRAM
    Text: PRELIMINARY DATA SHEET 512M bits DDR2 SDRAM EDE5104AJSE 128M words x 4 bits EDE5108AJSE (64M words × 8 bits) EDE5116AJSE (32M words × 16 bits) Specifications Features • Density: 512M bits • Organization  32M words × 4 bits × 4 banks (EDE5104AJSE)


    Original     		PDF EDE5104AJSE EDE5108AJSE EDE5116AJSE EDE5104AJSE) EDE5108AJSE) EDE5116AJSE) 60-ball EDE5104/08AJSE) 84-ball EDE5108AJSE-6E-E EDE5104AJSE EDE5104AJSE-8E-E EDE5108AJSE EDE5116AJSE ELPIDA DDR2 SDRAM

    DDR2-667

    Abstract: DDR2-800 EDE5108AJBG-8E-E EBE11UD8AJUA-6E-E SSTL-18
    Text: PRELIMINARY DATA SHEET 1GB DDR2 SDRAM SO-DIMM EBE11UD8AJUA 128M words x 64 bits, 2 Ranks Specifications Features • Density: 1GB • Organization ⎯ 128M words × 64 bits, 2 ranks • Mounting 16 pieces of 512M bits DDR2 SDRAM sealed in FBGA • Package: 200-pin socket type small outline dual in


    Original     		PDF EBE11UD8AJUA 200-pin 800Mbps/667Mbps M01E0107 E1083E10 DDR2-667 DDR2-800 EDE5108AJBG-8E-E EBE11UD8AJUA-6E-E SSTL-18

    DDR2-667

    Abstract: EDE5104AJSE-8E-E udqs
    Text: PRELIMINARY DATA SHEET 2GB Registered DDR2 SDRAM DIMM EBE21AD4AJFA 256M words x 72 bits, 2 Ranks Specifications Features • Density: 2GB • Organization  256M words × 72 bits, 2 ranks • Mounting 36 pieces of 512M bits DDR2 SDRAM sealed in FBGA • Package: 240-pin socket type dual in line memory


    Original     		PDF EBE21AD4AJFA 240-pin 667Mbps cycles/64ms M01E0706 E1041E20 DDR2-667 EDE5104AJSE-8E-E udqs

    DDR2-667

    Abstract: DDR2-800 EDE1108ACSE-6E-E
    Text: DATA SHEET 2GB Unbuffered DDR2 SDRAM DIMM EBE21UE8ACFA 256M words x 64 bits, 2 Ranks Specifications Features • Density: 2GB • Organization  256M words × 64 bits, 2 ranks • Mounting 16 pieces of 1G bits DDR2 SDRAM sealed in FBGA • Package: 240-pin socket type dual in line memory


    Original     		PDF EBE21UE8ACFA 240-pin 800Mbps/667Mbps cycles/64ms M01E0706 E1057E20 DDR2-667 DDR2-800 EDE1108ACSE-6E-E

    EDE5116AHSE

    Abstract: No abstract text available
    Text: PRELIMINARY DATA SHEET 512M bits DDR2 SDRAM EDE5108AHSE 64M words x 8 bits EDE5116AHSE (32M words × 16 bits) Specifications Features • Density: 512M bits • Organization ⎯ 16M words × 8 bits × 4 banks (EDE5108AHSE) ⎯ 8M words × 16 bits × 4 banks (EDE5116AHSE)


    Original     		PDF EDE5108AHSE EDE5116AHSE EDE5108AHSE) EDE5116AHSE) 60-ball 84-ball 800Mbps/667Mbps/533Mbps/400Mbps EDE5116AHSE

    DDR2-667

    Abstract: EDE5104AJSE-8E-E EBE10AD4AJFA-6E-E max1546
    Text: PRELIMINARY DATA SHEET 1GB Registered DDR2 SDRAM DIMM EBE10AD4AJFA 128M words x 72 bits, 1 Rank Specifications Features • Density: 1GB • Organization  128M words × 72 bits, 1 rank • Mounting 18 pieces of 512M bits DDR2 SDRAM sealed in FBGA • Package: 240-pin socket type dual in line memory


    Original     		PDF EBE10AD4AJFA 240-pin 667Mbps cycles/64ms M01E0706 E1039E20 DDR2-667 EDE5104AJSE-8E-E EBE10AD4AJFA-6E-E max1546

    Untitled

    Abstract: No abstract text available
    Text: DATA SHEET 1G bits DDR2 SDRAM EDE1108AJBG-1 128M words x 8 bits EDE1116AJBG-1 (64M words × 16 bits) Specifications Features • Density: 1G bits • Organization  16M words × 8 bits × 8 banks (EDE1108AJBG)  8M words × 16 bits × 8 banks (EDE1116AJBG)


    Original     		PDF EDE1108AJBG-1 EDE1116AJBG-1 EDE1108AJBG) EDE1116AJBG) 60-ball 84-ball 1066Mbps

    cl 1100

    Abstract: CL-8A SY100E445 SY10E445 SY10E445JC
    Text: 4-BIT SERIAL-to-PARALLEL CONVERTER FEATURES DESCRIPTION • On-chip clock ÷4 and ÷8 The SY10/100E445 are integrated 4-bit serial-to-parallel data converters. The devices are designed to operate for NRZ data rates of up to 2.5Gb/s. The chip generates a divide-by-4 and a divide-by-8 clock for both 4-bit conversion


    Original     		PDF SY10/100E445 SY10E445JCTR J28-1 SY100E445JC SY100E445JCTR SY10E445 SY100E445 J28-1) cl 1100 CL-8A SY100E445 SY10E445 SY10E445JC

    DDR2 SDRAM component

    Abstract: DDR2-800 E1295E40
    Text: DATA SHEET 1GB Unbuffered DDR2 SDRAM DIMM EBE10UE8AEFA 128M words x 64 bits, 1 Rank Specifications Features • Density: 1GB • Organization  128M words × 64 bits, 1 rank • Mounting 8 pieces of 1G bits DDR2 SDRAM sealed in FBGA • Package: 240-pin socket type dual in line memory


    Original     		PDF EBE10UE8AEFA 240-pin EBE10UE8AEFA-xx-E) EBE10UE8AEFA-xx-F) 800Mbps/667Mbps M01E0706 E1295E40 DDR2 SDRAM component DDR2-800 E1295E40

    DDR2 DIMM 240 pin names

    Abstract: DDR2-667 EDE5104AJSE-8E-E EBE21AD4AJFA-6E-E EBE21AD4AJFA 2843ps
    Text: DATA SHEET 2GB Registered DDR2 SDRAM DIMM EBE21AD4AJFA 256M words x 72 bits, 2 Ranks Specifications Features • Density: 2GB • Organization  256M words × 72 bits, 2 ranks • Mounting 36 pieces of 512M bits DDR2 SDRAM sealed in FBGA • Package: 240-pin socket type dual in line memory


    Original     		PDF EBE21AD4AJFA 240-pin 667Mbps cycles/64ms M01E0706 E1041E30 DDR2 DIMM 240 pin names DDR2-667 EDE5104AJSE-8E-E EBE21AD4AJFA-6E-E EBE21AD4AJFA 2843ps

    DDR2-667

    Abstract: EDE1108ACSE-6E-E
    Text: DATA SHEET 4GB Registered DDR2 SDRAM DIMM EBE42AE8ACFA 512M words x 72 bits, 4 Ranks Specifications Features • Density: 4GB • Organization  512M words × 72 bits, 4 ranks • Mounting 36 pieces of 1G bits DDR2 SDRAM sealed in FBGA • Package: 240-pin socket type dual in line memory


    Original     		PDF EBE42AE8ACFA 240-pin 667Mbps cycles/64ms M01E0706 E1206E10 DDR2-667 EDE1108ACSE-6E-E

    E0901E20

    Abstract: EBE41AE4ABHA DDR2-667
    Text: DATA SHEET 4GB Registered DDR2 SDRAM DIMM EBE41AE4ABHA 512M words x 72 bits, 2 Ranks Specifications Features • Density: 4GB • Organization  512M words × 72 bits, 2 ranks • Mounting 36 pieces of 1G bits DDR2 SDRAM with sFBGA • Package: 240-pin socket type dual in line memory


    Original     		PDF EBE41AE4ABHA 240-pin 667Mbps cycles/64ms M01E0706 E0901E20 E0901E20 EBE41AE4ABHA DDR2-667

    EDE1116ACSE-6E-E

    Abstract: DDR2-667 DDR2-800 EDE1116ACSE-8E-E DDR2 sodimm pcb layout
    Text: DATA SHEET 1GB DDR2 SDRAM SO-DIMM EBE11UE6ACSA 128M words x 64 bits, 2 Ranks Specifications Features • Density: 1GB • Organization  128M words × 64 bits, 2 ranks • Mounting 8 pieces of 1G bits DDR2 SDRAM sealed in FBGA • Package: 200-pin socket type small outline dual in


    Original     		PDF EBE11UE6ACSA 200-pin 800Mbps/667Mbps cycles/64ms M01E0706 E1045E20 EDE1116ACSE-6E-E DDR2-667 DDR2-800 EDE1116ACSE-8E-E DDR2 sodimm pcb layout

    Untitled

    Abstract: No abstract text available
    Text: * QUINT AN D/N A N D GATE SY100S304 SEMICONDUCTOR FEATURES DESCRIPTION Max. propagation delay of 1050ps Iee min. o f-60 m A Extended supply voltage option: V ee = -4.2V to -5.5V T he S Y 1 0 0 S 3 0 4 is an ultra-fast quint A N D /N A N D gate designed for use in high-perform ance ECL systems. This


    OCR Scan     		PDF SY100S304 1050ps F100K 24-pin

    Untitled

    Abstract: No abstract text available
    Text: « SYNERGY QUINT AND/NAND GATE SY100S304 SEMICONDUCTOR FEATURES DESCRIPTION Max. propagation delay of 1050ps Ie e The SY100S304 is an ultra-fast quint AND/NAND gate designed for use in high-perform ance ECL system s. This device also features a Function F output which is the wireNOR of the AND gate outputs. The inputs on the device


    OCR Scan     		PDF SY100S304 1050ps SY100S304 75Ki2

    Untitled

    Abstract: No abstract text available
    Text: * QUINT AND/NAND GATE SYNERGY SY100S304 SEMICONDUCTOR FEATURES DESCRIPTION Max. propagation delay of 1050ps The SY100S 304 is an ultra-fast quint AN D /N AN D gate designed for use in high-perform ance ECL system s. This device also fe a ture s a Function F output which is the w ireNOR of the AND gate outputs. T he inputs on the device


    OCR Scan     		PDF SY100S304 1050ps SY100S 75KC1 TDD13B1 SY100S304DC D24-1 SY100S304FC F24-1

    Untitled

    Abstract: No abstract text available
    Text: * QUINT AND/NAND GATE SYNERGY SY100S304 SEMICONDUCTOR FEATURES DESCRIPTION Max. propagation delay of 1050ps Iee min. o f-6 0 m A Extended supply voltage option: V ee = -4 .2 V to -5 .5 V The SY100S304 is an ultra-fast quint AND/NAND gate designed for use in high-performance ECL systems. This


    OCR Scan     		PDF SY100S304 1050ps SY100S304 75Ki2

    F100K

    Abstract: SY100S304 SY100S304DC SY100S304FC SY100S304JC
    Text: * S Y N E R G Y q u in t a n d /n a n d g a t e sy-io o s304 S E M IC O N D U C T O R FEATURES DESCRIPTION I Max. propagation delay of 1050ps I I e e min. o f-60m A The SY 100S 304 is an ultra-fast quint AN D /N AN D gate designed fo r use in high-perform ance ECL system s. This


    OCR Scan     		PDF SY100S304 1050ps of-60mA F100K SY100S304 TD013Ã SY100S304DC D24-1 SY100S304FC F100K SY100S304JC

    Untitled

    Abstract: No abstract text available
    Text: <o> ai 1m CmC i m w lC m m m •v i 00 S 304 “-.j U I N î AimD' N A N D i j A î E ^JSS W S E M /C O N D U C T O P m ssM FEA TU R E S The SY100S304 is an ultra-fast quint AND/NAND gate designed for use in high-performance ECL systems. This device also features a Function F output which is the wireNOR of the AND gate outputs. The inputs on the device


    OCR Scan     		PDF 1050ps SY100S304 75Ki2 F10QK 304FC SY100S 304JC D24-1 F24-1