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    SY100S Price and Stock

    Microchip Technology Inc SY100S834LZG-TR

    IC CLOCK GENERATOR 16SOIC
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    DigiKey SY100S834LZG-TR Digi-Reel 2,000 1
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    SY100S834LZG-TR Cut Tape 2,000 1
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    Avnet Americas SY100S834LZG-TR Reel 4 Weeks 1,000
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    Mouser Electronics SY100S834LZG-TR
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    Verical SY100S834LZG-TR 749 72
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    Newark SY100S834LZG-TR Reel 1,000
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    Microchip Technology Inc SY100S834LZG-TR Reel 10,000 7 Weeks
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    Onlinecomponents.com SY100S834LZG-TR
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    Rochester Electronics SY100S834LZG-TR 749 1
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    NAC SY100S834LZG-TR 8,000 1
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    Avnet Silica SY100S834LZG-TR 1,000 6 Weeks 1,000
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    EBV Elektronik SY100S834LZG-TR 5 Weeks 1,000
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    Master Electronics SY100S834LZG-TR
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    Microchip Technology Inc SY100S863JZ

    IC MULTIPLEXER 1 X 8:1 28PLCC
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    DigiKey SY100S863JZ Tube 56 1
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    Rochester Electronics LLC SY100S317DC

    TRIPLE 2-WIDE OA/OAI GATE
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    DigiKey SY100S317DC Bulk 50
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    Microchip Technology Inc SY100S811JC

    IC CLK BUFFER 2:9 28PLCC
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    DigiKey SY100S811JC Bulk 76
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    Microchip Technology Inc SY100S834ZH

    IC CLOCK GENERATOR 16SOIC
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    DigiKey SY100S834ZH Bulk 192
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    Find more SY100S price and stock on Findchips.com

    SY100S Datasheets (500)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF
    SY100S301 Micrel Semiconductor TRIPLE 5-INPUT OR/NOR GATE Original PDF
    SY100S301 Micrel Semiconductor TRIPLE 5-INPUT OR-NOR GATE Original PDF
    SY100S301DC Synergy Semiconductor TRIPLE 5-INPUT OR/NOR GATE Scan PDF
    SY100S301FC Micrel Semiconductor IC OR/NOR GATE TRIPLE 5IN ECL 24CQFP Original PDF
    SY100S301FC Micrel Semiconductor TRIPLE 5-INPUT OR/NOR GATE Original PDF
    SY100S301FC Synergy Semiconductor TRIPLE 5-INPUT OR/NOR GATE Scan PDF
    SY100S301JC Micrel Semiconductor IC OR/NOR GATE TRIPLE 5IN ECL 28LDCC Original PDF
    SY100S301JC Micrel Semiconductor TRIPLE 5-INPUT OR/NOR GATE Original PDF
    SY100S301JC Micrel Semiconductor Logic - Gates and Inverters - Multi-Function, Configurable, Integrated Circuits (ICs), IC GATE OR/NOR TRPL 5-IN 28-PLCC Original PDF
    SY100S301JC Synergy Semiconductor TRIPLE 5-INPUT OR/NOR GATE Scan PDF
    SY100S301JCTR Micrel Semiconductor IC OR/NOR GATE TRIPLE 5IN ECL 28LDCC Original PDF
    SY100S301JCTR Micrel Semiconductor TRIPLE 5-INPUT OR/NOR GATE Original PDF
    SY100S301JC-TR Microchip Technology Integrated Circuits (ICs) - Logic - Gates and Inverters - Multi-Function, Configurable - IC GATE OR/NOR TRPL 5-IN 28-PLCC Original PDF
    SY100S301JCTR Synergy Semiconductor TRIPLE 5-INPUT OR/NOR GATE Scan PDF
    SY100S301JZ Micrel Semiconductor Logic - Gates and Inverters - Multi-Function, Configurable, Integrated Circuits (ICs), IC GATE OR/NOR TRPL 5INP 28-PLCC Original PDF
    SY100S301JZ Micrel Semiconductor Logic - Gates and Inverters - Multi-Function, Configurable, Integrated Circuits (ICs), IC GATE OR/NOR TRPL 5INP 28-PLCC Original PDF
    SY100S301JZ-TR Microchip Technology Integrated Circuits (ICs) - Logic - Gates and Inverters - Multi-Function, Configurable - IC GATE OR/NOR TRPL 5INP 28-PLCC Original PDF
    SY100S302 Micrel Semiconductor QUINT 2-INPUT OR/NOR GATE Original PDF
    SY100S302 Micrel Semiconductor QUINT 2-INPUT OR-NOR GATE Original PDF
    SY100S302DC Synergy Semiconductor QUINT 2-INPUT OR/NOR GATE Scan PDF
    ...

    SY100S Datasheets Context Search

    Catalog Datasheet MFG & Type Document Tags PDF

    z162

    Abstract: No abstract text available
    Text: ÷1, ÷2, ÷4 OR (÷2, ÷4, ÷8) CLOCK GENERATION CHIP Micrel, Inc. Precision Edge SY100S834 SY100S834L Edge® SY100S834 SY100S834L FEATURES • ■ ■ ■ ■ ■ 3.3V and 5V power supply options 50ps output-to-output skew Synchronous enable/disable


    Original     		SY100S834 SY100S834L 16-pin SY100S834/L M9999-061209 z162 PDF

    F100K

    Abstract: SY100S304 SY100S304FC SY100S304JC SY100S304JCTR
    Text: QUINT AND/NAND GATE FEATURES SY100S304 DESCRIPTION • Max. propagation delay of 1050ps ■ IEE min. of –60mA ■ Extended supply voltage option: VEE = –4.2V to –5.5V ■ Voltage and temperature compensation for improved noise immunity ■ Internal 75KΩ input pull-down resistors


    Original     		SY100S304 1050ps F100K 24-pin 28-pin SY100S304 SY100S304FC F24-1 SY100S304JC J28-1 F100K SY100S304FC SY100S304JC SY100S304JCTR PDF

    F100K

    Abstract: SY100S301 SY100S301FC SY100S301JC SY100S301JCTR F100K ECL book
    Text: TRIPLE 5-INPUT OR/NOR GATE SY100S301 DESCRIPTION FEATURES • Max. propagation delay of 750ps ■ IEE min. of –25mA ■ Industry standard 100K ECL levels ■ Extended supply voltage option: VEE = –4.2V to –5.5V The SY100S301 is an ultra-fast triple 5-input OR/NOR


    Original     		SY100S301 750ps SY100S301 F100K 24-pin 28-pin SY100S301FC F24-1 SY100S301JC J28-1 F100K SY100S301FC SY100S301JC SY100S301JCTR F100K ECL book PDF

    F100K

    Abstract: SY100S336 SY100S336FC SY100S336JC SY100S336JCTR
    Text: 4-STAGE COUNTER/ SHIFT REGISTER FEATURES • ■ ■ ■ ■ ■ ■ ■ ■ ■ DESCRIPTION The SY100S336 functions either as a modulo-16 up/ down counter or as a 4-bit bidirectional shift register and is designed for use in high-performance ECL systems. Three


    Original     		SY100S336 modulo-16 SY100S336FC F24-1 SY100S336JC J28-1 SY100S336JCTR SY100S336 F24-1) F100K SY100S336FC SY100S336JC SY100S336JCTR PDF

    F100K

    Abstract: SY100S321 SY100S321FC SY100S321JC SY100S321JCTR
    Text: LOW-POWER 9-BIT INVERTER FEATURES SY100S321 DESCRIPTION • Max. propagation delay of 700ps ■ IEE min. of –55mA ■ Extended supply voltage option: VEE = –4.2V to –5.5V ■ Voltage and temperature compensation for improved noise immunity ■ 70% faster than Fairchild 300K at lower power


    Original     		SY100S321 700ps F100K 24-pin 28-pin SY100S321 F24-1 SY100S321JC J28-1 SY100S321JCTR F100K SY100S321FC SY100S321JC SY100S321JCTR PDF

    F100K

    Abstract: SY100S302 SY100S302FC SY100S302JC SY100S302JCTR
    Text: QUINT 2-INPUT OR/NOR GATE FEATURES The SY100S302 offers five 2-input OR/NOR gates designed for use in high-performance ECL systems. The five gates are controlled by a common Enable signal. All inputs have 75KΩ pull-down resistors and all outputs are buffered.


    Original     		SY100S302 J28-1 SY100S302FC F24-1 SY100S302JC SY100S302JCTR SY100S302 F24-1) F100K SY100S302FC SY100S302JC SY100S302JCTR PDF

    F100K

    Abstract: SY100S350 SY100S350FC SY100S350FCTR SY100S350JC
    Text: Micrel, Inc. SY100S350 FEATURES • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ SY100S350 HEX D-LATCH DESCRIPTION The SY100S350 offers six high-speed D-Latches with both true and complement outputs, and is performance compatible for use with high-performance ECL systems.


    Original     		SY100S350 SY100S350 M9999-032206 F100K SY100S350FC SY100S350FCTR SY100S350JC PDF

    SY100S811

    Abstract: SY100S811JC SY100S811ZC Q7920
    Text: SINGLE SUPPLY 1:9 PECL/TTL-TO-PECL Micrel, Inc. Precision Edge Precision SY100S811 Edge® SY100S811 FEATURES • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ PECL version of popular ECLinPS E111 Low skew Guaranteed skew spec VBB output TTL enable input Selectable TTL or PECL clock input


    Original     		SY100S811 SY100S811 M9999-021407 SY100S811JC SY100S811ZC Q7920 PDF

    SY100S370

    Abstract: transistor z2b Z4 13 F100K SY100S370FC SY100S370JC SY100S370JCTR Z745
    Text: UNIVERSAL DEMULTIPLEXER/ DECODER FEATURES SY100S370 DESCRIPTION • Max. propagation delay of 1200ps ■ IEE min. of –92mA ■ Industry standard 100K ECL levels ■ Extended supply voltage option: VEE = –4.2V to –5.5V ■ Voltage and temperature compensation for improved


    Original     		SY100S370 1200ps F100K 24-pin 28-pin SY100S370 F24-1 SY100S370JC J28-1 SY100S370JCTR transistor z2b Z4 13 F100K SY100S370FC SY100S370JC SY100S370JCTR Z745 PDF

    MARKING d2b

    Abstract: SY100S318FC SY100S318FCTR SY100S318JC SY100S318JCTR F100K SY100S318 D1C marking
    Text: 5-WIDE 5, 4, 4, 4, 2 OA/OAI GATE Micrel, Inc. SY100S318 SY100S318 DESCRIPTION FEATURES • Max. propagation delay of 800ps ■ IEE min. of –55mA ■ Extended supply voltage option: VEE = –4.2V to –5.5V ■ Voltage and temperature compensation for improved noise immunity


    Original     		SY100S318 800ps F100K 24-pin 28-pin SY100S318 M9999-032206 MARKING d2b SY100S318FC SY100S318FCTR SY100S318JC SY100S318JCTR F100K D1C marking PDF

    LD 757 ps

    Abstract: No abstract text available
    Text: * LOW POW ER HEX TTL-to-ECL TRANSLATO R SYNERGY SY100S324 S E M IC O N D U C T O R DESCRIPTION FEATURES Max. propagation delay of 1.4ns The SY100S324 is a hex translator designed to convert T T L logic levels to 100K ECL levels. The inputs are TTL com patible with diffe re n tia l o utputs that can e ith e r be


    OCR Scan     		SY100S324 F100K SY100S324 SY100S324DC SY100S324FC SY100S324JC SY100S324JCTR D24-1 F24-1 LD 757 ps PDF

    ic 3525 internal block diagram

    Abstract: s815
    Text: * SINGLE SUPPLY QUAD SYNERGY C lockworks SY100S815 PECL/TTL-TO-PECL SEMICONDUCTOR FEATURES • ■ Quad PECL version of popular ECLinPS El 11 ■ Low skew ■ Guaranteed skew spec ■ TTL enable Input ■ Selectable TTL or PECL clock input ■ Single +5V supply


    OCR Scan     		SY100S815 SY100S815ZC Y100S815ZCTR Z16-1 ic 3525 internal block diagram s815 PDF

    Untitled

    Abstract: No abstract text available
    Text: * TRIPLE 5-INPUT OR/NOR GATE SYNERGY SEMICONDUCTOR DESCRIPTION FEATURES Max. propagation delay of 750ps Iee SY100S301 min. o f-25 m A Industry standard 100K ECL levels T h e S Y 1 0 0 S 3 0 1 is an u ltra -fa s t triple 5 -in p u t O R /N O R g a te d e s ig n e d for use in h ig h -p e rfo rm a n c e E C L system s.


    OCR Scan     		750ps SY100S301 PDF

    Untitled

    Abstract: No abstract text available
    Text: * 16-INPUT MULTIPLEXER SYNERGY SY100S364 SEMICONDUCTOR FEATURES DESCRIPTION Max. propagation delay of 1300ps The SY100S364 is a 16-input m ultiplexer designed for use in high-perform ance ECL system s. The four Data Select inputs So, S i , S 2 , S 3 determ ine the bit from the 16


    OCR Scan     		16-INPUT SY100S364 1300ps SY100S364 75Ki2 PDF

    Untitled

    Abstract: No abstract text available
    Text: ENHANCED 4-STAGE COUNTER/SHIFT REGISTER SYNERG Y SY100S336A SEMICONDUCTOR FEATURES DESCRIPTION Max. shift frequency of 700MHz Clock to Q delay max. of 1100ps Sn to TC speed improved by 50% Sn set-up and hold time reduced by more than 50% Iee min. of -170m A


    OCR Scan     		SY100S336A 700MHz 1100ps -170m F100K 24-pin 28-pin PDF

    Untitled

    Abstract: No abstract text available
    Text: * SYNERGY LOW-POWER HEX TTL-TO-PECL TRANSLATOR SY100S391 SEMICONDUCTOR DESCRIPTION FEATURES Operates from a single +5V supply Differential PECL outputs Companion chip to SY100S390 PECL-to-TTL translator Function and pinout compatible with National and Signetics F100K


    OCR Scan     		SY100S391 SY100S390 F100K 24-pin 28-pin SY100S391 PDF

    Untitled

    Abstract: No abstract text available
    Text: « 01/Iie n /« V LOW-POWER HEX PECL-TO-TTL TRANSLATOR SYNERGY SEMICONDUCTOR FEATURES PRELIMINARY SY100S390 DESCRIPTION The SY100S390 is a hex PECL-to-TTL translator for converting 100K logic levels to TTL logic levels. Unlike other level translators, the SY100S390 operates using only one


    OCR Scan     		01/Iie SY100S390 SY100S390 28-pin T0Q13fil PDF

    Untitled

    Abstract: No abstract text available
    Text: £* 4-STAGE COUNTER/ SHIFTREGISTER SYNERGY SEMICONDUCTOR SY100S336 SY101S336 PRELIMINARY DESCRIPTION FEATURES The SY100/101S336 functions either as a modulo-16 up/down counter or as 4-bit bidirectional shift register and is designed for use in high performance E C L systems. Three Select inputs Sn


    OCR Scan     		SY100S336 SY101S336 SY100/101S336 modulo-16 PDF

    Untitled

    Abstract: No abstract text available
    Text: * 9-BIT BUFFER SYNERGY SY100S322 SEMICONDUCTOR DESCRIPTION FEATURES T h e S Y1O O S 322 is an u ltra -fa s t b u ffe r d e s ig n e d fo r u se in h ig h -p e rfo rm a n c e E C L s y s te m s . T h e d e v ic e p ro v id e s n in e n o n -in v e rtin g b u ffe rs w ith s in g le -e n d e d o u tp u ts . T h e


    OCR Scan     		SY100S322 700ps SY100S322DC D24-1 SY100S322FC F24-1 SY100S322JC J28-1 100S322JCTR PDF

    Untitled

    Abstract: No abstract text available
    Text: LOW-POWER HEX TTL-TO-PECL TRANSLATOR SYNERGY SY100S391 SEMICONDUCTOR FEATURES DESCRIPTION • Operates from a single +5V supply The SY100S391 is a hex TTL-to-PECL translator for converting TTL logic levels to 100K logic levels. The unique feature of this translator is the ability to do this


    OCR Scan     		SY100S391 SY100S391 T0013A1 00022b0 D24-1 391FC F24-1 PDF

    Untitled

    Abstract: No abstract text available
    Text: * QUINT DIFFERENTIAL LINE RECEIVER SYNERGY SY100S314 SEMICONDUCTOR DESCRIPTION FEATURES • Max. propagation delay of 900ps ■ Differential outputs ■ Ie e min. o f-60m A ■ ESD protection of 2000V ■ Extended supply voltage option: — VEE = -4.2V to -5.46V


    OCR Scan     		SY100S314 900ps f-60m F100K SY100S314 SY100S314DC D24-1 SY100S314FC F24-1 SY100S314JC PDF

    Untitled

    Abstract: No abstract text available
    Text: « LOW-POWER HEX PECL-TO-TTL TRANSLATOR SYNERGY SEMICONDUCTOR FE A T U R E S PRELIMINARY SY100S390 DESCRIPTION The SY100S390 is a hex PECL-to-TTL translator for converting 100K logic levels to TTL logic levels. Unlike other level translators, the SY100S390 operates using only one


    OCR Scan     		SY100S390 SY100S390 PDF

    Untitled

    Abstract: No abstract text available
    Text: •C* QUINT 2-INPUT OR/NOR GATE SYNERGY SEMICONDUCTOR SY100S302 SY101S302 PRELIMINARY FEATURES • ■ ■ ■ ■ ■ ■ 700 ps max. Propagation Delay. Enable to Output max. of 900 ps. I ee mln. of -4 5 mA. ESD protection of 2000 V. Industry standard 100K ECL levels.


    OCR Scan     		SY100S302 SY101S302 SY100S302: SY101S302: 100/101S 50KC5 PDF

    Untitled

    Abstract: No abstract text available
    Text: TRIPLE 4-INPUT MULTIPLEXER WITH ENABLE SYNERGY SEMICONDUCTOR SY100S371 SY101S371 ADVANCE INFORMATION DESCRIPTION FEATURES The SY100/101S371 is an ultra-fast triple, 4-input multiplexer with true and complementary outputs, designed for use in high performance ECL systems. The multiplexers are controlled by


    OCR Scan     		SY100S371 SY101S371 SY100/101S371 SY100S371: SY101S371: PDF