0838H Search Results

sound Processor acp 2371

Abstract: MAC198 SI 1340H MSP2400 ACP 2371 1030h vcu2133a SI 1020H dma2275 TPU2740
Contextual Info: MICRONAS INTERMETALL DMA 2275, DMA 2286 C/D/D2-MAC Descrambler MICRONAS Edition May 20, 1992 6251-330-1E DMA 2275, DMA 2286 Contents Page Section Title 4 4 4 1. 1.1. 1.2. Introduction General Information Environment 5 2. Chip Architecture 6 6 6 6 6 3. 3.1.

S1D13513

Abstract: 1B10h Epson S1D13513 Graphics Driver icsp1 300eh RF 300eh X78B-A-001-01 ICSP2 CTC 1061
Contextual Info: S1D13513 Display Controller Hardware Functional Specification Document Number: X78B-A-001-01 Status: Revision 1.0 Issue Date: 2007/06/05 SEIKO EPSON CORPORATION 2006-2007. All Rights Reserved. Information in this document is subject to change without notice. You may download and use this document, but only for your own use in

11-B

Abstract: DS31256 DS3134 SV54
Contextual Info: DEMO KIT AVAILABLE DS31256 Envoy 256-Channel, High-Throughput HDLC Controller www.maxim-ic.com GENERAL DESCRIPTION The DS31256 Envoy is a 256-channel HDLC controller capable of handling up to 64 T1 or E1 data streams or two T3 data streams. Each of the 16 physical ports can handle one, two, or four

TMS320f24xx DSP

Abstract: instruction set architecture intel i7 SPRU430D TMS320F24XX TMS320f24xx datasheet INSTRUCTION SET FOR TMS320F2812 3F801 spru430 TMS320f2812 pwm vector code source lt 6249
Contextual Info: TMS320C28x DSP CPU and Instruction Set Reference Guide Literature Number: SPRU430D August 2001 − Revised March 2004 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries TI reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue

Contextual Info: DEMO KIT AVAILABLE DS31256 256-Channel, High-Throughput HDLC Controller www.maxim-ic.com GENERAL DESCRIPTION FEATURES The DS31256 Envoy is a 256-channel HDLC controller that can handle up to 60 T1 or 64 E1 data streams or two T3 data streams. Each of the 16 physical ports can handle one, two, or four

Contextual Info: Intel Atom Processor D2000 and N2000 Series Datasheet – Volume 2 of 2 Refer to Doc ID 326136-002 for Volume 1 of 2 December 2011 Revision 002 Document Number : 326137-002 INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL® PRODUCTS. NO LICENSE, EXPRESS OR

eMMC intel

Abstract: ARM1176 bga DP308 P210A eMMC 4.4 7150H mst9588 SI 1340H PD77630A emmc 4.5
Contextual Info: ユーザーズ・マニュアル 携帯マルチメディア・プロセッサ 1 チップ編 EMMA MobileTM1-S PD77630A R19UH0031JJ0600（第６版） S19687JJ6V0UM00 発行年月 June 2010 資料番号 2010 Renesas Electronics Corporation. All rights reserved.

08B8H

Abstract: s1854 PD77630A 0884H ab1u R19UH0029JJ 516NS stmode 4eh7 08B4H
Contextual Info: ユーザーズ・マニュアル 携帯マルチメディア・プロセッサ システム制御／汎用入出力インタフェース編 EMMA MobileTM1 資料番号 発行年月 R19UH0029JJ0500（第５版） S19265JJ5V0UM00 June 2010 2010 Renesas Electronics Corporation. All rights reserved.

TP31C

Abstract: r02f Boss NS-2 PAB1 td33 LDO DS3131 DS3134 LA10 LA12 TD39
Contextual Info: DALLAS SEM ICONDUCTOR DS3131 Preliminary Data Sheet V2 January 26, 1999 DALLAS SEMICONDUCTOR DS3131 BoSS Bit Synchronous HDLC CONTROLLER 40 Port / 40 Channel HDLC Controller with Option for Local Bus Access Preliminary Data Sheet Version 2 January 26, 1999

09-D2

Abstract: RGB565 to rgb888 epson 16F8H T-1228 S2D13719 T-1227 Casio 1026 casio tft T14-22 T1205A
Contextual Info: S2D13719 Mobile Graphics Engine Hardware Functional Specification Document Number: X59A-A-002-01 Status: Revision 1.2 Issue Date: 2008/10/27 SEIKO EPSON CORPORATION 2008. All Rights Reserved. Information in this document is subject to change without notice. You may download and use this document, but only for your own use in

INT1400

Abstract: SPRU220 TMS320C27 TMS320 XDS510 assembly language programming
Contextual Info: TMS320C27xx DSP CPU and Instruction Set Reference Guide Preliminary Literature Number: SPRU220B March 1998 Printed on Recycled Paper IMPORTANT NOTICE Texas Instruments TI reserves the right to make changes to its products or to discontinue any semiconductor product or service without notice, and advises its customers to obtain the latest

TC1766

Abstract: LMB 1028 cpu 414-4H apn 2054 MTI LTC 010 phase looked loop CERBERUS ocds Tricore TC1766 L-13 The 8002 Amplifier IC
Contextual Info: User’s Manual, V2.0, July 2007 TC1766 32-Bit Single-Chip Microcontroller Volume 1 of 2 : System Units Volume 2 (of 2): Peripheral Units Microcontrollers Edition 2007-07 Published by Infineon Technologies AG 81726 München, Germany Infineon Technologies AG 2007.

LA0-RD37

Contextual Info: PRELIMINARY DS3131 BoSS Bit SynchronouS HDLC Controller www.maxim-ic.com FEATURES § § § § § § 40 timing independent bit synchronous ports 40Rx and 40Tx coupled with 40 independent Bidirectional HDLC channels Each port can operate up to 52 Mbps 132Mbps full-duplex throughput

lmb 1021

Abstract: marking code INFINEON CERBERUS CNC DRIVES tb 1060 f022 INTF3000 L-12 L-13 MTI LTC 010 t-con lvds
Contextual Info: User’s Manual, V2.0, Aug. 2007 TC116x 32-Bit Single-Chip Microcontroller Volume 1 of 2 : System Units Volume 2 (of 2): Peripheral Units Microcontrollers Edition 2007-08 Published by Infineon Technologies AG 81726 München, Germany Infineon Technologies AG 2007.

CONTROLLER

Abstract: AT90S1200-4SC AT90S1200-4PC
Contextual Info: Features • Utilizes the AVR RISC Architecture • AVR – High-performance and Low-power RISC Architecture • • • • • • • • – 89 Powerful Instructions – Most Single Clock Cycle Execution – 32 x 8 General Purpose Working Registers – Up to 12 MIPS Throughput at 12 MHz

Contextual Info: DALLAS SEM ICONDUCTOR DS3131 Preliminary Data Sheet V1 August 6, 1998 DALLAS SEMICONDUCTOR DS3131 BOSS Bit and Octet Synchronous HDLC CONTROLLER 40 Port / 40 Channel HDLC Controller with Options for Local Bus Access & an Octet Synchronous Port Preliminary Data Sheet

HDLC 3309 1993

Abstract: DS3134 RS15 TD15 TS15 33091
Contextual Info: PRELIMINARY DS3134 Chateau – Channelized T1 And E1 And HDLC Controller www.dalsemi.com FEATURES • • • • • • • • • • 256 Channel HDLC Controller that Supports up to 64 T1 or E1 Lines or Two T3 Lines 256 Independent bi-directional HDLC

Epson S1D13513 Graphics Driver

Abstract: S1D13513 ITU-R BT.709 X78C-A-001-01 icsp1 2824H 500AH
Contextual Info: S1D13513 Display Controller Hardware Functional Specification Document Number: X78C-A-001-01 Status: Revision 1.8 Issue Date: 2010/10/20 SEIKO EPSON CORPORATION 2006-2010. All Rights Reserved. Information in this document is subject to change without notice. You may download and use this document, but only for your own use in

PSA B20 0110

Abstract: pabi DS3134 LA10 LA12 LA15
Contextual Info: DALLAS SEM ICONDUCTOR DS3134 Preliminary Data Sheet V4 November 18, 1998 DALLAS SEMICONDUCTOR DS3134 CHATEAU CHAnnelized T1 and E1 And Universal HDLC CONTROLLER 256 Channel HDLC Controller that Supports up to 64 T1 or E1 Lines or Two T3 Lines Preliminary Data Sheet

TH21C

Abstract: TP31C hdlc 11-B DS3131 TD39
Contextual Info: DEMO KIT AVAILABLE DS3131 BoSS 40-Port, Unchannelized Bit-Synchronous HDLC www.maxim-ic.com GENERAL DESCRIPTION FEATURES The DS3131 bit-synchronous BoSS HDLC controller can handle up to 40 channels of highspeed, unchannelized, bit-synchronous HDLC. The on-board DMA has been optimized for

AT90S1200-4PC

Abstract: AT90S1200 AT90S1200-12pc AT90S1200-12SI AT90S1200-4SC AT90S1200A 14-STAG TCCR0
Contextual Info: Features • Utilizes the AVR RISC Architecture • AVR – High-performance and Low-power RISC Architecture • • • • • • • • – 89 Powerful Instructions – Most Single Clock Cycle Execution – 32 x 8 General Purpose Working Registers – Up to 12 MIPS Throughput at 12 MHz

Contextual Info: DALLAS SEMICONDUCTOR DS3134 Preliminary Data Sheet V5 September 1, 1999 DALLAS SEMICONDUCTOR DS3134 CHATEAU CHAnnelized T1 and E1 And Universal HDLC CONTROLLER 256 Channel HDLC Controller that Supports up to 56 T1 or E1 Lines or Two T3 Lines Preliminary Data Sheet

Contextual Info: DALLAS SEMICONDUCTOR DS3131 Preliminary Data Sheet V2 January 26, 1999 DALLAS SEMICONDUCTOR DS3131 BoSS Bit Synchronous HDLC CONTROLLER 40 Port / 40 Channel HDLC Controller with Option for Local Bus Access Preliminary Data Sheet Version 2 January 26, 1999

TP31C

Abstract: DS3131 DS3134 LA10 LA12 TD39 811B
Contextual Info: DALLAS SEMICONDUCTOR DS3131 Preliminary Data Sheet V2 January 26, 1999 DALLAS SEMICONDUCTOR DS3131 BoSS Bit SynchronouS HDLC CONTROLLER 40 Port / 40 Channel HDLC Controller with Option for Local Bus Access Preliminary Data Sheet Version 2 January 26, 1999