TP31C
Abstract: r02f Boss NS-2 PAB1 td33 LDO DS3131 DS3134 LA10 LA12 TD39
Text: DALLAS SEM ICONDUCTOR DS3131 Preliminary Data Sheet V2 January 26, 1999 DALLAS SEMICONDUCTOR DS3131 BoSS Bit Synchronous HDLC CONTROLLER 40 Port / 40 Channel HDLC Controller with Option for Local Bus Access Preliminary Data Sheet Version 2 January 26, 1999
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DS3131
164Mbps
132Mbps.
50MHz
33MHz.
DS3131.
TP31C
r02f
Boss NS-2
PAB1
td33 LDO
DS3134
LA10
LA12
TD39
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LA0-RD37
Abstract: No abstract text available
Text: PRELIMINARY DS3131 BoSS Bit SynchronouS HDLC Controller www.maxim-ic.com FEATURES § § § § § § 40 timing independent bit synchronous ports 40Rx and 40Tx coupled with 40 independent Bidirectional HDLC channels Each port can operate up to 52 Mbps 132Mbps full-duplex throughput
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DS3131
132Mbps
25MHz
33MHz
32-bit
DS3134
DS3131
DS3131.
LA0-RD37
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Untitled
Abstract: No abstract text available
Text: DALLAS SEM ICONDUCTOR DS3131 Preliminary Data Sheet V1 August 6, 1998 DALLAS SEMICONDUCTOR DS3131 BOSS Bit and Octet Synchronous HDLC CONTROLLER 40 Port / 40 Channel HDLC Controller with Options for Local Bus Access & an Octet Synchronous Port Preliminary Data Sheet
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DS3131
DS3131
DS3131.
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TH21C
Abstract: TP31C hdlc 11-B DS3131 TD39
Text: DEMO KIT AVAILABLE DS3131 BoSS 40-Port, Unchannelized Bit-Synchronous HDLC www.maxim-ic.com GENERAL DESCRIPTION FEATURES The DS3131 bit-synchronous BoSS HDLC controller can handle up to 40 channels of highspeed, unchannelized, bit-synchronous HDLC. The on-board DMA has been optimized for
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DS3131
40-Port,
DS3131
DS3131.
TH21C
TP31C
hdlc
11-B
TD39
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Untitled
Abstract: No abstract text available
Text: DALLAS SEMICONDUCTOR DS3131 Preliminary Data Sheet V2 January 26, 1999 DALLAS SEMICONDUCTOR DS3131 BoSS Bit Synchronous HDLC CONTROLLER 40 Port / 40 Channel HDLC Controller with Option for Local Bus Access Preliminary Data Sheet Version 2 January 26, 1999
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OCR Scan
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DS3131
DS3131
164Mbps
132Mbps.
50MHz
33MHz.
DS3131.
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PDF
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TP31C
Abstract: DS3131 DS3134 LA10 LA12 TD39 811B
Text: DALLAS SEMICONDUCTOR DS3131 Preliminary Data Sheet V2 January 26, 1999 DALLAS SEMICONDUCTOR DS3131 BoSS Bit SynchronouS HDLC CONTROLLER 40 Port / 40 Channel HDLC Controller with Option for Local Bus Access Preliminary Data Sheet Version 2 January 26, 1999
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DS3131
DS3131
164Mbps
132Mbps.
50MHz
33MHz.
DS3131.
TP31C
DS3134
LA10
LA12
TD39
811B
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TP31C
Abstract: PCI Backplane DS3131 DS3134 TC10 TC12 TD39 811af 32 bit pci backplane LD0-TC28
Text: DS3131 BoSS Bit SynchronouS HDLC Controller www.dalsemi.com FEATURES • • • • • • • • • • • 40 timing independent bit synchronous ports 40Rx & 40Tx coupled with 40 independent Bi-directional HDLC channels Each port can operate up to 52 Mbps
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DS3131
32-bit
DS3131
DS3131.
TP31C
PCI Backplane
DS3134
TC10
TC12
TD39
811af
32 bit pci backplane
LD0-TC28
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Digital Alarm Clock by ttl
Abstract: ami circuit diagram MJ1446 pcm ami
Text: GEC P L E S S E Y | S E M I C O N D U C T O R S | DS3131-1.0 2 MBIT PCM SIGNALLING CIRCUIT MJ1446 TIME SLOT 16 RECEIVER AND TRANSMITTER The 2.048 Mbit PCM signalling circuits comprise a group of circuits which will perform the common signalling
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DS3131-1
MJ1446
MJ1446
64kbits/sec
Digital Alarm Clock by ttl
ami circuit diagram
pcm ami
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TP31C
Abstract: LA0-RD37 RC20
Text: PRELIMINARY DS3131 BoSS Bit SynchronouS HDLC Controller www.maxim-ic.com FEATURES § § § § § § 40 timing independent bit synchronous ports 40Rx and 40Tx coupled with 40 independent Bidirectional HDLC channels Each port can operate up to 52 Mbps 132Mbps full-duplex throughput
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DS3131
132Mbps
25MHz
33MHz
32-bit
DS3134
DS3131
DS3131.
TP31C
LA0-RD37
RC20
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AN-386
Abstract: hdlc 070C 071C AN386 DS3131
Text: Application Note 386 DS3131 Step by Step Configuration— Configuration Mode www.maxim-ic.com OVERVIEW This application note describes an example of how to configure a single port on the DS3131 operating in configuration mode. Additionally, this example describes how to construct, send, receive, and check a
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DS3131
DS3131:
0x0000FFFF;
0x01234567
0x89ABCDEF
0x02468ACE
0x13579BDF
0x05127B09
AN-386
hdlc
070C
071C
AN386
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rc16 8pin
Abstract: DS3131 DS3131DK LT1086 TD39 la6 dk RC39
Text: DS3131DK Bit-SynchronouS BoSS HDLC Controller Demo Kit www.maxim-ic.com GENERAL DESCRIPTION FEATURES § § § § § § § § § The DS3131 bit-synchronous (BoSS) HDLC controller can handle up to 40 channels of highspeed, unchannelized, bit-synchronous HDLC.
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DS3131DK
DS3131
52Mbps
132Mbps
DS3134
rc16 8pin
DS3131DK
LT1086
TD39
la6 dk
RC39
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TP31C
Abstract: 083C Cables datasheet rh16c RH25CR hdlc 11-B DS3131 TD39 TH21C rbp2
Text: DEMO KIT AVAILABLE DS3131 BoSS 40-Port, Unchannelized Bit-Synchronous HDLC www.maxim-ic.com GENERAL DESCRIPTION FEATURES The DS3131 bit-synchronous BoSS HDLC controller can handle up to 40 channels of highspeed, unchannelized, bit-synchronous HDLC. The on-board DMA has been optimized for
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DS3131
40-Port,
DS3131
DS3131.
TP31C
083C Cables datasheet
rh16c
RH25CR
hdlc
11-B
TD39
TH21C
rbp2
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hdlc
Abstract: DS3131
Text: Application Note 383 DS3131 BoSS Initialization Steps www.maxim-ic.com OVERVIEW By design, upon power-up the BoSS will not take control of the PCI bus. All the physical ports will send all ones not the HDLC idle code and, therefore, the BoSS will be idle upon power-up. On the other
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DS3131
hdlc
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hdlc
Abstract: RPEN 070C 071C AN385 DS3131 0x02468ACE 0x10000100
Text: Application Note 385 DS3131 Step by Step Configuration—Bridge Mode www.maxim-ic.com OVERVIEW This application note describes an example of how to configure a single port on the DS3131 operating in bridge mode. Additionally, this example describes how to construct, send, receive, and check a packet in
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DS3131
DS3131:
0x0000FFFF;
0x01234567
0x89ABCDEF
0x02468ACE
0x13579BDF
hdlc
RPEN
070C
071C
AN385
0x02468ACE
0x10000100
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Untitled
Abstract: No abstract text available
Text: DMC3036LSD COMPLEMENTARY PAIR ENHANCEMENT MODE MOSFET Product Summary Device V BR DSS N-CH 30V P-CH -30V RDS(ON) max 36mΩ @ VGS = 10V 61mΩ @ VGS = 4.5V 36mΩ @ VGS = -10V 64mΩ @ VGS = -4.5V Features Package ID TA = +25°C SO-8 6.9A 5.1A -6.0A -5.0 •
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DMC3036LSD
AEC-Q101
DS31311
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Untitled
Abstract: No abstract text available
Text: DMC3018LSD COMPLEMENTARY PAIR ENHANCEMENT MODE FIELD EFFECT TRANSISTOR Please click here to visit our online spice models database. Features NE W PRODUC T • • • • • • • • • Mechanical Data • • Complementary Pair MOSFET Low On-Resistance
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DMC3018LSD
AEC-Q101
J-STD-020D
DS31310
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DMC3036LSD
Abstract: No abstract text available
Text: DMC3036LSD COMPLEMENTARY PAIR ENHANCEMENT MODE MOSFET Mechanical Data Features NE W PRODUCT • • • • • • • • • • • • Complementary Pair MOSFETs Low On-Resistance • N-Channel: 36m @ 10V 61m @ 4.5V • P-Channel: 36m @ -10V 64m @ -4.5V
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DMC3036LSD
AEC-Q101
J-STD-020D
DS31311
DMC3036LSD
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max14574
Abstract: MAX1786 MAX1788 MAX8899 DS1849 MAX16908 MAX4967 DS3610 max17018 max13487
Text: Monitor Reports by Product: 1. Find the product of interest in the table below. Note the process and/or package for that product. 2. Use the "Back" button to return to the home page. 3. Select the process in the "Process Reliability" for the product of interest.
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Untitled
Abstract: No abstract text available
Text: DMC3018LSD COMPLEMENTARY PAIR ENHANCEMENT MODE FIELD EFFECT TRANSISTOR Please click here to visit our online spice models database. Features NE W PRODUC T • • • • • • • • • Mechanical Data • • Complementary Pair MOSFET Low On-Resistance
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DMC3018LSD
AEC-Q101
J-STD-020D
DS31310
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C3018LD
Abstract: No abstract text available
Text: DMC3018LSD NEW PRODUCT COMPLEMENTARY PAIR ENHANCEMENT MODE MOSFET Features Mechanical Data • • • • • • • • • • • Complementary Pair MOSFET Low On-Resistance • N-Channel: 20mΩ @ 10V 32mΩ @ 4.5V • P-Channel: 45mΩ @ -10V 65mΩ @ -4.5V
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DMC3018LSD
AEC-Q101
J-STD-020
MIL-STD-202,
DS31310
C3018LD
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DMC3018LSD
Abstract: DMC3018LSD-13 J-STD-020D
Text: DMC3018LSD COMPLEMENTARY PAIR ENHANCEMENT MODE MOSFET Please click here to visit our online spice models database. Features NE W PRODUC T • • • • • • • • • Mechanical Data • • Complementary Pair MOSFET Low On-Resistance • N-Channel: 20mΩ @ 10V
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DMC3018LSD
AEC-Q101
J-STD-020D
DS31310
DMC3018LSD
DMC3018LSD-13
J-STD-020D
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AP1534
Abstract: AP1534SG-13 B240A
Text: AP1534 PWM CONTROL 2A STEP-DOWN CONVERTER Description Pin Assignments AP1534 consists of step-down switching regulator with PWM control. These devices include a reference voltage source, oscillation circuit, error amplifier, internal PMOS. Top View 8 VSS
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AP1534
AP1534
DS31314
AP1534SG-13
B240A
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ROUND ROBIN ARBITRATION AND FIXED PRIORITY SCHEME
Abstract: Channels64 ROUND ROBIN ARBITRATION AND FIXED PRIORITY hdlc DS31256 DS3131 DS3134
Text: Application Note 2351 DS31256 and DS3134 HDLC Controller Comparisons www.maxim-ic.com INTRODUCTION This application note compares the differences between the DS3134 CHATEAU and the DS31256 Envoy HDLC controllers. The most important difference is that all known DS3134 errata have been fixed in DS31256, and the
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DS31256
DS3134
DS31256,
DS3134.
DS31256.
ROUND ROBIN ARBITRATION AND FIXED PRIORITY SCHEME
Channels64
ROUND ROBIN ARBITRATION AND FIXED PRIORITY
hdlc
DS3131
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Untitled
Abstract: No abstract text available
Text: DS31256DK 256-Channel, High-Throughput HDLC Controller Demonstration Kit www.maxim-ic.com GENERAL DESCRIPTION FEATURES The DS31256DK is a demonstration and evaluation kit for the DS31256 256-channel, high-throughput HDLC controller. The DS31256DK board is a PCIbased platform that offers quick and easy evaluation
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DS31256DK
256-Channel,
DS31256DK
DS31256
95/98/2000/NT.
200MHz+
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