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    Y10 P87 Search Results

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    Y10 P87 Price and Stock

    KEMET Corporation SBCP-87HY101H

    Power Inductors - Leaded 100uH 10% 900mA DCR=300mOhms
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    Mouser Electronics SBCP-87HY101H 2,756
    • 1 $1.73
    • 10 $1.3
    • 100 $1.07
    • 1000 $0.972
    • 10000 $0.815
    		Buy Now

    KEMET Corporation SBCP-87HY102H

    Power Inductors - Leaded 1000uH 10% 0.25A DCR=2820mOhms
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    Mouser Electronics SBCP-87HY102H 1,998
    • 1 $1.77
    • 10 $1.33
    • 100 $1.09
    • 1000 $0.939
    • 10000 $0.833
    		Buy Now

    KEMET Corporation SBCP-87HY100H

    Power Inductors - Leaded 10uH 20% 2.3A DCR=50mOhms
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    Mouser Electronics SBCP-87HY100H 1,838
    • 1 $2.02
    • 10 $1.45
    • 100 $1.18
    • 1000 $1
    • 10000 $0.999
    		Buy Now

    Y10 P87 Datasheets Context Search

    Catalog Datasheet Type Document Tags PDF

    FPGA Virtex 6

    Abstract: aj4 diode IO-L93N v1-3 F1 AB29 AG29 ak27 diode PCI33 XAPP235 XCV200
    Text: Application Note: Virtex-E Families R Virtex Package Compatibility Guide XAPP235 v1.3 June 20, 2000 Summary This package compatibility guide describes the pinouts and established guidelines for package compatibility between the Virtex family and the Virtex-E and Virtex-E Extended Memory


    Original     		XAPP235 FG900 XCV1000E XCV812E XCV1000E L264N L264P L279N L279P FPGA Virtex 6 aj4 diode IO-L93N v1-3 F1 AB29 AG29 ak27 diode PCI33 XAPP235 XCV200 PDF

    7C510

    Abstract: CY7C510 cy7c510-55
    Text: CY7C510 CYPRESS SEMICONDUCTOR • • Fast — C Y 7C 510-45 has a 45-ns max. clock cycle (commercial) — CY7C510—55 has a 55-ns (max.) clock cycle (military) • T W s com plem ent or unsigned magni­ tude operation • Capable o f w ithstanding greater than


    OCR Scan     		CY7C510 45-ns CY7C510--55 55-ns 35-bit 510--65G 510--65LM 510--75D 510--75G 7C510 CY7C510 cy7c510-55 PDF

    p181 g8

    Abstract: 105 p180 g8 707 p181 g5209 p115 SPARTAN XC2S50 SPARTAN-II xc2s200 pq208 tms 374 transistor be p88 P140
    Text: Spartan-II 2.5V FPGA Family: Pinout Tables R DS001-4 v2.4 April 30, 2001 Preliminary Product Specification Pin Definitions Pin Name Dedicated Pin Direction Description GCK0, GCK1, GCK2, GCK3 No Input Clock input pins that connect to Global Clock Buffers. These pins become


    Original     		DS001-4 tha00 XC2S50 DS001-1, DS001-2, DS001-3, DS001-4, p181 g8 105 p180 g8 707 p181 g5209 p115 SPARTAN XC2S50 SPARTAN-II xc2s200 pq208 tms 374 transistor be p88 P140 PDF

    p181 g8

    Abstract: 105 p180 g8 p27m2 L2251 SPARTAN-II xc2s200 pq208 p180 g8 6p114 DS001-4 g5209 N2407
    Text: Spartan-II 2.5V FPGA Family: Pinout Tables R DS001-4 v2.0 September 18, 2000 Preliminary Product Specification Pin Definitions Pin Name Dedicated Pin Direction Description GCK0, GCK1, GCK2, GCK3 No Input Clock input pins that connect to Global Clock Buffers. These pins become


    Original     		DS001-4 IndicatesP10 DS001-1, DS001-2, DS001-3, DS001-4, p181 g8 105 p180 g8 p27m2 L2251 SPARTAN-II xc2s200 pq208 p180 g8 6p114 DS001-4 g5209 N2407 PDF

    105 p180 g8

    Abstract: SPARTAN-II xc2s200 pq208 p181 g8 g5209 p115 SPARTAN XC2S50 P120 G8 transistor be p88 P137 P141
    Text: 028 Spartan-II 2.5V FPGA Family: Pinout Tables R DS001-4 v2.5 September 3, 2003 Product Specification Pin Definitions Pin Name Dedicated Pin Direction Description GCK0, GCK1, GCK2, GCK3 No Input Clock input pins that connect to Global Clock Buffers. These pins become


    Original     		DS001-4 XC2S50 XC2S30 DS001-1, DS001-2, DS001-3, DS001-4, 105 p180 g8 SPARTAN-II xc2s200 pq208 p181 g8 g5209 p115 SPARTAN XC2S50 P120 G8 transistor be p88 P137 P141 PDF

    tsl-3

    Abstract: ISM210 ISP9210MD64-75HR P271 TDC1010 "multiplier accumulator"
    Text: Intersil High-Rellability Products ISP9210 High Reliability CMOS 16 x 16 Bit, 75 ns Military Multiplier/Accumulator GENERAL DESCRIPTION APPLICATIONS The ISP9210 is a high-speed 16 x 16 Bit Parallel Multipli­ er/Accumulator which operates at a 65 ns clock rate (more


    OCR Scan     		ISP9210 ISP9210 IM29C128 IM29CS10 tsl-3 ISM210 ISP9210MD64-75HR P271 TDC1010 "multiplier accumulator" PDF

    SMD Transistor Y02

    Abstract: SAA7113 Application notes SMD Transistor Y13 SAA7113A p87c695 sMD .v05 smd V05 BGA292 SAA6721E SAA7113
    Text: INTEGRATED CIRCUITS DATA SHEET SAA6721E SXGA RGB to TFT graphics engine Preliminary specification File under Integrated Circuits, IC02 1999 May 11 Philips Semiconductors Preliminary specification SXGA RGB to TFT graphics engine SAA6721E CONTENTS 8.4 1 FEATURES


    Original     		SAA6721E 545004/750/01/pp72 SMD Transistor Y02 SAA7113 Application notes SMD Transistor Y13 SAA7113A p87c695 sMD .v05 smd V05 BGA292 SAA6721E SAA7113 PDF

    P87C695

    Abstract: VPC3 C upscaler pab7 SMD Transistor Y02
    Text: INTEGRATED CIRCUITS DATA SHEET SAA6721E SXGA RGB to TFT graphics engine Preliminary specification File under Integrated Circuits, IC02 1999 May 11 Philips Semiconductors Preliminary specification SXGA RGB to TFT graphics engine SAA6721E CONTENTS 8.4 1 FEATURES


    Original     		SAA6721E 11-May-99 P87C695 VPC3 C upscaler pab7 SMD Transistor Y02 PDF

    P1152

    Abstract: ae301 xcv400e XCV100E XCV200E XCV300E XCV1000E XCV1600E XCV600E FG676
    Text: R Virtex-E Pin Definitions Pin Name Dedicated Pin Direction Description GCK0, GCK1, GCK2, GCK3 Yes Input Clock input pins that connect to Global Clock Buffers. These pins become user inputs when not needed for clocks. M0, M1, M2 Yes Input Mode pins are used to specify the configuration mode.


    Original     		BG432 BG560 FGF676 FG680 FG456. DS011 P1152 ae301 xcv400e XCV100E XCV200E XCV300E XCV1000E XCV1600E XCV600E FG676 PDF

    tfbga289

    Abstract: toshiba microprocessor 8x TMP19A63 diode m7 toshiba TX19A TX39 P-TFBGA289 philips semiconductor data handbook TMP19A63F10XBG 1TMP19A63F10XBG
    Text: 32-Bit TX System RISC TX19 Family TMP19A63CDXBG Rev1.1 2008-3-28 TMP19A63C Contents TMP19A63CDXBG 1 2 3 4 5 Overview and Features Pin Layout and Pin Functions Memory Map Electrical Characteristics Package TMP19A63 rev1.1 TMP19A63C 32-Bit RISC Microprocessor TX19 Family


    Original     		32-Bit TMP19A63CDXBG TMP19A63C TMP19A63 TX19A tfbga289 toshiba microprocessor 8x diode m7 toshiba TX39 P-TFBGA289 philips semiconductor data handbook TMP19A63F10XBG 1TMP19A63F10XBG PDF

    TB16OUT

    Abstract: schmitt trigger using ic 555 timer P-TFBGA289 TMP19A61 toshiba PP7 TMP19A61C10XBG
    Text: 32-bit TX System RISC TX19 Family TMP19A61C10XBG TMP19A61CDXBG Rev1.0 2008-12-05 TMP19A61 32-Bit RISC Microprocessor TX19 Family TMP19A61C10XBG, TMP19A61CDXBG 1. Overview and features TMP19A61 is equipped with the TX19A processor core that forms a high-performance 32-bit RISC


    Original     		32-bit TMP19A61C10XBG TMP19A61CDXBG TMP19A61 TMP19A61C10XBG, TMP19A61CDXBG TMP19A61 TX19A TB16OUT schmitt trigger using ic 555 timer P-TFBGA289 toshiba PP7 PDF

    TMP19A61C10XBG

    Abstract: No abstract text available
    Text: 32-bit TX System RISC TX19 Family TMP19A61C10XBG TMP19A61CDXBG Rev1.0 2008-12-05 TMP19A61 32-Bit RISC Microprocessor TX19 Family TMP19A61C10XBG, TMP19A61CDXBG 1. Overview and features TMP19A61 is equipped with the TX19A processor core that forms a high-performance 32-bit RISC


    Original     		32-bit TMP19A61C10XBG TMP19A61CDXBG TMP19A61 TMP19A61C10XBG, TMP19A61CDXBG TMP19A61 TX19A PDF

    X7T voltage dependence

    Abstract: GRM155B31A225K GR331 GRM155R71E104K GRM188R61E475 GRM188R71C105KA12 GRM1555C1HR10BA01 GRM32ER71H106KA12 GRM0222C1A101GD05 GRM188D71
    Text: !Note • Please read rating and !CAUTION for storage, operating, rating, soldering, mounting and handling in this catalog to prevent smoking and/or burning, etc. • This catalog has only typical specifications. Therefore, please approve our product specifications or transact the approval sheet for product specifications before ordering.


    Original     		ISO14001 C02E-17 X7T voltage dependence GRM155B31A225K GR331 GRM155R71E104K GRM188R61E475 GRM188R71C105KA12 GRM1555C1HR10BA01 GRM32ER71H106KA12 GRM0222C1A101GD05 GRM188D71 PDF

    recommended layout CSG324

    Abstract: CSG324 SPARTAN 6 UG385 spartan 6 LX150 XC6SLX4 2 CSG225 I XC6SLX4 CSG225 UG385 LX150 AB p89 LX100T
    Text: Spartan-6 FPGA Packaging and Pinouts Advance [optional]Product Specification UG385 v1.0 June 24, 2009 [optional] Xilinx is disclosing this user guide, manual, release note, and/or specification (the "Documentation") to you solely for use in the development


    Original     		UG385 Docu2009 recommended layout CSG324 CSG324 SPARTAN 6 UG385 spartan 6 LX150 XC6SLX4 2 CSG225 I XC6SLX4 CSG225 UG385 LX150 AB p89 LX100T PDF

    XCV1000E

    Abstract: AH273 AF245 diode t25 4 d9 D2641 T25-4 L9 ae3219 DS0224 t2943 T25 4 F8
    Text: Virtex -E 1.8 V Field Programmable Gate Arrays R DS022-4 v2.3 November 15, 2001 Preliminary Product Specification Virtex-E Pin Definitions Pin Name Dedicated Pin Direction GCK0, GCK1, GCK2, GCK3 Yes Input Clock input pins that connect to Global Clock Buffers.


    Original     		DS022-4 FG1156 XCV3200E DS022-1, DS022-2, DS022-3, DS022-4, XCV1000E AH273 AF245 diode t25 4 d9 D2641 T25-4 L9 ae3219 DS0224 t2943 T25 4 F8 PDF

    diode T25-4

    Abstract: T25-4 L9 K363 equivalent T25-4 d92 02 ad254 AF514 A241 AF125 AN214
    Text: Virtex -E 1.8 V Field Programmable Gate Arrays R DS022-4 v2.5 March 14, 2003 Production Product Specification Virtex-E Pin Definitions Pin Name Dedicated Pin Direction GCK0, GCK1, GCK2, GCK3 Yes Input Clock input pins that connect to Global Clock Buffers.


    Original     		DS022-4 XCV300E DS022-1, DS022-2, DS022-3, DS022-4, diode T25-4 T25-4 L9 K363 equivalent T25-4 d92 02 ad254 AF514 A241 AF125 AN214 PDF

    Untitled

    Abstract: No abstract text available
    Text: Product Obsolete/Under Obsolescence R XC4000XLA Family Field Programmable Gate Arrays Package Pinouts XC4013XLA Pinout Table XC4013XLA Pinout Table Continued XC4013XLA Pinout Table PAD NAME PQ160 PQ208 PQ240 I/O – – P21 BG256 H1 PAD NAME PQ160 PQ208


    Original     		XC4000XLA XC4013XLA PQ160 PQ208 PQ240 BG256 PDF

    J29 P190

    Abstract: AG29 p115 p106 transistor be p88 XC4028XLA P142 P143 P144 P145
    Text: XC4000XLA/XV Field Programmable Gate Arrays January 28, 1999 Version 1.0 0* R XC4000XLA/XV Field Programmable Gate Arrays XC4000XLA Family Field Programmable Gate Arrays Package Pinouts XC4013XLA Pinout Table XC4013XLA Pinout Table (Continued) XC4013XLA Pinout Table


    Original     		XC4000XLA/XV XC4000XLA XC4013XLA PQ160 PQ208 PQ240 BG256 J29 P190 AG29 p115 p106 transistor be p88 XC4028XLA P142 P143 P144 P145 PDF

    ICS9112BM-17

    Abstract: asus bc458 BC148 pin configuration bc482 BC451 foxconn SC15P nds0610 bc305
    Text: Falcon2.2 CLK GEN. CY2285-2 Mobile PIII PAGE:3 PCB LAYER 00205-1 L1:COMPONENT Project code :91.44G01.001 PCB P/N = 48.41J01.001 REVISION : 1 L2:GND L3:SIGNAL CLK L4:VCC Celeron SDRAM CLK BUFFER L5:SIGNAL(CLK) verson : A2 or A3 ICS-9112-17 DIMM*2 L8:COMPONENT


    Original     		CY2285-2 44G01 41J01 ICS-9112-17 M1621 MIC2563 M1535 OZ6933 BCX27 ICS9112BM-17 asus bc458 BC148 pin configuration bc482 BC451 foxconn SC15P nds0610 bc305 PDF

    BC518

    Abstract: acer battery pinout ATI RAGE mobility m1 acer 15.6 pinout BC505 R2501a BC466 rdn27 asus BC370
    Text: CLK GEN. ICS9248-61 Acer B-NOTE CPU COPPERMINE PAGE:3 V1.5 PCB LAYER TOP L1 : SIGNAL1 L2 : SIGNAL2 L3 : GND L4 : SIGNAL3 L5 : SIGNAL4 L6 : VCC L7 : SIGNAL5 L8 : SIGNAL6 BOTTOM PAGE:4,5,6 Geyserville SDRAM CLK BUF ICS9112-17 PAGE:6 HOST BUS PAGE:3 MEM BUS DIMM*2


    Original     		ICS9248-61 ICS9112-17 440BX MAX1627 MAX1711 ES1946 BC241 BC510 BC511 BC436 BC518 acer battery pinout ATI RAGE mobility m1 acer 15.6 pinout BC505 R2501a BC466 rdn27 asus BC370 PDF

    J29 P190

    Abstract: AG29 p115 BG432 p106 p239 transistor be p88 P142 P143 P144
    Text: XC4000XLA/XV Field Programmable Gate Arrays January 28, 1999 Version 1.0 0* R XC4000XLA/XV Field Programmable Gate Arrays XC4000XLA Family Field Programmable Gate Arrays Package Pinouts XC4013XLA Pinout Table XC4013XLA Pinout Table (Continued) XC4013XLA Pinout Table


    Original     		XC4000XLA/XV XC4000XLA XC4013XLA PQ160 PQ208 J29 P190 AG29 p115 BG432 p106 p239 transistor be p88 P142 P143 P144 PDF

    AD143

    Abstract: NM2200 rz2 h24 SD335 RZ2 G6 AD133 RZ2 G24 BT 2323 M ic pin configuration AD313 AD303
    Text: A B C D E SHEET INDEX PENTIUM II MOBILE MODULE VREG Sheet 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 TAG 4 L2 CACHE CPU 443BX NORTH BRIDGE Sheet Name Description ARCHITECTURE BLOCK DIAGRAM MMC-2 CONNECTOR CPU, DRAM I/F MMC-2 CONNECTOR (PCI/AGP I/F)


    Original     		NM2200/NMG5) 2N7002 NC7SZ08 576MHZ FA-368 RNX13, RNX14, BC276 BC274 AD143 NM2200 rz2 h24 SD335 RZ2 G6 AD133 RZ2 G24 BT 2323 M ic pin configuration AD313 AD303 PDF

    J29 P190

    Abstract: L-29 p302 transistor p98 p115 p106 P191 transistor be p88 P142 P143
    Text: XC4000XLA/XV Field Programmable Gate Arrays January 28, 1999 Version 1.0 0* R XC4000XLA/XV Field Programmable Gate Arrays XC4000XLA Family Field Programmable Gate Arrays Package Pinouts XC4013XLA Pinout Table XC4013XLA Pinout Table (Continued) XC4013XLA Pinout Table


    Original     		XC4000XLA/XV XC4000XLA XC4013XLA PQ160 PQ208 PQ240 BG256 J29 P190 L-29 p302 transistor p98 p115 p106 P191 transistor be p88 P142 P143 PDF

    j29 p190

    Abstract: AK29 BG35 n4 p69 XC4020XLA
    Text: XC4000XLA/XV Field Programmable Gate Arrays January 28, 1999 Version 1.0 0* R XC4000XLA/XV Field Programmable Gate Arrays XC4000XLA Family Field Programmable Gate Arrays Package Pinouts XC4013XLA Pinout Table XC4013XLA Pinout Table (Continued) XC4013XLA Pinout Table


    Original     		XC4000XLA/XV XC4000XLA XC4013XLA PQ160 XC4085XLA HQ160 HQ208 j29 p190 AK29 BG35 n4 p69 XC4020XLA PDF