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    P-DUKE SDS02-24S3P3WH

    DC/DC Converter - 9 to 36VDC Input - 3.3VDC Single Output - 4:1 Input Range - 500mA Output - 76% Efficiency - 2W - 2200µF - 3000VDC Isolation - SMD.
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    Master Electronics SDS02-24S3P3WH
    • 1 $26
    • 10 $23.2
    • 100 $17.66
    • 1000 $15.28
    • 10000 $15.28
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    P-DUKE SDS02-24S24W

    DC DC Converter 24V 2W
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    Master Electronics SDS02-24S24W
    • 1 $20.79
    • 10 $18.55
    • 100 $14.15
    • 1000 $13.57
    • 10000 $13.57
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    P-DUKE SDS02-24S05WH

    DC/DC Converter - 9 to 36VDC Input - 5VDC Single Output - 4:1 Input Range - 400mA Output - 79% Efficiency - 2W - 1000µF - 3000VDC Isolation - SMD.
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    Master Electronics SDS02-24S05WH
    • 1 $24.98
    • 10 $22.29
    • 100 $16.97
    • 1000 $16.27
    • 10000 $16.27
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    DS0224 Datasheets Context Search

    Catalog Datasheet MFG & Type Document Tags PDF

    SR52 W 18

    Abstract: GR-253-CORE GR-499-CORE PR11 T7690 T7698 uig823
    Text: a e re 8 AdLib OCR Evaluation systems Data Sheet September 2002 T7698 Quad T1/E1 Line Interface and Octal T1/E1 Monitor Features . Integrated quad T1/E1 line interface and octal T1/ El receive frame monitor with HDLC processor provides system QoS capabilities .


    Original     		T7698 CB119 TR-54016 GR-499-CORE GR-253-CORE DS02-241 SR52 W 18 GR-253-CORE GR-499-CORE PR11 T7690 uig823 PDF

    sis 968

    Abstract: vhdl code for complex multiplication and addition 200E 300E 400E 600E PCI33 3 bit right left shift register verilog vHDL prog
    Text: Virtex -E 1.8 V Field Programmable Gate Arrays R DS022-2 v2.3 November 9, 2001 Preliminary Product Specification Architectural Description Virtex-E Array The Virtex-E user-programmable gate array, shown in Figure 1, comprises two major configurable elements: configurable logic blocks (CLBs) and input/output blocks (IOBs).


    Original     		DS022-2 XCV2600E XCV3200E DS022-1, DS022-2, DS022-3, DS022-4, sis 968 vhdl code for complex multiplication and addition 200E 300E 400E 600E PCI33 3 bit right left shift register verilog vHDL prog PDF

    diode T25-4

    Abstract: IC AN214 N345 pioneer amplifier an214 XCV1600E ac3 amplifier circuit diagram AN214 amplifier horizontal driver transistor D155 K235 XCV300E-6PQ240C
    Text: Virtex -E 1.8 V Field Programmable Gate Arrays R DS022-1 v2.2 November 9, 2001 Preliminary Product Specification Features • • • • • Fast, High-Density 1.8 V FPGA Family - Densities from 58 k to 4 M system gates - 130 MHz internal performance (four LUT levels)


    Original     		DS022-1 32/64-bit, 66-MHz FG1156 XCV3200E DS022-1, DS022-2, DS022-4 DS022-3, diode T25-4 IC AN214 N345 pioneer amplifier an214 XCV1600E ac3 amplifier circuit diagram AN214 amplifier horizontal driver transistor D155 K235 XCV300E-6PQ240C PDF

    Field Programmable Gate Arrays

    Abstract: DS022-1 XCV1000E XCV100E MB 300E FPGA Virtex 6 pin configuration XCV1600E XCV2000E XCV200E XCV300E
    Text: Virtex -E 1.8 V Field Programmable Gate Arrays R DS022-1 v2.3 July 17, 2002 Production Product Specification Features • • • • • Fast, High-Density 1.8 V FPGA Family - Densities from 58 k to 4 M system gates - 130 MHz internal performance (four LUT levels)


    Original     		DS022-1 32/64-bit, 66-MHz DS022-1, DS022-2, DS022-3, DS022-4, Field Programmable Gate Arrays DS022-1 XCV1000E XCV100E MB 300E FPGA Virtex 6 pin configuration XCV1600E XCV2000E XCV200E XCV300E PDF

    GSR 10,8

    Abstract: DLL5 BG432 ic 404 BB112 equivalent
    Text: Virtex -E 1.8 V Field Programmable Gate Arrays R DS022-1 v2.0 April 2, 2001 Preliminary Product Specification Features • • • • • Fast, High-Density 1.8 V FPGA Family - Densities from 58 Kb to 4 Mb system gates - 130 MHz internal performance (four LUT levels)


    Original     		DS022-1 32/64-bit, 66-MHz DS022-1, DS022-3, DS022-2, DS022-4, DS022-4 GSR 10,8 DLL5 BG432 ic 404 BB112 equivalent PDF

    XCV100E

    Abstract: XCV200E XCV1600E
    Text: Virtex -E 1.8 V Field Programmable Gate Arrays R DS022-3 v2.9 September 10, 2002 Production Product Specification Virtex-E Electrical Characteristics Definition of Terms Electrical and switching characteristics are specified on a per-speed-grade basis and can be designated as Advance,


    Original     		DS022-3 DS022-1, DS022-3, DS022-2, DS022-4, XCV100E XCV200E XCV1600E PDF

    AF125

    Abstract: n345 pioneer amplifier an214 diode t25 4 d9 DIODE T25-4 AY102 AF155 AN214 amplifier horizontal driver transistor D155 IC AN214
    Text: Virtex -E 1.8 V Field Programmable Gate Arrays R DS022-1 v2.3 July 17, 2002 Production Product Specification Features • • • • • Fast, High-Density 1.8 V FPGA Family - Densities from 58 k to 4 M system gates - 130 MHz internal performance (four LUT levels)


    Original     		DS022-1 32/64-bit, 66-MHz XCV1000E, 1600E, 2000E" DS022-1, DS022-2, DS022-4 DS022-3, AF125 n345 pioneer amplifier an214 diode t25 4 d9 DIODE T25-4 AY102 AF155 AN214 amplifier horizontal driver transistor D155 IC AN214 PDF

    XCV200E

    Abstract: XCV2000E XCV600E XCV100E XCV1600E XCV400E XCV1000E XCV2600E XCV300E XCV50E
    Text: Virtex -E 1.8 V Field Programmable Gate Arrays R DS022-3 v2.6 November 9, 2001 Preliminary Product Specification Virtex-E Electrical Characteristics Definition of Terms Electrical and switching characteristics are specified on a per-speed-grade basis and can be designated as Advance,


    Original     		DS022-3 XCV2600E XCV3200E DS022-1, DS022-2, DS022-3, DS022-4, XCV200E XCV2000E XCV600E XCV100E XCV1600E XCV400E XCV1000E XCV300E XCV50E PDF

    XCV1000E

    Abstract: AH273 AF245 diode t25 4 d9 D2641 T25-4 L9 ae3219 DS0224 t2943 T25 4 F8
    Text: Virtex -E 1.8 V Field Programmable Gate Arrays R DS022-4 v2.3 November 15, 2001 Preliminary Product Specification Virtex-E Pin Definitions Pin Name Dedicated Pin Direction GCK0, GCK1, GCK2, GCK3 Yes Input Clock input pins that connect to Global Clock Buffers.


    Original     		DS022-4 FG1156 XCV3200E DS022-1, DS022-2, DS022-3, DS022-4, XCV1000E AH273 AF245 diode t25 4 d9 D2641 T25-4 L9 ae3219 DS0224 t2943 T25 4 F8 PDF

    48-pin TSOP (I) flash memory

    Abstract: am29lv Am29LV320D application mpm h1 a20 g6 amd CS144 XCV50E AMD 2m flash memory FPGA Virtex 6 pin configuration XC17V00
    Text: ds088_1_1.fm Page 1 Wednesday, June 19, 2002 5:31 PM R DS088 v1.2 June 7, 2002 System ACE SC Solution Advance Product Specification Summary • • • • • • • System-level, high-capacity, pre-configured solution for Virtex Series FPGAs, Virtex-II Series Platform


    Original     		DS088 XCV50E-6CS144 Am29LV160D XCCACEM16-CS144-AM Am29LV320D XCCACEM32-CS144-AM Am29LV641D XCCACEM64-CS144-AM 48-pin TSOP (I) flash memory am29lv Am29LV320D application mpm h1 a20 g6 amd CS144 XCV50E AMD 2m flash memory FPGA Virtex 6 pin configuration XC17V00 PDF

    f 4556

    Abstract: GR-253-CORE GR-499-CORE T7690 T7698 SR52 W 18
    Text: Data Sheet September 2002 T7698 Quad T1/E1 Line Interface and Octal T1/E1 Monitor Features • Integrated quad T1/E1 line interface and octal T1/ E1 receive frame monitor with HDLC processor provides system QoS capabilities. ■ ■ ■ ■ Hardware and software reset options.


    Original     		T7698 CB119 TR-54016 TR-TSY-000170 TR-TSY-000009 GR-499-CORE GR-253-CORE DS02-241BBAC-1 DS02-241BBAC) f 4556 GR-253-CORE GR-499-CORE T7690 SR52 W 18 PDF

    tf2d

    Abstract: GR-253-CORE REF10 TMPR28051 TMUX03155
    Text: Preliminary Data Sheet May 2002 TMUX03155 STS-3/STM-1 AU-4 Multiplexer/Demultiplexer Features • Multiplexes three STS-1 signals into a SONET STS-3 signal. ■ Multiplexes three AU-3 signals into an SDH STM-1 (AU-4) signal via a TUG-3 construction. ■


    Original     		TMUX03155 S32/F, DS02-246BBAC DS01-194PDH) tf2d GR-253-CORE REF10 TMPR28051 PDF

    GR-253

    Abstract: TRCV0110G TRCV0110G-3-XE APD-SBSC-101
    Text: Data Sheet June 7, 2002 TRCV0110G 10 Gbits/s Limiting Amplifier Clock Recovery, 1:16 Data Demultiplexer Features • ■ ■ Integrated limiting amplifier with 7.5 mV sensitivity at 1e-10 bit error rate BER Integrated clock recovery and 1:16 data demultiplexer (deMUX)


    Original     		TRCV0110G 1e-10 OC-192/STM-64 177-Ball DS02-247HSPL DS02-061HSPL) GR-253 TRCV0110G-3-XE APD-SBSC-101 PDF

    AN214 amplifier

    Abstract: pioneer amplifier an214 transistor ad161 AD161 k2642 DIODE T25-4 horizontal driver transistor D155 intel G31 circuit diagram k363 n345
    Text: Virtex -E 1.8 V Field Programmable Gate Arrays R DS022-1 v2.3 July 17, 2002 Production Product Specification Features • • • • • Fast, High-Density 1.8 V FPGA Family - Densities from 58 k to 4 M system gates - 130 MHz internal performance (four LUT levels)


    Original     		DS022-1 32/64-bit, 66-MHz XCV300E DS022-1, DS022-2, DS022-4 DS022-3, DS022-4, AN214 amplifier pioneer amplifier an214 transistor ad161 AD161 k2642 DIODE T25-4 horizontal driver transistor D155 intel G31 circuit diagram k363 n345 PDF

    2795C

    Abstract: Digital Alarm Clock by ttl dis 5261 b f 4556 GR-253-CORE GR-499-CORE T7690 T7698 lucent dacs ii
    Text: Data Sheet May 2002 T7698 Quad T1/E1 Line Interface and Octal T1/E1 Monitor Features • ■ ■ ■ ■ ■ ■ Integrated quad T1/E1 line interface and octal T1/ E1 receive frame monitor with HDLC processor provides system QoS capabilities. Hardware and software reset options.


    Original     		T7698 CB119 TR-54016 TR-TSY-000170 TR-TSY-000009 GR-499-CORE GR-253-CORE DS02-241BBAC DS98-297T1E1) 2795C Digital Alarm Clock by ttl dis 5261 b f 4556 GR-253-CORE GR-499-CORE T7690 lucent dacs ii PDF

    XCV100E

    Abstract: XCV1600E
    Text: Virtex -E 1.8 V Field Programmable Gate Arrays R DS022-3 v2.8 July 17, 2002 Production Product Specification Virtex-E Electrical Characteristics Definition of Terms Electrical and switching characteristics are specified on a per-speed-grade basis and can be designated as Advance,


    Original     		DS022-3 MIL-M-38510/605 xapp158 DS022-1, DS022-3, DS022-2, DS022-4, XCV100E XCV1600E PDF

    AMD 2m flash memory

    Abstract: XCV50E CS144 SelectMAP 48-pin TSOP (I) flash memory am29lv FPGA Virtex 6 pin configuration uAM29LV160DT AM29LV320DB90 AM29LV320DT90
    Text: ds088_05.fm Page 1 Monday, September 24, 2001 3:35 PM R DS088 v1.0 September 25, 2001 System ACE SC Solution Advance Product Specification Summary of Features • • • • • • • System-level, high-capacity, pre-configured solution for Virtex and Spartan® FPGAs


    Original     		DS088 interfac13 XC17V01 XCV50E-6CS144 Am29LV160D XCCACEM16-CS144-AM Am29LV320D XCCACEM32-CS144-AM AMD 2m flash memory XCV50E CS144 SelectMAP 48-pin TSOP (I) flash memory am29lv FPGA Virtex 6 pin configuration uAM29LV160DT AM29LV320DB90 AM29LV320DT90 PDF

    EC60825-1

    Abstract: EC60825 TD1611 STM-16 TD16L1 agilent receiver OC-48 1EC60825-1 transmitter agilent oc 192 agere 840 demultiplexer outline
    Text: a8e re AdLib OCR Evaluation systems Advance Data Sheet May 2002 TD16-Type 2.5 Gbits/s Transponder with 16-Channel 155 Mbits/s Multiplexer/Demultiplexer Description The TD16-type transponder performs straightforward, bit-level parallel-to-serial converting in the


    Original     		TD16-Type 16-Channel 16-bit, DS02-249TPDR DS01-240PTO) EC60825-1 EC60825 TD1611 STM-16 TD16L1 agilent receiver OC-48 1EC60825-1 transmitter agilent oc 192 agere 840 demultiplexer outline PDF

    RBS 2202

    Abstract: 2202 bts diode S4 68a T7630 SA5-27 TND 027 YM SA4-13 f 4556 PR70 Lucent SLC 2000
    Text: Preliminary Data Sheet May 2002 T7630 Dual T1/E1 5.0 V Short-Haul Terminator Terminator-II Features • The T7630 Dual T1/E1 Terminator consists of two independent, highly integrated, software-configurable, full-featured short-haul transceiver/framers. The T7630 provides glueless interconnection from a


    Original     		T7630 DS02-243BBAC DS00-191TIC) RBS 2202 2202 bts diode S4 68a SA5-27 TND 027 YM SA4-13 f 4556 PR70 Lucent SLC 2000 PDF

    TT 2222 Horizontal Output Transistor pins out

    Abstract: transistor tt 2222 TT 2222 Horizontal Output voltage TT 2222 tt 2222 Datasheet DS022-2 sis 968 verilog code for lvds driver vhdl code for complex multiplication and addition 200E
    Text: Virtex -E 1.8 V Field Programmable Gate Arrays R DS022-2 v2.6.1 June 15, 2004 Production Product Specification Architectural Description Virtex-E Array The Virtex-E user-programmable gate array, shown in Figure 1, comprises two major configurable elements: configurable logic blocks (CLBs) and input/output blocks (IOBs).


    Original     		DS022-2 routing5/04 DS022-1, DS022-2, DS022-3, DS022-4, TT 2222 Horizontal Output Transistor pins out transistor tt 2222 TT 2222 Horizontal Output voltage TT 2222 tt 2222 Datasheet DS022-2 sis 968 verilog code for lvds driver vhdl code for complex multiplication and addition 200E PDF

    Interfacing and Matrix Keyboard 8085

    Abstract: basics of 8085 microprocessor AM188 i7 motherboard csc 2314 3x4 keyboard Am486 keyboard matrix 18*8 traffic light controls using 8085 MA12
    Text: ÉlanSC400 and ÉlanSC410 Microcontrollers User’s Manual 1997 Advanced Micro Devices, Inc. All rights reserved. Advanced Micro Devices, Inc. “AMD” reserves the right to make changes in its products without notice in order to improve design or performance


    Original     		lanTMSC400 lanSC410 IOIS16 Interfacing and Matrix Keyboard 8085 basics of 8085 microprocessor AM188 i7 motherboard csc 2314 3x4 keyboard Am486 keyboard matrix 18*8 traffic light controls using 8085 MA12 PDF

    RBS 2202

    Abstract: f 4556 THS24 PR21 T7630 T7633 SA517 805 T42 RFDC
    Text: Device Advisory September 1999 T7633 Device Advisory for Version 1.0 of the Device Introduction This advisory applies to the T7633 Dual T1/E1 3.3 V Short-Haul Terminator as described in the May 1998 T7633 Dual T1/E1 3.3 V Short-Haul Terminator Advance Data Sheet DS98-244TIC .


    Original     		T7633 DS98-244TIC) A8--A11, A0--A11) DS02-244BBAC RBS 2202 f 4556 THS24 PR21 T7630 SA517 805 T42 RFDC PDF

    sis 968

    Abstract: 200E 300E 400E 600E LVCMOS25 PCI33
    Text: Virtex -E 1.8 V Field Programmable Gate Arrays R DS022-2 v2.8 January 16, 2006 Production Product Specification Architectural Description Virtex-E Array The Virtex-E user-programmable gate array, shown in Figure 1, comprises two major configurable elements: configurable logic blocks (CLBs) and input/output blocks (IOBs).


    Original     		DS022-2 DS022-1, DS022-2, DS022-3, DS022-4, sis 968 200E 300E 400E 600E LVCMOS25 PCI33 PDF

    Untitled

    Abstract: No abstract text available
    Text: Virtex -E 1.8 V Field Programmable Gate Arrays R DS022-2 v2.5 September 10, 2002 Production Product Specification Architectural Description Virtex-E Array The Virtex-E user-programmable gate array, shown in Figure 1, comprises two major configurable elements: configurable logic blocks (CLBs) and input/output blocks (IOBs).


    Original     		DS022-2 DS022-1, DS022-3, DS022-2, DS022-4, PDF