Virtex-II
Abstract: XAPP623 XC2V6000-ff1152 LVPECL25 XC2V80 XC2V6000 XC2V1000 XC2V1500 XC2V2000 XC2V250
Text: 38 Virtex -II Platform FPGAs: DC and Switching Characteristics R DS031-3 v3.1 October 14, 2003 Product Specification Virtex-II Electrical Characteristics Virtex-II devices are provided in -6, -5, and -4 speed grades, with -6 having the highest performance.
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DS031-3
Virtex-II
XAPP623
XC2V6000-ff1152
LVPECL25
XC2V80
XC2V6000
XC2V1000
XC2V1500
XC2V2000
XC2V250
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XC2V6000-ff1152
Abstract: XC2V80
Text: Virtex -II Platform FPGAs: DC and Switching Characteristics R DS031-3 v2.5 May 7, 2003 Advance Product Specification Virtex-II Electrical Characteristics Virtex-II devices are provided in –4, –5, and –6 speed grades, with –6 having the highest performance.
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DS031-3
XC2V6000-ff1152
XC2V80
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XC2V6000-ff1152
Abstract: XC2V80 XC2V1000
Text: Virtex -II Platform FPGAs: DC and Switching Characteristics R DS031-3 v2.4 December 6, 2002 Advance Product Specification Virtex-II Electrical Characteristics Virtex-II devices are provided in –4, –5, and –6 speed grades, with –6 having the highest performance.
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DS031-3
XC2V6000-ff1152
XC2V80
XC2V1000
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XC2V1500
Abstract: XC2V80 XC2V1000 XC2V2000 XC2V250 XC2V40 XC2V500 lightning event counter AF124 XC2V4000
Text: Virtex -II Platform FPGAs: Introduction and Overview R DS031-1 v1.9 September 26, 2002 Advance Product Specification Summary of Virtex-II Features • Industry First Platform FPGA Solution • IP-Immersion Architecture - Densities from 40K to 8M system gates
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DS031-1
18-bit
18-bit
BG728
DS031-4
XC2V1500
XC2V80
XC2V1000
XC2V2000
XC2V250
XC2V40
XC2V500
lightning event counter
AF124
XC2V4000
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BG728
Abstract: CS144 FG256 FG676 xc2v1000 AE38 65B11 AF124 J377 Model 435 load cell
Text: Virtex -II Platform FPGAs: Complete Data Sheet R DS031 October 14, 2003 Product Specification This document includes all four modules of the Virtex-II Platform FPGA data sheet. Module 1: Introduction and Overview Module 3: DC and Switching Characteristics
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DS031
DS031-1
DS031-3
DS031-2
CS144)
FG256)
BG728)
FF1152)
BF957)
DS031-4
BG728
CS144
FG256
FG676
xc2v1000
AE38
65B11
AF124
J377
Model 435 load cell
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xc2v1000
Abstract: XC2V6000-ff1152 XC2V80
Text: 42 Virtex-II Platform FPGAs: DC and Switching Characteristics R DS031-3 v3.2 March 29, 2004 Product Specification Virtex-II Electrical Characteristics Virtex-II devices are provided in -6, -5, and -4 speed grades, with -6 having the highest performance.
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DS031-3
xc2v1000
XC2V6000-ff1152
XC2V80
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XC2V1000
Abstract: XC2V1000 complete datasheet FF1152 DS031-4 v3.4 AF124 XC2V3000
Text: 1 Virtex-II Platform FPGAs: Complete Data Sheet R DS031 v3.4 March 1, 2005 Product Specification Module 1: Introduction and Overview Module 3: DC and Switching Characteristics 7 pages 43 pages • • • • • • • • • • • • Summary of Features
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DS031
18-Kb
18-Bit
DS031-4
XC2V1000
XC2V1000 complete datasheet
FF1152
DS031-4 v3.4
AF124
XC2V3000
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XC2V1500
Abstract: FG256 FG676 BG728 CS144 AL205 LVDCI25 661129 j337 wireless encrypt
Text: Virtex-II Platform FPGAs: Complete Data Sheet R DS031 March 29, 2004 Product Specification This document includes all four modules of the Virtex-II Platform FPGA data sheet. Module 1: Introduction and Overview Module 3: DC and Switching Characteristics
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DS031
DS031-1
DS031-3
DS031-2
FF1152)
BF957)
DS031-4
XC2V1500
FG256
FG676
BG728
CS144
AL205
LVDCI25
661129
j337
wireless encrypt
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digital FIR Filter verilog code
Abstract: XC2V6000 XC2V1000 XC2V1500 XC2V2000 XC2V250 XC2V40 XC2V500 XC2V80 K217
Text: Virtex -II Platform FPGAs: Introduction and Overview R DS031-1 v1.9 September 26, 2002 Advance Product Specification Summary of Virtex-II Features • Industry First Platform FPGA Solution • IP-Immersion Architecture - Densities from 40K to 8M system gates
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DS031-1
18-bit
DS031-4
digital FIR Filter verilog code
XC2V6000
XC2V1000
XC2V1500
XC2V2000
XC2V250
XC2V40
XC2V500
XC2V80
K217
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fgg 484
Abstract: FGG676 MAKING A10 BGA R 2.8 no pinout 4 testbench verilog ram 16 x 4 vhdl code for carry select adder using ROM XC2V3000 abe 442 AM3 Processor Functional Data Sheet circuit for conventional inverter for the BGG system
Text: 1 Virtex-II Platform FPGAs: Complete Data Sheet R DS031 v3.3 June 24, 2004 Product Specification Module 1: Introduction and Overview Module 3: DC and Switching Characteristics DS031-1 (v3.3) June 24, 2004 7 pages DS031-3 (v3.3) June 24, 2004 42 pages •
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DS031
DS031-1
DS031-3
DS031-2
18-Kb
18-Bit
DS031-4
fgg 484
FGG676
MAKING A10 BGA
R 2.8 no pinout 4
testbench verilog ram 16 x 4
vhdl code for carry select adder using ROM
XC2V3000
abe 442
AM3 Processor Functional Data Sheet
circuit for conventional inverter for the BGG system
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BLVDS-25
Abstract: LVDSEXT-25 4564 RAM XC2VP70 FF1704 pinout XC2V1000 Pin-out XC2V1500 XC2V2000 XC2V3000 XC2V6000 XC2V8000
Text: Xilinx Virtex-II Series FPGAs and RocketPHY Physical Layer Transceivers Transceiver Blocks 992 88 120 200 264 432 528 624 720 912 1104 1108 Chip Scale Packages CS – wire-bond chip-scale BGA (0.8 mm ball spacing) 144 8 88 92 FF896 92 8 FF1152 BGA Packages (BG) – wire-bond standard BGA (1.27 mm ball spacing)
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FF896
FF1152
FF11486
10Gbps
BLVDS-25
LVDSEXT-25
4564 RAM
XC2VP70 FF1704 pinout
XC2V1000 Pin-out
XC2V1500
XC2V2000
XC2V3000
XC2V6000
XC2V8000
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XC2V1000 Pin-out
Abstract: Virtex-II MAKING A10 BGA matrix m21 IEEE1532 XC2V1000 XC2V1500 XC2V250 XC2V40 XC2V500
Text: Virtex-II 1.5V Field-Programmable Gate Arrays R DS031-1 v1.7 October 2, 2001 Advance Product Specification Summary of Virtex -II Features • Industry First Platform FPGA Solution • IP-Immersion Architecture - Densities from 40K to 8M system gates
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DS031-1
18-Kbit
18-bige.
XC2V1500
FG676
FF1152,
FF1517,
BF957
DS031-3,
DS031-1,
XC2V1000 Pin-out
Virtex-II
MAKING A10 BGA
matrix m21
IEEE1532
XC2V1000
XC2V250
XC2V40
XC2V500
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6 tap FIR Filter
Abstract: xc2*1000 xc2v1000 matrix m21 BG728 CS144 FG256 FG676 AF124 XC2V1500
Text: Virtex -II Platform FPGAs: Complete Data Sheet R DS031 August 1, 2003 Product Specification This document includes all four modules of the Virtex-II Platform FPGA data sheet. Module 1: Introduction and Overview Module 3: DC and Switching Characteristics
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DS031
DS031-1
DS031-3
DS031-2
CS144)
FG256)
BG728)
FF1152)
BF957)
DS031-4
6 tap FIR Filter
xc2*1000
xc2v1000
matrix m21
BG728
CS144
FG256
FG676
AF124
XC2V1500
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FGG676
Abstract: H327 circuit for conventional inverter for the BGG system fgg 484 matrix m21 FF1152 FGG256 wireless encrypt AG244 XC2V3000
Text: 1 Virtex-II Platform FPGAs: Complete Data Sheet R DS031 v3.5 November 5, 2007 Product Specification Module 1: Introduction and Overview Module 3: DC and Switching Characteristics 7 pages 43 pages • • • • • • • • • • • • Summary of Features
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DS031
18-Kb
18-Bit
DS031-4
FGG676
H327
circuit for conventional inverter for the BGG system
fgg 484
matrix m21
FF1152
FGG256
wireless encrypt
AG244
XC2V3000
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XC2V80
Abstract: XC2V1500 XC2V2000 XC2V250 XC2V40 XC2V500 XC2V1000 CLK27 AF124 XC2V4000
Text: Virtex -II Platform FPGAs: Introduction and Overview R DS031-1 v1.9 September 26, 2002 Advance Product Specification Summary of Virtex-II Features • Industry First Platform FPGA Solution • IP-Immersion Architecture - Densities from 40K to 8M system gates
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DS031-1
18-bit
CS144)
FG256)
BG728)
FF1152)
BF957)
DS031-4
XC2V80
XC2V1500
XC2V2000
XC2V250
XC2V40
XC2V500
XC2V1000
CLK27
AF124
XC2V4000
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XC2V1000
Abstract: XC2V3000 SEU DS031-2 xilinx XC2V3000 READBACK AF124 XC2V8000 XC2V80 XC2V1500 XC2V2000 XC2V3000
Text: Virtex-II 1.5V Field-Programmable Gate Arrays R DS031-1 v1.8 July 16, 2002 Advance Product Specification Summary of VirtexTM-II Features - • Industry First Platform FPGA Solution • IP-Immersion Architecture - Densities from 40K to 8M system gates - 420 MHz internal clock speed (Advance Data)
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DS031-1
18-bit
XC2V1500
FG676
FF1152,
FF1517,
BF957
DS031-3,
DS031-1,
XC2V1000
XC2V3000 SEU
DS031-2 xilinx
XC2V3000 READBACK
AF124
XC2V8000
XC2V80
XC2V2000
XC2V3000
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XC2V1500
Abstract: XC2V3000 READBACK wireless encrypt XC2V80 IO-L93N XC2V3000 XC2V4000 XC2V6000
Text: Virtex-II 1.5V Field-Programmable Gate Arrays R DS031-1 v1.9 September 26, 2002 Advance Product Specification Summary of VirtexTM-II Features • Industry First Platform FPGA Solution • IP-Immersion Architecture - Densities from 40K to 8M system gates
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DS031-1
18-bit
BG728
DS031-1,
DS031-3,
DS031-2,
DS031-4,
DS031-4
XC2V1500
XC2V3000 READBACK
wireless encrypt
XC2V80
IO-L93N
XC2V3000
XC2V4000
XC2V6000
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LVDCI33
Abstract: IEEE1532 XC2V1000 XC2V1500 XC2V250 XC2V40 XC2V500 XC2V80 Software in VHDL AF124
Text: Virtex-II 1.5V Field-Programmable Gate Arrays R DS031-1 v1.7 October 2, 2001 Advance Product Specification Summary of Virtex -II Features • Industry First Platform FPGA Solution • IP-Immersion Architecture - Densities from 40K to 8M system gates
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DS031-1
18-Kbit
18-bit
XC2V1500
FG676
DS031-3,
DS031-4,
DS031-1,
DS031-2,
LVDCI33
IEEE1532
XC2V1000
XC2V250
XC2V40
XC2V500
XC2V80
Software in VHDL
AF124
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Untitled
Abstract: No abstract text available
Text: Virtex-II 1.5V Field-Programmable Gate Arrays R DS031-3 v1.5 April 23, 2001 Advance Product Specification Virtex -II Electrical Characteristics Virtex-II devices are provided in -4, -5, and -6 speed grades, with -6 having the highest performance. commercial device). However, only selected speed grades
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DS031-3
XC2V1500
FG676
DS031-3,
DS031-4,
DS031-1,
DS031-2,
DS031-4
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IO-L93N
Abstract: XC2V2000 XC2V10000
Text: Virtex-II 1.5V Field-Programmable Gate Arrays R DS031-1 v1.3 January 25, 2001 Advance Product Specification Summary of Virtex -II Features • • • • • • • • Industry First Platform FPGA Solution IP-Immersion Architecture - Densities from 40K to 10M system gates
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DS031-1
18-Kbit
CS144
FG256
DS031-1,
DS031-2,
DS031-3,
DS031-4,
IO-L93N
XC2V2000
XC2V10000
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wireless encrypt
Abstract: XC2V8000 IO-L93N XC2V2000
Text: Virtex-II 1.5V Field-Programmable Gate Arrays R DS031-1 v1.7 October 2, 2001 Advance Product Specification Summary of Virtex -II Features • Industry First Platform FPGA Solution • IP-Immersion Architecture - Densities from 40K to 8M system gates
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DS031-1
18-Kbit
18-bit
FG676
FF1152,
FF1517,
BF957
DS031-1,
DS031-3,
wireless encrypt
XC2V8000
IO-L93N
XC2V2000
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XC2V2000
Abstract: XC2V10000
Text: Virtex-II 1.5V Field-Programmable Gate Arrays R DS031-1 v1.5 April 2, 2001 Advance Product Specification Summary of Virtex -II Features • • • • • • • • Industry First Platform FPGA Solution IP-Immersion Architecture - Densities from 40K to 10M system gates
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DS031-1
18-Kbit
XC2V1500
FG676
DS031-1,
DS031-3,
DS031-2,
DS031-4,
DS031-4
XC2V2000
XC2V10000
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LVDSEXT-25
Abstract: BLVDS-25 LVDSEXT25 bga 896 BGA 31 x 31 mm XC2V80 XC2V8000 XC2V40 XC2V250 XC2V500
Text: XILINX VIRTEX FPGAs http://www.xilinx.com/products/platform/ Pins Body Size I/O’s 204 348 396 564 852 88 120 200 264 432 528 624 720 912 1104 1296 XCV812E XCV405E XCV3200E XCV2600E XCV2000E V-EM 1.8V XCV1600E XCV1000E XCV600E XCV400E XCV300E XCV200E XCV100E
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XC2V250
XC2V500
XC2VP20
XC2VP50
XC2V40
XC2V80
XC2V1000
XC2V1500
XC2V2000
XC2V3000
LVDSEXT-25
BLVDS-25
LVDSEXT25
bga 896
BGA 31 x 31 mm
XC2V8000
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bga 1296
Abstract: XC2V80 LVDSEXT25 BLVDS-25 LVDSEXT-25
Text: XILINX FPGA PACKAGE OPTIONS AND USER I/O Pins Body Size I/O’s 88 120 200 264 432 528 624 720 912 1104 1296 176 176 284 316 404 512 660 724 804 804 804 404 556 XC2S200 XC2S150 XC2S100 XC2S50 XC2S30 Spartan-II 2.5V XC2S15 XC2S300E XC2S200E XC2S150E XC2S100E
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XC2V1000
XC2V1500
XC2V2000
XC2V3000
XC2V4000
XC2V6000
XC2V8000
XC2V250
XC2V500
XCV100E
bga 1296
XC2V80
LVDSEXT25
BLVDS-25
LVDSEXT-25
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