VGCS Search Results

hall marking code A04

Abstract: INTELDX4 write-through YSS 928
Contextual Info: INTEL486 PROCESSOR FAMILY • lntelDX4TM P ro c e s s o r — Up to 100-MHz Operation -Speed-M ultiplying Technology — 32-Bit Architecture — 16K-Byte On-Chip Cache — Integrated Floating-Point Unit — 3.3V Core Operation with 5V Tolerant I/O Buffers

TPS51601

Contextual Info: TPS51650, TPS59650 SLUSAV7 – JANUARY 2012 www.ti.com Dual-Channel 3-Phase CPU/2-Phase GPU SVID, D-CAP+ Step-Down Controller for IMVP-7 VCORE with Two Integrated Drivers FEATURES APPLICATIONS • • • • 1 2 • • • • • • • • • •

MAX2009

Abstract: predistorter DCS1800 MAX2009ETI-T MAX2010 PCS1900 BD160
Contextual Info: 19-2929; Rev 0; 8/03 1200MHz to 2500MHz Adjustable RF Predistorter The MAX2009 comes in a 28-pin thin QFN exposed pad EP package (5mm x 5mm) and is specified for the extended (-40°C to +85°C) temperature range. Features ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦

MAX2009

Abstract: MAX2010 MAX2010ETI-T MO220 SMV1232-079
Contextual Info: 19-2930; Rev 0; 8/03 500MHz to 1100MHz Adjustable RF Predistorter The MAX2010 comes in a 28-pin thin QFN exposed pad EP package (5mm x 5mm) and is specified for the extended (-40°C to +85°C) temperature range. Features ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦

PS3 GPU

Abstract: dd 55 n 14 powerblock TPS51601A
Contextual Info: TPS51640A, TPS59640, TPS59641 SLUSAQ2 – JANUARY 2012 www.ti.com Dual-Channel 3-Phase CPU/1-Phase GPU SVID, D-CAP+ Step-Down Controller for IMVP-7 VCORE with Two Integrated Drivers FEATURES 1 • • • • • 2 • • • • • • • • •

TPS51601A

Contextual Info: TPS51640A, TPS59640, TPS59641 SLUSAQ2 – JANUARY 2012 www.ti.com Dual-Channel 3-Phase CPU/1-Phase GPU SVID, D-CAP+ Step-Down Controller for IMVP-7 VCORE with Two Integrated Drivers FEATURES 1 • • • • • 2 • • • • • • • • •

fopf

Abstract: ob35l0s a 3116 HYB3116160BSJ-50 HYB3116160BSJ-60 HYB3116160BSJ-70 HYB3118160BSJ-50 HYB3118160BSJ-60 HYB3118160BSJ-70 71ST5
Contextual Info: S IE M E N S 1M X 16-Bit Dynamic RAM 1 k & 4k-Refresh HYB 3116160BSJ-50/-60/-70 HYB 3118160BSJ-50/-60/-70 Advanced Inform ation Output unlatched at cycle end allows tw o ­ dim ensional chip selection Read, write, read-m odify-write, CAS-before-RAS refresh, RAS-only refresh,

NAPRD03

Abstract: Racal Instruments 6103 GCF-CC NAPRD03 test plan ptcrb 3g call flow 6103G GSM project circuit Racal Instruments 6103 option 6103G-93 API 662
Contextual Info: Protocol Test 6103 AIME 6103 AIME/CT 2/2.5G Protocol Analysis and Conformance Test Solutions • GSM, GPRS and EGPRS Protocol Analyzer • 3GPP Compliant Mobile Conformance Test System • 3GPP TS51.010 test cases validated by accredited test houses • Fully automated testing including mobile

Contextual Info: HN27C4001G Series 524288-word x 8-bit CMOS UV Erasable and Programmable ROM HITACHI Description The Hitachi HN27C4001G is a 4-Mbit ultraviolet erasable and electrically programmable ROM, featuring high speed and low power dissipation. Fabricated on advanced fine process and high speed circuitry

TPS51460

Abstract: IMVP7 TPS51460A DrMOS TI IV-52 CSD87350 intel IMVP7 NCP18WF104F03RC TPS51601A
Contextual Info: TPS51640A, TPS59640, TPS59641 SLUSAQ2 – JANUARY 2012 www.ti.com Dual-Channel 3-Phase CPU/1-Phase GPU SVID, D-CAP+ Step-Down Controller for IMVP-7 VCORE with Two Integrated Drivers FEATURES 1 • • • • • 2 • • • • • • • • •

TPS51632-Q1

Contextual Info: TI Information — Selective Disclosure NDA Required TPS51632-Q1 SLUSBT1A – JANUARY 2014 – REVISED JULY 2014 2.5-V To 24-V, 3, 2, And 1-Phase Step-Down Driverless Controller For NVIDIA Tegra T40, T50 Processors for Automotive Applications 1 Features

PS3 GPU

Abstract: NCP18WF104F03RC TPS51650 MURATA NCP18WF104F03RC QC 0765 RT CSSK0612FTL750 TPS51601 FDUE1040J-H-R36 IMVP7 TDC 210 NTC
Contextual Info: TPS51650, TPS59650 SLUSAV7 – JANUARY 2012 www.ti.com Dual-Channel 3-Phase CPU/2-Phase GPU SVID, D-CAP+ Step-Down Controller for IMVP-7 VCORE with Two Integrated Drivers FEATURES APPLICATIONS • • • • 1 2 • • • • • • • • • •

7MBR30SA060E-01

Abstract: 100C
Contextual Info: the express w ritle n third p a rty , nor used co n s e n t of Fuji Electric C o . L td for the m a n u fa c tu ré '.: purpo ses w it h o u 1. This m a ie c id l and the info rm a tion herein is the p ro p e rty ol Fuji Electric Co Lui T >iey sh;ill be neither reproduced c o p ie d

TPS51632

Abstract: tegra 2.1 IAD32 SLUSB32 JESD-51-7 v5 13005 2
Contextual Info: TPS51632 www.ti.com SLUSB32 – APRIL 2013 3-2-1 Phase D-Cap+ Step-Down Driverless Controller for Tegra CPUs with Serial VID Control and DVFS Check for Samples: TPS51632 FEATURES DESCRIPTION • • The TPS51632 is a driverless step down controller with serial control. Advanced features such as DCap+™ architecture with overlapping pulse support

panasonic SV 3900

Abstract: 2TPLF470M4E TPS59641 NCP18WF104F03RC PS3 GPU Powerblock DD 53 S 1200 K Stackpole TPS59641RSLR TPS51601 diode IV5
Contextual Info: TPS51640A, TPS59640, TPS59641 SLUSAQ2 – JANUARY 2012 www.ti.com Dual-Channel 3-Phase CPU/1-Phase GPU SVID, D-CAP+ Step-Down Controller for IMVP-7 VCORE with Two Integrated Drivers FEATURES 1 • • • • • 2 • • • • • • • • •

PS3 GPU

Abstract: Vishay BC 193 TDC 210 NTC TPS51650RSLR
Contextual Info: TPS51650, TPS59650 SLUSAV7 – JANUARY 2012 www.ti.com Dual-Channel 3-Phase CPU/2-Phase GPU SVID, D-CAP+ Step-Down Controller for IMVP-7 VCORE with Two Integrated Drivers FEATURES APPLICATIONS • • • • 1 2 • • • • • • • • • •

TPS51640ARSLT

Abstract: dd 55 n 14 powerblock TPS51601A
Contextual Info: TPS51640A, TPS59640, TPS59641 SLUSAQ2 – JANUARY 2012 www.ti.com Dual-Channel 3-Phase CPU/1-Phase GPU SVID, D-CAP+ Step-Down Controller for IMVP-7 VCORE with Two Integrated Drivers FEATURES 1 • • • • • 2 • • • • • • • • •

6MBI30FA-060

Abstract: 6mbi30fa
Contextual Info: 6 MBI30 FA -060 30A IGBT l£f?12"\l">£ ' Outline Drawings - ;u IGBT MODULE Features • ‘f&fiSftlWJE Low Saturation Voltage ( M O S V - h fltig ) • W±mm •S S Voltage, Drive Variety of Pow er Capacity Series ’ Applications > '< — 9 • AC, AC-DC Servo Drive Amplifier

ceramic capacitors 15pf

Abstract: DCS1800 MAX2009 MAX2009ETI-T MAX2010 PCS1900 GCS varactor
Contextual Info: 19-2929; Rev 0; 8/03 KIT ATION EVALU LE B A IL A AV 1200MHz to 2500MHz Adjustable RF Predistorter The MAX2009 adjustable RF predistorter is designed to improve power amplifier PA adjacent-channel power rejection (ACPR) by introducing gain and phase expansion in a PA chain to compensate for the PA’s gain and

TPS51601

Abstract: PS3 GPU NCP18WF104F03RC intel IMVP7 TDC NTC 210 QC 0765 RT FDUE1040J-H-R36 RCF 2100 MURATA NCP18WF104F03RC TDC 210 NTC
Contextual Info: TPS51650, TPS59650 SLUSAV7 – JANUARY 2012 www.ti.com Dual-Channel 3-Phase CPU/2-Phase GPU SVID, D-CAP+ Step-Down Controller for IMVP-7 VCORE with Two Integrated Drivers FEATURES APPLICATIONS • • • • 1 2 • • • • • • • • • •

EMERGENCY OFF PUSH BUTTON

Abstract: modem mobile phone GSM 900/1800 china mobile main board gsm modem sim 900 gsm module datasheet measurement rf gsm VGCS
Contextual Info: 4202R Mobile Service Tester For GSM-R Applications Highlights The Mobile Service Testers 4202R is designed to meet the requirements of installation teams, service centers and manufacturers of GSM-R terminals who want to perform fault analysis and diagnoses.

NCP18WF104F03RC

Abstract: MURATA NCP18WF104F03RC DrMOS TI dd 55 n 14 powerblock TPS51601A
Contextual Info: TPS51640A, TPS59640, TPS59641 SLUSAQ2 – JANUARY 2012 www.ti.com Dual-Channel 3-Phase CPU/1-Phase GPU SVID, D-CAP+ Step-Down Controller for IMVP-7 VCORE with Two Integrated Drivers FEATURES 1 • • • • • 2 • • • • • • • • •

tps51631

Contextual Info: TPS51632 www.ti.com SLUSB32A – APRIL 2013 – REVISED MAY 2013 3-2-1 Phase D-Cap+ Step-Down Driverless Controller for Tegra™ CPUs with Serial VID Control and DVFS Check for Samples: TPS51632 FEATURES DESCRIPTION • Selectable Phase Count: 3, 2, or 1

TRANSISTOR 0835

Abstract: panasonic SV 3900 dd 55 n 14 powerblock NCP18WF104F03RC TPS51601A
Contextual Info: TPS51640A, TPS59640, TPS59641 SLUSAQ2 – JANUARY 2012 www.ti.com Dual-Channel 3-Phase CPU/1-Phase GPU SVID, D-CAP+ Step-Down Controller for IMVP-7 VCORE with Two Integrated Drivers FEATURES 1 • • • • • 2 • • • • • • • • •