VCC, PIN 4 Search Results

74198

Abstract: 74LS194 74198 pin diagram 54LS D172 D173 74LS273 74LS323 74ls273 fairchild 74LS398
Contextual Info: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL-TTL 088 54LS/74LS299 11 18 Vcc Pin 20 QND = Pin 10 D89 54LS/74LS323 Vcc = Pin 20 QND = Pin 10 D90 54LS/74LS273 3 4 7 8 13 14 17 18 Vcc = Pin 20 GND = Pin 10 D91 54LS/74LS377 1 3 4 7 8 13 14 17 18 Vcc = Pin 20 GND = Pin 10

UTC "MARKING code"

Abstract: oscilloscope 8120 QW-R119-001 81XX marking 8150 UTC voltage UTC8131 marking code cl linear marking code utc 8140
Contextual Info: UTC 81XX LINEAR INTEGRATED CIRCUIT MARKING INFORMATION PACKAGE PIN CODE PIN 1 PIN 2 PIN 3 PIN4 PIN 5 2 VCC VOUT GND - - MARKING 3 SOT-23 DATE CODE VOLTAGE CODE 3 VOUT GND VCC - - 5 GND VOUT VCC - - A NC NC GND VOUT VCC PIN CODE 2 3 SOT-25 1 2 1 DATE

gear tooth sensor

Abstract: ATS674LSE
Contextual Info: ATS673/4 PRELIMINARY – Subject to Change without Notice Pin Out Diagram Pin 1: VCC Pin 2: VOUT Pin 3: Test pin tie to Gnd Pin 4: Gnd ABSOLUTE MAXIMUM RATINGS Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . 28 V Reverse Supply Voltage,

AEC-Q100-003

Abstract: ISO 7637-1 aec-q100 ISO 7637-1 2002 ATS672LSB ATS672LSB-HN rpm counter ATS672LSB-LN ATS672LSB-LT JA101
Contextual Info: ATS672LSB Preliminary – Subject to Change Self-Calibrating TPO Gear-Tooth Sensor with 9-Bit Signal Capture PIN OUT DIAGRAM 4321 Pin 1: VCC Pin 2: VOUT Pin 3: Test Pin Tie to GND Pin 4: Gnd ABSOLUTE MAXIMUM RATINGS Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . 28 V

Contextual Info: O K I Semiconductor Terminology and Symbols Terminology and Symbols 1. Pin Terminology Term Power Supply Voltage Pin Address Input Pin EPROM E 2PROM Mask ROM Static RAM Dynamic RAM V c c . V pp Vcc Ao - Ai2 Vcc Ao - A16 V cc Ao - A -|4 Vcc Ao - A n Ao - Ai6

fairchild micrologic 960

Abstract: fairchild 946 HALF ADDER Fairchild 936 dtl 946 DTL Fairchild 946 rtl decade counter fairchild 937 Dtl 937 micrologic
Contextual Info: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL-DTL G7 1812 G8 9157, 9158 □ □ □ " G9 933 ¡ 3 14 ,4 13 12 * L 3C 4L 3 J10 sL 7L Vcc = Pin 14 G N D = Pin 7 N o c o n n ec tio n req uired to V g c P in 1 4 . Vcc = Pin 14 G N D = Pin 7 G10 946, 949 Vcc = Pin 14

SW-DIP-8

Abstract: SW-DIP-2 IC 7407 mach210-20jc SW-DIP2 MCU17 U15C 13la6 LM317T HDR103
Contextual Info: NOTES, M68EML05P6A EMULATION MODULE UNLESS OTHERWISE SPECIFIED 1. VCC PIN LOCATIONS : VCC IS APPLIED TO PIN 8 OF ALL 8-PIN IC’s, PIN 14 OF ALL 14-PIN IC’s, PIN 16 OF ALL 16-PIN IC’s, PIN 20 OF ALL 20-PIN IC’s, ETC. 2. GROUND PIN LOCATIONS : GROUND IS APPLIED TO PIN 4 OF ALL 8-PIN IC’s,

DTL Fairchild 946

Abstract: DTL Fairchild 930 rtl decade counter Fairchild 936 fairchild 946 Fairchild 958 counter fairchild micrologic 960 micrologic 946 dtl 930 dtl
Contextual Info: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL-DTL G7 1812 G8 9157, 9158 □ ,4 □ 13 □ 12 G9 933 ¡ 3 14 * L 3 C 4L 3 " J10 sL 7L Vcc = Pin 14 G N D = Pin 7 N o c o n n ec tio n req uired to V g c P in 1 4 . Vcc = Pin 14 G N D = Pin 7 G10 946, 949 Vcc = Pin 14

d92 02

Abstract: ttl 7497 D187 D188 D190 D194 D195 D196 74LS377 74ls175 pin diagram
Contextual Info: FAIRCHILD L O G IC /C O N N E C T IO N DIAGRAM S D IG ITAL-TTL D187 9397, 7497 D188 93167, 74167 0189 54LS/74LS173 9 10 11 — 0 CE 9 - CP 10— 0 Ez 1 2 - Gy k h IE 7 TC 3 4 Vcc = Pin 16 GND = Pin 8 Vcc = Pin 16 GND = Pin 8 D190 54LS/74LS375 Vcc = Pin 16

"NAND Gate"

Abstract: 5 input nand gate dtl TTL NOR Gate 949 dtl TTL 3 input or gate fairchild micrologic DIGITAL-DTL 951 monostable 951 Monostable Multivibrator micrologic
Contextual Info: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL-DTL G7 1812 G8 9157, 9158 □ ,4 □ 13 □ 12 G9 933 ¡ 3 14 * L 3 C 4L 3 " J10 sL 7L Vcc = Pin 14 G N D = Pin 7 N o c o n n ec tio n req uired to V g c P in 1 4 . Vcc = Pin 14 G N D = Pin 7 G10 946, 949 Vcc = Pin 14

Contextual Info: PRELIMINARY MICRON 4 MEG x 16 EDO DRAM I MT4LC4M16R6 DRAM FEATURES PIN ASSIGNMENT Top View OPTIONS 50-Pin TSOP (DB-7) Vcc DQ1 DQ2 DQ3 DQ4 Vcc DQ5 DQ6 DQ7 DQ8 NC Vcc WE# RAS# NC NC NC NC A0 A1 A2 A3 A4 A5 Vcc MARKING • Package Plastic TSOP (400 mil) TG

micrologic

Abstract: 9094 Quad TTL to MOS Driver DIGITAL-DTL dtl 948 951 monostable 951 Monostable Multivibrator 11C24 11C44 11C58
Contextual Info: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL-DTL G7 1812 G8 9157, 9158 □ ,4 □ 13 □ 12 G9 933 ¡ 3 14 * L 3 C 4 L 3 " J 1 0 s L 7L Vcc = Pin 14 G N D = Pin 7 N o c o n n ec tio n req uired to V g c P in 1 4 . Vcc = Pin 14 G N D = Pin 7 G10 946, 949 Vcc = Pin 14

Flip-Flops

Abstract: Single T-Type Flip-Flop internal structure of d flipflop
Contextual Info: ATLV2500B/BL Features • • 3-Volt Operation Wide Vcc Range Vcc = 3.0 V to 5.25 V Commercial Vcc = 3.0 V to 5.5 V (Industrial) High Performance, High Density Programmable Logic Device Maximum 15 ns Pin-to-Pin Delay Fully Connected Logic Array With 416 Product Terms

sn 7492 ttl

Abstract: 74293 pin diagram TTL 7493A TTL 74293 7493A 74162 74LS93 74293 74LS183 74LS90
Contextual Info: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL-TTL D121 54/7490A, 54LS/74LS90 D122 54/7492, 74LS92 D123 S4/74293, 54LS/74LS293 6 7 141 Vcc = Pin 5 GND = Pin 10 NC = Pin 4,13 - Vcc = Pin 5 GND = Pin 10 NC = 2, 3, 4, 13 D124 S4/7493A, 54LS/74LS93 D125 54/74176, 54/74177,

Contextual Info: ATLV2500B/BL Features • • 3-Volt Operation Wide Vcc Range Vcc = 3.0 V to 5.25 V Commercial Vcc = 3.0 V to 5.5 V (Industrial) • High Performance, High Density Programmable Logic Device Maximum 15 ns Pin-to-Pin Delay Fully Connected Logic Array With 416 Product Terms

74LS574

Abstract: ttl 74LS173 74ls399 93L38 ttl 74165 ttl 7491 54LS 74LS266 ttl 74173 74LS568
Contextual Info: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL -TTL D93 54LS/74LS379 D94 9386, 74LS266, 54LS/74LS386 D95 54LS/74LS398 Vcc 1 4 5 12 13 4 5 7 6 14 15 17 16 lOa Ila lob lib lo c lie lod lid r ei fi r E5i r?i n S CP Qa Qb 2 GND Vcc = Pin 20 GND = Pin 10 Vcc = Pin 16

Contextual Info: HP Ethernet empty MCU card for 100-pin TQFP STM32F2 4 0x family EasyMx PRO v7 VCC C4 100nF VCC C5 100nF VREF C6 100nF C7 100nF PA5 PA3 VCC VCC C3 100nF VCC VCC C2 100nF PE15 PE13 PE11 PE9 PE7 PB1 VCC C1 100nF 103 101 99 97 95 93 91 89 87 85 83 81 79 VCC GND

CI 74LS90

Abstract: ci 74193 ci 74ls193 CI 74196 ci 7492 CI 74176 74LS93 TTL 74293 TTL 7493A sn 7492 ttl
Contextual Info: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIG ITAL-TTL D121 54/7490A, 54LS/74LS90 D122 54/7492, 74LS92 D123 S4/74293, 54LS/74LS293 6 7 141 Vcc = Pin 5 GND = Pin 10 NC = Pin 4,13 - Vcc = Pin 5 GND = Pin 10 NC = 2, 3, 4, 13 D124 S4/7493A, 54LS/74LS93 D125 54/74176, 54/74177,

Contextual Info: ATLV2500B/BL Features • • 1 3-Volt Operation Wide Vcc Range Vcc = 3.0 V to 5.25 V Commercial Vcc = 3.0 V to 5.5 V (Industrial) High Performance, High Density Programmable Logic Device Maximum 15 ns Pin-to-Pin Delay Fully Connected Logic Array With 416 Product Terms

Contextual Info: Empty HP MCU card for 100-pin TQFP STM32F2 4 0x family EasyMx PRO v7 C1 100nF VCC C2 100nF VCC C3 100nF VCC C4 100nF VCC C5 100nF VCC PB10 PE15 PE13 PE11 PE9 PE7 PB1 PC5 PA7 PA5 PA3 VCC VCC VREF C6 100nF C7 100nF 103 101 99 97 95 93 91 89 87 85 83 81 79 VCC

VCA2

Contextual Info: CXA1211M Pin Description Pin No. Symbol Voltage DC AC I/O resistance Equivalent circuit Description VCC 1 IN1 2.5V 1.0Vp-p∗ 40kΩ 1 Signal input pin CH1 3k 40k GND VCC 2 CONT1 2.7V∗ Input pin of gain control signal (CH1). At "Low" power save is possible.

RS flip-flop

Abstract: 936 dtl 949 dtl nand GATE DTL 9157 fairchild 9112 micrologic Hex inverter rs-flip-flop fairchild micrologic
Contextual Info: FAIRCHILD LOGIC/CONNECTION DIAGRAMS D IG IT A L-D T L G7 1812 G8 9157, 9158 □ □ □ G9 933 ¡ 3 14 ,4 13 12 * L 3C " 3 4L J10 sL 7L Vcc = Pin 14 G N D = Pin 7 N o c o n n ec tio n req uired to V g c P in 1 4 . Vcc = Pin 14 G N D = Pin 7 G10 946, 949 Vcc = Pin 14

Contextual Info: January 2006 Pin # Description Pin # Description 1 Anode 3 Ground 2 Cathode 4 Vcc 5 Output RoHS

74HCT74

Abstract: db25 ISP 74HCT125 2N3904 74hct244 Q1 2N3904 db25 parallel port Q12N3904 2N3906 y418
Contextual Info: In-Field Programming Using the SX In-System Programmimg Capability NOTES: 12.3V N i l Vpp 1. Vcc +5V and GND are not shown but are required for U1, U2, and U3. The 74HCT244 has Vcc on pin 20 and GND on pin 10. The 74HCT125 and the 74HCT74 have Vcc on pin 14 and GND on pin 7.