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    74HCT74 Search Results

    74HCT74 Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    CD74HCT74M96 Texas Instruments High Speed CMOS Logic Dual Positive-Edge-Triggered D Flip-Flops with Set and Reset 14-SOIC -55 to 125 Visit Texas Instruments Buy
    SN74HCT74DR Texas Instruments Dual D-Type Positive-Edge-Triggered Flip-Flops With Clear and Preset 14-SOIC -40 to 85 Visit Texas Instruments Buy
    CD74HCT74E Texas Instruments High Speed CMOS Logic Dual Positive-Edge-Triggered D Flip-Flops with Set and Reset 14-PDIP -55 to 125 Visit Texas Instruments Buy
    SN74HCT74DRE4 Texas Instruments Dual D-Type Positive-Edge-Triggered Flip-Flops With Clear and Preset 14-SOIC -40 to 85 Visit Texas Instruments Buy
    SN74HCT74NSR Texas Instruments Dual D-Type Positive-Edge-Triggered Flip-Flops With Clear and Preset 14-SO -40 to 85 Visit Texas Instruments Buy
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    74HCT74 Price and Stock

    Texas Instruments CD74HCT74M96

    IC FF D-TYPE DUAL 1BIT 14SOIC
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    DigiKey CD74HCT74M96 Digi-Reel 8,660 1
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    Bristol Electronics CD74HCT74M96 4,390
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    Rochester Electronics CD74HCT74M96 27,500 1
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    TME CD74HCT74M96 772 1
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    Ameya Holding Limited CD74HCT74M96 2,460
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    Nexperia 74HCT74PW,118

    IC FF D-TYPE DUAL 1BIT 14TSSOP
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    Rochester Electronics 74HCT74PW,118 2,500 1
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    Texas Instruments SN74HCT74PWR

    IC FF D-TYPE DUAL 1BIT 14TSSOP
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    Win Source Electronics SN74HCT74PWR 41,030
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    Nexperia 74HCT74BZZ

    IC FF D-TYPE DUAL 1BIT 14DHXQFN
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    Verical 74HCT74BZZ 9,000 56
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    onsemi NLV74HCT74ADR2G

    IC FF D-TYPE DUAL 1BIT 14SOIC
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    Rochester Electronics NLV74HCT74ADR2G 21,293 1
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    74HCT74 Datasheets (84)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF
    74HCT74 Philips Semiconductors Dual D-type flip-flop with set and reset, positive-edge trigger Original PDF
    74HCT74 Philips Semiconductors DUAL D-TYPE FLIP-FLOP WITH SET AND RESET, POSITIVE-EDGE TRIGGER Scan PDF
    74HCT74 Philips Semiconductors DUAL D-TYPE FLIP-FLOP WITH SET AND RESET, POSITIVE-EDGE TRIGGER Scan PDF
    74HCT7403 Philips Semiconductors 4-Bit x 64-word FIFO register, 3-state Original PDF
    74HCT7403D NXP Semiconductors 4-bit x 64-word FIFO register; 3-state Original PDF
    74HCT7403D Philips Semiconductors 4 Bit x 64 Word FIFO Register, 3-State Original PDF
    74HCT7403D Unknown Historical semiconductor price guide (US$ - 1998). From our catalog scanning project. Historical PDF
    74HCT7403D,112 NXP Semiconductors 74HCT7403D - 4-Bit x 64-word FIFO register; 3-state, SOT162-1 Package, Standard Marking, IC'S Tube - DSC Bulk Pack Original PDF
    74HCT7403D,118 NXP Semiconductors 74HCT7403D - 4-Bit x 64-word FIFO register; 3-state, SOT162-1 Package, Standard Marking, Reel Pack, SMD, 13" Original PDF
    74HCT7403D,512 NXP Semiconductors Logic - FIFOs Memory, Integrated Circuits (ICs), IC FIFO REGISTER 64X4 3ST 16SOIC Original PDF
    74HCT7403D,512 NXP Semiconductors 4-Bit x 64-word FIFO register; 3-state - Description: 4-Bit x 64-Word FIFO Register; TTL Enabled (3-State) ; Fmax: 30 MHz; Logic switching levels: TTL ; Number of pins: 16 ; Output drive capability: +/- 8 mA ; Power dissipation considerations: Low Power ; Propagation delay: 17 ns; Voltage: 4.5-5.5 V; Package: SOT162-1 (SO16); Container: Tube Dry Pack Original PDF
    74HCT7403D,518 NXP Semiconductors Logic - FIFOs Memory, Integrated Circuits (ICs), IC FIFO REGISTER 64X4 3ST 16SOIC Original PDF
    74HCT7403D,518 NXP Semiconductors 4-Bit x 64-word FIFO register; 3-state - Description: 4-Bit x 64-Word FIFO Register; TTL Enabled (3-State) ; Fmax: 30 MHz; Logic switching levels: TTL ; Number of pins: 16 ; Output drive capability: +/- 8 mA ; Power dissipation considerations: Low Power ; Propagation delay: 17 ns; Voltage: 4.5-5.5 V; Package: SOT162-1 (SO16); Container: Reel Dry Pack, SMD, 13" Original PDF
    74HCT7403D-Q100 NXP Semiconductors 4-bit x 64-word FIFO register; 3-state Original PDF
    74HCT7403D-Q100,51 NXP Semiconductors 74HCT7403D-Q100 - 74HCT7403D-Q100 - 4-bit x 64-word FIFO register; 3-state Original PDF
    74HCT7403D-T Philips Semiconductors 4-Bit x 64-word FIFO register,3-state Original PDF
    74HCT7403D-T Unknown Historical semiconductor price guide (US$ - 1998). From our catalog scanning project. Historical PDF
    74HCT7403N NXP Semiconductors 4-bit x 64-word FIFO register; 3-state Original PDF
    74HCT7403N Philips Semiconductors 4 Bit x 64 Word FIFO Register, 3-State Original PDF
    74HCT7403N Unknown Historical semiconductor price guide (US$ - 1998). From our catalog scanning project. Historical PDF

    74HCT74 Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    74HCT74 truth table

    Abstract: datasheet of 74HC74 ic 74HC74 IC 74hc74 pin DIAGRAM OF IC 74HC74 CI 74hc74 TTL 74hc74 of 74HC74 ic 74HC74 datasheet 74HCT74 DATASHEET
    Text: [ /Title CD54H C74, CD74H C74, CD74H CT74 /Subject (Dual D FlipFlop with Set CD54/74HC74, CD54/74HCT74 Data sheet acquired from Harris Semiconductor SCHS124A Dual D Flip-Flop with Set and Reset Positive-Edge Trigger January 1998 - Revised May 2000 Features


    Original
    PDF CD54H CD74H CD54/74HC74, CD54/74HCT74 SCHS124A HCT74 74HCT74 truth table datasheet of 74HC74 ic 74HC74 IC 74hc74 pin DIAGRAM OF IC 74HC74 CI 74hc74 TTL 74hc74 of 74HC74 ic 74HC74 datasheet 74HCT74 DATASHEET

    Untitled

    Abstract: No abstract text available
    Text: 74HC74-Q100; 74HCT74-Q100 Dual D-type flip-flop with set and reset; positive edge-trigger Rev. 2 — 6 September 2013 Product data sheet 1. General description The 74HC74-Q100; 74HCT74-Q100 are dual positive edge triggered D-type flip-flop with individual data nD , clock (nCP), set (nSD) and reset (nRD) inputs, and complementary


    Original
    PDF 74HC74-Q100; 74HCT74-Q100 74HCT74-Q100

    IC 74hc74

    Abstract: 74HC74 CI 74hc74 TTL 74hc74 of 74HC74 ic pin DIAGRAM OF IC 74HC74 74HCT74 truth table of 74HC74 ic harris HC-36/74HCT74
    Text: [ /Title CD54H C74, CD74H C74, CD74H CT74 /Subject (Dual D FlipFlop with Set CD54/74HC74, CD54/74HCT74 Data sheet acquired from Harris Semiconductor SCHS124B Dual D Flip-Flop with Set and Reset Positive-Edge Trigger January 1998 - Revised December 2002 Features


    Original
    PDF CD54/74HC74, CD54/74HCT74 SCHS124B HCT74 IC 74hc74 74HC74 CI 74hc74 TTL 74hc74 of 74HC74 ic pin DIAGRAM OF IC 74HC74 74HCT74 truth table of 74HC74 ic harris HC-36/74HCT74

    MNA423

    Abstract: 74LV74
    Text: 74LV74 Dual D-type flip-flop with set and reset; positive edge-trigger Rev. 03 — 28 September 2007 Product data sheet 1. General description The 74LV74 is a low-voltage Si-gate CMOS device that is pin and function compatible with 74HC74 and 74HCT74. The device is a dual positive edge triggered D-type flip-flop with individual data D inputs,


    Original
    PDF 74LV74 74LV74 74HC74 74HCT74. MNA423

    74HC7403D

    Abstract: 74HC7403
    Text: 74HC7403-Q100; 74HCT7403-Q100 4-bit x 64-word FIFO register; 3-state Rev. 1 — 21 September 2012 Product data sheet 1. General description The 74HC7403-Q100; 74HCT7403-Q100 is an expandable, First-In First-Out FIFO memory organized as 64 words by 4 bits. A guaranteed 15 MHz data-rate makes it ideal


    Original
    PDF 74HC7403-Q100; 74HCT7403-Q100 64-word 74HCT7403-Q100 HCT7403 74HC7403D 74HC7403

    74HC7403D

    Abstract: 74HC7403N 74HC7403
    Text: 74HC7403; 74HCT7403 4-bit x 64-word FIFO register; 3-state Rev. 4 — 24 September 2012 Product data sheet 1. General description The 74HC7403; 74HCT7403 is an expandable, First-In First-Out FIFO memory organized as 64 words by 4 bits. A guaranteed 15 MHz data-rate makes it ideal for


    Original
    PDF 74HC7403; 74HCT7403 64-word 74HCT7403 HCT7403 74HC7403D 74HC7403N 74HC7403

    74HCT74

    Abstract: db25 ISP 74HCT125 2N3904 74hct244 Q1 2N3904 db25 parallel port Q12N3904 2N3906 y418
    Text: In-Field Programming Using the SX In-System Programmimg Capability NOTES: 12.3V N i l Vpp 1. Vcc +5V and GND are not shown but are required for U1, U2, and U3. The 74HCT244 has Vcc on pin 20 and GND on pin 10. The 74HCT125 and the 74HCT74 have Vcc on pin 14 and GND on pin 7.


    Original
    PDF 74HCT244 74HCT125 74HCT74 2N3904 2N3906 100pF 74HCT244 74HCT125 db25 ISP 2N3904 Q1 2N3904 db25 parallel port Q12N3904 2N3906 y418

    74HC74

    Abstract: 74HC74 application note 74HCT74 74HCT74 DATASHEET 74HC74 datasheet 74HC74N Current 74HCT74 74hc74 pin diagram 74HC74 application TTL 74hc74
    Text: INTEGRATED CIRCUITS DATA SHEET 74HC74; 74HCT74 Dual D-type flip-flop with set and reset; positive-edge trigger Product specification Supersedes data of 1998 Feb 23 2003 Jul 10 Philips Semiconductors Product specification Dual D-type flip-flop with set and reset;


    Original
    PDF 74HC74; 74HCT74 74HC/HCT74 SCA75 613508/03/pp22 74HC74 74HC74 application note 74HCT74 74HCT74 DATASHEET 74HC74 datasheet 74HC74N Current 74HCT74 74hc74 pin diagram 74HC74 application TTL 74hc74

    74HC74

    Abstract: 74hc74 pin diagram 74HCT74 74HC74 application HCT74 74HC74N 74HC74DB 74HC74 application note 74HCT74N CI 74hc74
    Text: 74HC74; 74HCT74 Dual D-type flip-flop with set and reset; positive edge-trigger Rev. 4 — 27 August 2012 Product data sheet 1. General description The 74HC74 and 74HCT74 are dual positive edge triggered D-type flip-flop. They have individual data nD , clock (nCP), set (nSD) and reset (nRD) inputs, and complementary


    Original
    PDF 74HC74; 74HCT74 74HC74 74HCT74 HCT74 74hc74 pin diagram 74HC74 application HCT74 74HC74N 74HC74DB 74HC74 application note 74HCT74N CI 74hc74

    74HC74

    Abstract: 74HC74-Q100 74HC74 application note 74HC74 application 74HCT74 CI 74hc74 Current 74HCT74 TTL 74hc74 74hc74 pin diagram 74HC74BQ
    Text: 74HC74-Q100; 74HCT74-Q100 Dual D-type flip-flop with set and reset; positive edge-trigger Rev. 1 — 7 August 2012 Product data sheet 1. General description The 74HC74-Q100; 74HCT74-Q100 are dual positive edge triggered D-type flip-flop with individual data nD , clock (nCP), set (nSD) and reset (nRD) inputs, and complementary


    Original
    PDF 74HC74-Q100; 74HCT74-Q100 74HCT74-Q100 74HC74 74HC74-Q100 74HC74 application note 74HC74 application 74HCT74 CI 74hc74 Current 74HCT74 TTL 74hc74 74hc74 pin diagram 74HC74BQ

    74HC74

    Abstract: 74HCT74 74HC74D 74HC74DB 74HC74N 74HCT74D 74HCT74DB 74HCT74N 74HC74PW CI 74hc74
    Text: Philips Semiconductors Product specification Dual D-type flip-flop with set and reset; positive-edge trigger 74HC74; 74HCT74 FEATURES GENERAL DESCRIPTION • Wide supply voltage range from 2.0 to 6.0 V The 74HC/HCT74 is a high-speed Si-gate CMOS device and is pin compatible with low power Schottky TTL


    Original
    PDF 74HC74; 74HCT74 74HC/HCT74 EIA/JESD22-A114-A OT108-1 076E06 MS-012 74HC74 74HCT74 74HC74D 74HC74DB 74HC74N 74HCT74D 74HCT74DB 74HCT74N 74HC74PW CI 74hc74

    Untitled

    Abstract: No abstract text available
    Text: 74HC74-Q100; 74HCT74-Q100 Dual D-type flip-flop with set and reset; positive edge-trigger Rev. 1 — 7 August 2012 Product data sheet 1. General description The 74HC74-Q100; 74HCT74-Q100 are dual positive edge triggered D-type flip-flop with individual data nD , clock (nCP), set (nSD) and reset (nRD) inputs, and complementary


    Original
    PDF 74HC74-Q100; 74HCT74-Q100 74HCT74-Q100

    harris hct74

    Abstract: 74HC74 application 74HC74 74HC74 application note CI 74hc74 pin DIAGRAM OF IC 74HC74
    Text: [ /Title CD54H C74, CD74H C74, CD74H CT74 /Subject (Dual D FlipFlop with Set CD54/74HC74, CD54/74HCT74 Data sheet acquired from Harris Semiconductor SCHS124B Dual D Flip-Flop with Set and Reset Positive-Edge Trigger January 1998 - Revised December 2002 Features


    Original
    PDF CD54/74HC74, CD54/74HCT74 SCHS124B HCT74 CD54HCT74F CD54HCT74F3A 5962View 8685301CA harris hct74 74HC74 application 74HC74 74HC74 application note CI 74hc74 pin DIAGRAM OF IC 74HC74

    74HC74

    Abstract: Current 74HCT74 74HCT74 74HC74N 74HC74D 74HC74DB 74HCT74D 74HCT74DB 74HCT74N HCT74
    Text: Philips Semiconductors Product specification Dual D-type flip-flop with set and reset; positive-edge trigger 74HC74; 74HCT74 FEATURES GENERAL DESCRIPTION • Wide supply voltage range from 2.0 to 6.0 V The 74HC/HCT74 is a high-speed Si-gate CMOS device and is pin compatible with low power Schottky TTL


    Original
    PDF 74HC74; 74HCT74 74HC/HCT74 EIA/JESD22-A114-A OT108-1 076E06 MS-012 74HC74 Current 74HCT74 74HCT74 74HC74N 74HC74D 74HC74DB 74HCT74D 74HCT74DB 74HCT74N HCT74

    74HC74

    Abstract: 74hct74 74LS74 pinout 74HC74 pin configuration 74hc74 pin diagram TTL 74hc74 74ls74 timing setup hold Current 74HCT74 QQ042 000M2AA
    Text: GD54/74HC74, GD54/74HCT74 DUAL D-TYPE FLIP-FLOPS WITH PRESET & CLEAR G e n era l D escrip tio n These devices are identical in pinout to the 5 4 /7 4 L S 7 4 . They consist of two D-type flip-flops with individual preset, clear, and clock inputs. Infor­ Pin C o n fig u ra tio n


    OCR Scan
    PDF GD54/74HC74, GD54/74HCT74 54/74LS74. 00042T1 402A757 DQ042T2 74HC74 74hct74 74LS74 pinout 74HC74 pin configuration 74hc74 pin diagram TTL 74hc74 74ls74 timing setup hold Current 74HCT74 QQ042 000M2AA

    ic 74 hc 10

    Abstract: No abstract text available
    Text: GD54/74HC74, GD54/74HCT74 DUAL D-TYPE FLIP-FLOPS WITH PRESET & CLEAR General Description These devices are identical in pinout to the 5 4 /7 4 L S 7 4 . They consist of two D-type flip-flops with individual preset, clear, and clock inputs. Infor­ mation at a D-input is transferred to the correspon­


    OCR Scan
    PDF GD54/74HC74, GD54/74HCT74 ic 74 hc 10

    of 74HC74 ic

    Abstract: 74HC74 IC 74hc74 pin DIAGRAM OF IC 74HC74 74hc74an
    Text: Technical Data File Number CD54/74HC74 CD54/74HCT74 1476 High-Speed CMOS Logic Dual D Flip-Flop with Set and Reset Positive-Edge Trigger Type Features: QMO » P!W 7 9ÎCS-36965m • H ysteresis on clock inputs for im proved noise immu­ nity and increased input Rise and Fait times,


    OCR Scan
    PDF CD54/74HC74 CD54/74HCT74 CS-36965m TheRCA-CD54/74HC74andCD 54/74HCT74utilizesilicongate indepe125 54HCT 74HCT COS4/74HC74 of 74HC74 ic 74HC74 IC 74hc74 pin DIAGRAM OF IC 74HC74 74hc74an

    74hct74a

    Abstract: C65 004 58p power control 751A-02 LS74 MC54HCTXXAJ MC74HCTXXAD MC74HCTXXAN
    Text: Order this data sheet by MC54HCT74A/D M OTOROLA S E M IC O N D U C TO R TECH N ICAL DATA MC54/74HCT74A Advance Information J SUFFIX C ER A M IC C A S E 632-08 D ual D Flip-Flop w ith S e t and Reset w ith LSTTL C o m p atib le Inputs N SUFFIX PLASTIC C A S E 646-06


    OCR Scan
    PDF MC54HCT74A/D MC54/74HCT74A MC54/74HCT74A C65-402 O13415 74hct74a C65 004 58p power control 751A-02 LS74 MC54HCTXXAJ MC74HCTXXAD MC74HCTXXAN

    Untitled

    Abstract: No abstract text available
    Text: MOTOROLA SEM ICO NDUCTOR TECHNICAL DATA M C 5 4 /74 H C T 7 4 A J SUFFIX CERAMIC CASE 632-08 D ual D Flip-Flop w ith S e t and Reset w ith LSTTL C o m p a tib le Inputs N SUFFIX PLASTIC CASE 646-06 High-Performance Silicon-Gate CMOS The M C54/74HCT74A is ide n tica l in p in o u t to th e LS74. This device m a y be


    OCR Scan
    PDF C54/74HCT74A MC54/74HCT74A

    IC 74ls74

    Abstract: M74HCT74B1
    Text: rz7 Ê S G S -T H O M S O N 5 * ^ â m i( g œ s M54HCT74 M 74HCT74 DUAL D TYPE FLIP FLOP WITH PRESET AND CLEAR • HIGHSPEED fMAX = 53 MHz (TYP. AT Vcc = 5 V ■ LOW POWER DISSIPATION Ice = 2 |xA (MAX.) AT T a = 25 'C ■ COMPATIBLE WITH TTL OUTPUTS


    OCR Scan
    PDF M54HCT74 74HCT74 54/74LS74 M54HCT74F1 M74HCT74M1 M74HCT74B1 M74HCT74C1R M54/74HCT74 DG54437 M54/M IC 74ls74

    Untitled

    Abstract: No abstract text available
    Text: Technical Data File N um ber CD54/74HC74 CD54/74HCT74 1476 High-Speed CMOS Logic Dual D Flip-Flop with Set and Reset Positive-Edge Trigger Type Features: 6N0 > PIN 7 92CS- 36965RI • H ysteresis on c lo ck in p u ts lo r im proved noise im m u ­ n ity a n d increased in p u t Rise and Fall times,


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    PDF CD54/74HC74 CD54/74HCT74 36965RI 54/74H 74and

    74HC74

    Abstract: 74ls74 timing setup hold 74hc74 pin diagram 74LS74 PINOUT 74HC74 pin configuration 74hct74 Current 74HCT74 TTL 74hc74 74HC GD74HCT74
    Text: GD54/74HC74, GD54/74HCT74 DUAL D-TYPE FLIP-FLOPS WITH PRESET & CLEAR General Description These devices are identical in pinout to the 5 4 /7 4 L S 7 4 . They consist of two D-type flip-flops with individual preset, clear, and clock inputs. Infor­ mation at a D-input is transferred to the correspon­


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    PDF GD54/74HC74, GD54/74HCT74 54/74LS74. 74HC74 74ls74 timing setup hold 74hc74 pin diagram 74LS74 PINOUT 74HC74 pin configuration 74hct74 Current 74HCT74 TTL 74hc74 74HC GD74HCT74

    74hc74an

    Abstract: CD74HC74 74HC74 CI 74hc74 Current 74HCT74 74hc74 pin diagram CD54HC74 CD54HCT74 CD74HCT74 74HCT74 truth table
    Text: Technical Data F ile N u m b e r CD54/74HC74 CD54/74HCT74 1476 High-Speed CMOS Logic HARRIS SEMICOND SECTOR 27E D a 4 302271 □ 017 51 b M HiHAS Dual D Flip-Flop with Set and Reset Positive-Edge Trigger T yp e Features: GMO * PIN 7 9 2 C S -3 6 9 S 5 B I


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    PDF CD54/74HC74 CD54/74HCT74 92CS-369S5BI DD17Slb RCA-CD54/74HC74and 92CS-36967 T-46-07-08 D54/74H 74hc74an CD74HC74 74HC74 CI 74hc74 Current 74HCT74 74hc74 pin diagram CD54HC74 CD54HCT74 CD74HCT74 74HCT74 truth table

    74hc74an

    Abstract: 74HCT74 truth table 74HCT74 74HC74 Current 74HCT74
    Text: E SOLID STATE 01 G » E l 3fl7SDfll 00114Tb 7 | ~ D T-4fc-07-<?5 Technical Data File Number CD54/74HC74 CD54/74HCT74 1476 High-Speed CMOS Logic RESET -— -Q Dual D Flip-Flop with Set and Reset


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    PDF 00114Tb T-4fc-07-< CD54/74HC74 CD54/74HCT74 6965R 3A750A1 74hc74an 74HCT74 truth table 74HCT74 74HC74 Current 74HCT74