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    TTL IC ADDER AND SUBTRACTOR Search Results

    TTL IC ADDER AND SUBTRACTOR Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    SNJ5480J Rochester Electronics LLC Adder/Subtractor, TTL, CDIP14, Visit Rochester Electronics LLC Buy
    SNJ54H183J Rochester Electronics LLC Adder/Subtractor, TTL/H/L Series, 1-Bit, TTL, CDIP14 Visit Rochester Electronics LLC Buy
    100182FC Rochester Electronics LLC Adder/Subtractor, 100K Series, 1-Bit, ECL, CQFP24, CERPAK-24 Visit Rochester Electronics LLC Buy
    TB67H481FTG Toshiba Electronic Devices & Storage Corporation Stepping and Brushed Motor Driver /Bipolar Type / Vout(V)=50 / Iout(A)=3.0 / IN input type / VQFN32 Visit Toshiba Electronic Devices & Storage Corporation
    74HC4053FT Toshiba Electronic Devices & Storage Corporation CMOS Logic IC, SPDT(1:2)/Analog Multiplexer, TSSOP16B, -40 to 125 degC Visit Toshiba Electronic Devices & Storage Corporation

    TTL IC ADDER AND SUBTRACTOR Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    Verilog code of 1-bit full subtractor

    Abstract: Verilog code "1-bit full subtractor" verilog hdl code for D Flip flop accumulator verilog code for jk flip flop vhdl code for barrel shifter verilog code for 64 bit barrel shifter XOR Gates 5D208 8 BIT ALU design with verilog code full adder using x-OR and NAND gate
    Text: Full Custom Design Expertise • • • • • • • • • • Microcontroller DSP PC peripheral Remote controller Telephone Communications Speech synthesizer Melody/Rhythm Home appliances Hand-held LCD games Process Process Operating Voltage 7.0µm TOCMOS


    Original     		PDF 2V/24V 0V/30V Verilog code of 1-bit full subtractor Verilog code "1-bit full subtractor" verilog hdl code for D Flip flop accumulator verilog code for jk flip flop vhdl code for barrel shifter verilog code for 64 bit barrel shifter XOR Gates 5D208 8 BIT ALU design with verilog code full adder using x-OR and NAND gate

    TTL IC adder and subtractor

    Abstract: 74LS385 SN74LS385
    Text: TYPES SN54LS385, SN74LS385 QUADRUPLE SERIAL ADDERS/SUBTRACTORS 0 2 4 1 2, NOVEMBER 19 7 7 -R E V IS E D APRIL 1 9 8 5 Four Synchronous Elements in a Single 20-Pin Package SN 54LS385 - J PACKAG E S N 7 4 L S 3 8 5 . . . DW , J OR N P A C K A G E • Buffered Clock and Direct Clear Inputs


    OCR Scan     		PDF SN54LS385, SN74LS385 20-Pin 54LS385 TTL IC adder and subtractor 74LS385

    c2311

    Abstract: No abstract text available
    Text: TMC2311 TMC2311 CMOS Fast Cosine Transform Processor 12 Bits, 15 Million Pixels Per Second Description Features The TM C2311, a high-speed algorithm specific ♦ processor, computes the one or two dimensional forward discrete cosine transform DCT of an 8 or 8x8 point array


    OCR Scan     		PDF TMC2311 C2311, 12-bit C2311 TMC2311R1C TMC2311R1C1 TMC2311R1C2 2311R1C 2311R1C1

    Untitled

    Abstract: No abstract text available
    Text: GEC P L E S S E Y DS3706 • 2.4 PDSP16318/PDSP16318 A COMPLEX ACCUMULATOR Supersedes version in December 1993 D igital Video & Video D igital Signal Processing 1C Handbook, HB3923-1 The PDSP16318 contains two independent 20-bit Adder/ Subtractors combined with accumulator registers and shift


    OCR Scan     		PDF DS3706 PDSP16318/PDSP16318 HB3923-1) PDSP16318 20-bit 20MHz PDSP16318As PDSP16112A PDSP16318/13618A PDSP16318A/B0/AC

    Untitled

    Abstract: No abstract text available
    Text: PDSP16318/PDSP16318A M ITEL Complex Accumulator SE M IC O N D U C T O R Supersedes version DS3708 - 2.4 Advance Inform ation Septem ber 1996 DS3708 -3 .1 Novem ber 1998 The PDSP16318/A contains two independent 20-bit Adder/Subtractors combined with accumulator registers and


    OCR Scan     		PDF PDSP16318/PDSP16318A DS3708 PDSP16318/A 20-bit 20MHz 16318Ascom P16112A 256ns. 20MHz

    74LS385

    Abstract: 54LS385
    Text: SN54LS385, SN74LS385 QUADRUPLE SERIAL ADDERS/SUBTRACTORS D 2 41 2, N O VEM BER 197 7 - F o u r Synchro n o u s Elem ents in a Single 20-Pin Package R E V IS E D M A R C H 1 9 8 8 SN 54LS385 . . . J PACKAGE S N 74LS385 . . . DW OR N PACKAGE {TOP VIEW Buffered C lo ck and D irect C lear Inputs


    OCR Scan     		PDF SN54LS385, SN74LS385 20-Pin LS385 SN54LS384/SN74LS384 74LS385 54LS385

    Untitled

    Abstract: No abstract text available
    Text: TMC2311 TMC2311 CMOS Fast Cosine IVansform Processor 12 Bits, 15 Million Pixels Per Second Description Features The TM C2311, a high-speed algorithm specific ♦ Stand alone execution of 8-point forward or inverse ♦ cosine transform Continuous 8x8-point 2-D DCTs every 4.48 ¿is


    OCR Scan     		PDF TMC2311 C2311, 12-bit TMC2311R1C 2311R1C TMC2311R1C1 2311R1C1 TMC2311R1C2 2311R1C2

    ALU of 4 bit adder and subtractor

    Abstract: diode GG 66 "Overflow detection"
    Text: PDSP16318 M C MITEL Complex Accumulator SE M IC O N D U C T O R Supersedes April 1993 version, DS3761 - 1.2 DS3761 - 2.1 November 1998 The PDSP16318 contains two independent 20-bit Adder/ Subtractors combined with accumulator registers and shift structures. The four port architecture permits full 10MHz


    OCR Scan     		PDF DS3761 PDSP16318 20-bit 10MHz PDSP16318s PDSP16112A 100ns 512jas. ALU of 4 bit adder and subtractor diode GG 66 "Overflow detection"

    circuit diagram of full subtractor circuit

    Abstract: circuit diagram of full adder 2 bit SN5480 SN7480 ttl sn7480 1N3064 SN7405 780N circuit diagram of full adder types of binary adder
    Text: TTl MSI CIRCUIT TYPES SN5480, SN7480 GATED FULL ADDERS logic w JC R N FLA T PACKAGE TOP VIEW D U A L-IN -LIN E PACKAGE (TOP VIEW) TRUTH TABLE (See Notes 1, 2, and 3) Cn B A c n+1 .j 1 1 1 1 NOTES: 2 2 1 1 . 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1. A = A * A , B = B * -B w h e re A * = A „ - A _ , B * = B *B _


    OCR Scan     		PDF SN5480, SN7480 1N3064. 780il circuit diagram of full subtractor circuit circuit diagram of full adder 2 bit SN5480 ttl sn7480 1N3064 SN7405 780N circuit diagram of full adder types of binary adder

    Untitled

    Abstract: No abstract text available
    Text: M IT E L PDSP16318 MC SE M IC O N D U C T O R Complex Accumulator DS3761 - 2.1 Supersedes April 1993 version, DS3761 - 1.2 Novem ber 1998 The PDSP16318 contains two independent 20-bit Adder/ Subtractors combined with accumulator registers and shift structures. The four port architecture permits full 10MHz


    OCR Scan     		PDF PDSP16318 DS3761 20-bit 10MHz PDSP16318s PDSP16112A 100ns 512ns.

    full subtractor circuit using decoder and nand ga

    Abstract: PLESSEY CLA LC28 full adder 2 bit ic GP144
    Text: RUG 1 .6 'M 1992 GEC PLESS EY . AUGUST 1992 S E M I C O N D U C T O R S CLA70000 SERIES HIGH DENSITY CMOS GATE ARRAYS S u p e rs e d e s M a rc h 1 9 9 2 ed itio n Recent advances in CMOS processing technology and im provem ents in design a rch ite ctu re have led to the


    OCR Scan     		PDF CLA70000 full subtractor circuit using decoder and nand ga PLESSEY CLA LC28 full adder 2 bit ic GP144

    half adder ttl

    Abstract: column-major TMC2311 adder-subtractor design TMC2312 DIN11 TMC2220 TMC2250 TMC2272 "Huffman coding"
    Text: TMC2311 C M O S Fast Cosine Transform Processor 12 Bits, 15 Million Pixels Per Second The TMC2311, a high-speed algorithm specific processor, computes the one or tw o dimensional forward discrete cosine transform DCT of an 8 or 8x8 point array of contiguous 9-bit data or the inverse DCT of 12-bit data.


    OCR Scan     		PDF TMC2311 TMC2311, 12-bit TMC2311 2311R1C2 half adder ttl column-major adder-subtractor design TMC2312 DIN11 TMC2220 TMC2250 TMC2272 "Huffman coding"

    Untitled

    Abstract: No abstract text available
    Text: SN54LS385, SN74LS385 QUADRUPLE SERIAL ADDERSfSUBTRACTORS D 2 4 1 2 , NOVEMBER 1 9 7 7 - REVISED M A R C H 1 9 8 8 S N 5 4 L S 3 8 5 . . . J PACKAGE S N 7 4 L S 3 8 5 . . . DW OR N P A C K A G E Four Synchronous Elements in a Single 20-Pin Package TO P V IEW


    OCR Scan     		PDF SN54LS385, SN74LS385 20-Pin LS385 SN54LS384/SN74LS384

    GP144

    Abstract: No abstract text available
    Text: GEC P L E S S E Y Is e m i c o n d u c t o r s MARCH 1992 ! 2462 - 3.1 CLA70000 SERIES HIGH DENSITY CMOS GATE ARRAYS S u persedes Jan uary 1992 edition R ecent advances in CMOS processing technology and im p ro vem e nts in design a rch ite ctu re have led to the


    OCR Scan     		PDF CLA70000 GP144

    Untitled

    Abstract: No abstract text available
    Text: High-Reliability ASICs CGA100 Series These data sheets are provided for technical guidance only. The final device performance may vary depending upon the final device design and configuration. Advanced Continuous Gate* Technology 1.5-Micron CMOS Gate-Array Series


    OCR Scan     		PDF CGA100 TheGE/RCACGA100Series PC7T11-3 PC7C01-3 PC7C11-3 PC7S01-3 PC7S11-3

    pin diagram of full adder using Multiplexer IC

    Abstract: full adder 2 bit ic ALU of 4 bit adder and subtractor "Overflow detection" AC84
    Text: |y |^ ^ L PDSP16318/PDSP16318A _ Complex Accumulator S E M IC O N D U C T O R A, . , A dvance Inform ation Supersedes version in Decem ber 1993 Digital Video & DSP IC Handbook, HB3923-1


    OCR Scan     		PDF PDSP16318/PDSP16318A DS3708 HB3923-1 PDSP16318 20-bit PDSP16318As PDSP16112A pin diagram of full adder using Multiplexer IC full adder 2 bit ic ALU of 4 bit adder and subtractor "Overflow detection" AC84

    tc183

    Abstract: E17G tc183G TC163G TC180G single port RAM TC183e Toshiba TC8570
    Text: TOSHIBA TC183G/ECMOS ASIC Family 3.0V/3.3V and 5.0V, 0.5nm1 TheTC183G/E eases the transition from 5V to 3V based systems. Benefits • Mixed 3.0/3,3V and 5V I/O 0.5 micron CMOS process with fast 230ps gate delay performance with the power savings of a 3V core


    OCR Scan     		PDF TC183G/ECMOS TheTC183G/E 230ps TC160G TC163G tc183 E17G tc183G TC180G single port RAM TC183e Toshiba TC8570

    full adder using Multiplexer IC 74151

    Abstract: 74151 MUX 8-1 full subtractor using ic 74138 pin configuration IC 74151 Multiplexer IC 74151 modulo 16 johnson counter MUX 74157 MUX 74151 16 bit comparator using 74*85 IC binary to gray code conversion using ic 74157
    Text: A dvance Inform ation, version 1.1 ’v'v' Crosspoint Solutions, Inc. C rosspoint has built the first field-program m able replacem ent for standard m ask-program m able gate arrays, the true F ield Program m able G ate A rray FPGA . System designers now have the flexibility and freedom to:


    OCR Scan     		PDF

    vhdl code for 8-bit BCD adder

    Abstract: No abstract text available
    Text: A dvance Inform ation, version 1.1 ‘v ' v ' : Crosspoint Solutions, Inc. C rosspoint has built the first field-program m able replacem ent for standard m ask-program m able gate arrays, the true F ield P rogram m able G ate A rray FPGA . System designers now have the flexibility and freedom to:


    OCR Scan     		PDF establis20 vhdl code for 8-bit BCD adder

    SN54LS384

    Abstract: D2412 SN54LS385 SN74LS385
    Text: SN54LS385, SN74LS385 QUADRUPLE SERIAL ADDERSfSUBTRACTORS D 2 4 1 2 , NOVEMBER 1 9 7 7 - • Four Synchronous Elements in a Single 20-Pin Package REVISED M A R C H 1 9 8 8 S N 5 4 L S 3 8 5 . . . J PACKAGE S N 7 4 L S 3 8 5 . . . D W OR N P AC KA G E TOP V IE W


    OCR Scan     		PDF SN54LS385, SN74LS385 D2412. 20-Pin LS385 SN54LS384/SN74LS384 the100 SN54LS384 D2412 SN54LS385 SN74LS385

    74f847

    Abstract: 74F154 "FAST TTL" 4 bit identity comparator 74F07A 4 bit binary full adder and subtractor BCD adder and subtractor ALU of 4 bit adder and subtractor
    Text: P hilips S e m ico n d u cto rs-S ig n e tics FAST TTL L og ic Serles SECTION 1 INDICES Function Selection Guide GATES DEVICE NUMBER FUNCTION Inverters Hex Inverter Hex Inverter, Schmitt Trigger 74F04 74F14 NAND Quad 2-Input Triple 3-Input Dual 4-Input 8-Input


    OCR Scan     		PDF 13-Input 74F04 74F14 74FOO 74F10 74F20 74F30 74F132 74F133 74F08 74f847 74F154 "FAST TTL" 4 bit identity comparator 74F07A 4 bit binary full adder and subtractor BCD adder and subtractor ALU of 4 bit adder and subtractor

    CGA10-016

    Abstract: No abstract text available
    Text: . H Ig h -R riia b illty A S IC s CGA10 Series These data sheets are provided for technical guidance only. The final device performance may vary depending upon the final device design and configuration. Continuous Gate* Technology 2-Micron CMOS Gate-Array Series


    OCR Scan     		PDF CGA10 CGA10-016

    logos 4012B

    Abstract: 1LB553 Rauland ETS-003 Silec Semiconductors MCP 7833 4057A transistor sr52 74c912 1TK552 74S485
    Text: L p i > « , * S E m Ic O N VOLUM E 3 INTERNATIONAL INTEGRATED CIRCUITS INDEX 5th EDITION 1985 Revised June 1985 COMPILED AND PUBLISHED BY S E M IC O N IN D E X E S L IM IT E D THE SEMICON INDEX SERIES CONSISTS OF VOLUME 1 TRANSISTOR INDEX VOLUME 2 DIODE & SCR INDEX


    OCR Scan     		PDF TDA1510 TDA1510A logos 4012B 1LB553 Rauland ETS-003 Silec Semiconductors MCP 7833 4057A transistor sr52 74c912 1TK552 74S485

    74F126

    Abstract: 74F154 16 line to 1 multiplexer IC 74F112 BCD adder and subtractor
    Text: Philips Semiconduclors-Signetics FAST TTL Logic Series Availability Guide SE^ AVAILABILITY NO. OF DEVICE ° ^ PINS DESCRIPTION DIP SMD 74F00 14 Quad 2-Input NAND Gate A SO 74F02 14 Quad 2-Input NOR Gate A SO 74F04 14 Hex Inverter A 74F06 14 Hex Inverter Buffer/Driver OC


    OCR Scan     		PDF 74F00 74F02 74F04 74F06 74F06A 74F07 74F07A 74F08 74F10 74F11 74F126 74F154 16 line to 1 multiplexer IC 74F112 BCD adder and subtractor