TSPC603E Search Results

TSPC603E

Abstract: CQFP240 CQFP 240 CBGA255 2-CQFP G38-87 603E Thomson P1149
Contextual Info: TSPC603E PowerPC 603e RISC MICROPROCESSOR Family PID6-603e Specification DESCRIPTION The PID6-603e implementation of PC603e after named 603e is a low-power implementation of reduced instruction set computer (RISC) microprocessors PowerPC family. The 603e

tc 3086

Abstract: CQFP 240 Thomson-CSF PC603E PC603 THOMSON-CSF PRODUCTS
Contextual Info: TSPC603e with inverted leads PowerPC 603e RISC MICROPROCESSOR Family PID6-603e Specification DESCRIPTION The PID6-603e implementation of PC603e after named 603e is a low-power implementation of reduced instruction set computer (RISC) microprocessors PowerPC family. The 603e

marking code DL20

Abstract: X0010 fdn 156 TSPC2605 THOMSON-CSF PRODUCTS
Contextual Info: TSPC2605 INTEGRATED SECONDARY CACHE MODULE FOR PowerPCt MICROPROCESSORS DESCRIPTION The TSPC2605 is a single chip, 256KB integrated look–aside cache with copy–back capability designed for PowerPC applications TSPC603e . Using 0.38 µm technology along

microprocessor

Abstract: G172
Contextual Info: PC755/745 PowerPC 755/745 RISC Microprocessor Datasheet Features • • • • • • • • • • • • • • • 18.1SPECint95, Estimates 12.3 SPECfp95 at 400 MHz PC755 15.7SPECint95, 9SPECfp95 at 350 MHz (PC745) 733 MIPS at 400 MHz (PC755) at 641 MIPS at 350 MHz (PC745)

0828H

Contextual Info: PC755/745 PowerPC 755/745 RISC Microprocessor Datasheet Features • • • • • • • • • • • • • • • 18.1SPECint95, Estimates 12.3 SPECfp95 at 400 MHz PC755 15.7SPECint95, 9SPECfp95 at 350 MHz (PC745) 733 MIPS at 400 MHz (PC755) at 641 MIPS at 350 MHz (PC745)

cga motorola

Abstract: PowerPC755 PC755B 2138F CBGA360 MPC7400 PC745 PC755 PCX755
Contextual Info: Features • • • • • • • • • • • • • • • 18.1SPECint95, Estimates 12.3 SPECfp95 at 400 MHz PC755 15.7SPECint95, 9SPECfp95 at 350 MHz (PC745) 733 MIPS at 400 MHz (PC755) at 641 MIPS at 350 MHz (PC745) Selectable Bus Clock (12 CPU Bus Dividers up to 10x)

2138F

Abstract: CBGA360 MPC7400 PC745 PC755 ATMEL 745 PCX755
Contextual Info: Features • • • • • • • • • • • • • • • 18.1SPECint95, Estimates 12.3 SPECfp95 at 400 MHz PC755 15.7SPECint95, 9SPECfp95 at 350 MHz (PC745) 733 MIPS at 400 MHz (PC755) at 641 MIPS at 350 MHz (PC745) Selectable Bus Clock (12 CPU Bus Dividers up to 10x)

Contextual Info: Features • CPU32+ Processor 4.5 MIPS at 25 MHz • • • • • • • • • • • • • • • – 32-bit Version of the CPU32 Core (Fully Compatible with the CPU32) – Background Debug Mode – Byte-misaligned Addressing Up to 32-bit Data Bus (Dynamic Bus Sizing for 8 and 16 Bits)

hall sensor u18 032

Abstract: CBGA360 MPC7400 PC745B PC755B CBGA-255 atmel 0820 PowerPC755B
Contextual Info: Features • • • • • • • • • • • • • • • 18.1SPECint95, Estimates 12.3 SPECfp95 at 400 MHz PC755B 15.7SPECint95, 9SPECfp95 at 350 MHz (PC745B) 733 MIPS at 400 MHz (PC755B) at 641 MIPS at 350 MHz (PC745B) Selectable Bus Clock (12 CPU Bus Dividers up to 10x)

TS68EN360VR25

Abstract: SMD MARKING CODE WE3 TS68EN360VA25 MC68302 TS68040 TS68302 TS68EN360 THOMSON-CSF PRODUCTS TSPC603
Contextual Info: TS68EN360 32:BIT QUAD INTEGRATED COMMUNICATION CONTROLLER DESCRIPTION The TS68EN360 QUad Integrated Communication Controller QUICCt is a versatile one-chip integrated microprocessor and peripheral combination that can be used in a variety of controller applications. It particularly excels in communications activities.

Contextual Info: TS88915T Low Skew CMOS PLL Clock Driver Tri-State 70 and 100 MHz Versions Datasheet Features • • • • • • • • • • • Vcc = 5V ± 5% Military Temperature Range Fully Compatible with the TS68040 Five Low Skew Outputs – Five Outputs Q0-Q4 with Output-to-Output Skew < 500 ps Each Being Phase End Frequency Locked to the SYNC Input

Contextual Info: Features • • • • • • • • • • • • • • • 12.4 SPECint95, 8.4 SPECfp95 at 266 MHz TSPC750A with 1 MB L2 at 133 MHz 11.5 SPECint95, 6.9 SPECfp95 at 266 MHz (TSPC740A) 488 MIPS at 266 MHz Selectable Bus Clock (11 CPU Bus Dividers up to 8x)

740P, 255 CBGA and CI-CGA packages

Abstract: ABB CONVERTER E4 CBGA360 ABB P6 cga motorola cbga 272 CI-CGA-255 740P
Contextual Info: Features H 12.4SPECint95,8.4SPECfp95 @266Mhz 750P w/1MB L2 @133Mhz H 13.5SPECint95, 9SPECfp95 @300Mhz (740P) H 488 MIPS @ 266Mhz H Selectable bus clock (11 CPU bus dividers up to 8x) H PD typical 4,2W @ 333Mhz, full operating conditions. H Nap, doze and sleep modes for power savings

HCBGA

Abstract: PC750A 24v to 20v dc to dc converter THOMSON-CSF PRODUCTS CBGA255
Contextual Info: 34 TSPC750A/740A PowerPC750A/740A RISC MICROPROCESSOR Family Pid8t–750A/740A Specification . DESCRIPTION The TSPC750A and TSPC740A microprocessor after named 750A/740A are low–power implementations of the PowerPC Reduced Instruction Set Computer (RISC) architecture.

smd diode S4 58a

Abstract: PLL VCO MIL-PRF-38535 8a 2113A TS68EN360VA33L MC68302 PA15 TS68040 TS68302 TS68EN360 smd marking 58a
Contextual Info: Features • CPU32+ Processor 4.5 MIPS at 25 MHz • • • • • • • • • • • • • • • – 32-bit Version of the CPU32 Core (Fully Compatible with the CPU32) – Background Debug Mode – Byte-misaligned Addressing Up to 32-bit Data Bus (Dynamic Bus Sizing for 8 and 16 Bits)

PBGA255

Abstract: 25X25 PowerPC755
Contextual Info: Features • • • • • • • • • • • • • • • 18.1SPECint95, Estimates 12.3 SPECfp95 at 400 MHz PC755 15.7SPECint95, 9SPECfp95 at 350 MHz (PC745) 733 MIPS at 400 MHz (PC755) at 641 MIPS at 350 MHz (PC745) Selectable Bus Clock (12 CPU Bus Dividers up to 10x)

TH7852A

Abstract: TH7890M TH7803A TH7890 AT93C56SC TH7802A VHDL code for ADC and DAC SPI with FPGA AT45DB021-SC CAMELIA 1.6M digital dice design of digital VHDL altera
Contextual Info: R PRODUCT GUIDE October 2000 AT90 Series AVR 8-bit Microcontrollers Part Number Processor Description Availability AT90S1200 AVR AVR RISC, In-System Programmable Microcontroller with 1K Byte Flash and 64 Bytes EEPROM, 20-pin PDIP, 20-lead SOIC and 20-lead SSOP Packages

LDCC28

Abstract: atmel PLCC bottom "marking" 88915T
Contextual Info: Features • • • • • • • • • • • Vcc = 5V ± 5% Military Temperature Range Fully Compatible with the TS68040 Five Low Skew Outputs – Five Outputs Q0-Q4 with Output-to-Output Skew < 500 ps Each Being Phase End Frequency Locked to the SYNC Input

cga motorola

Abstract: CBGA360 MPC7400 PC745 PC755 N-19 CI-CGA360 PowerPC755
Contextual Info: Features • • • • • • • • • • • • • • • 18.1SPECint95, Estimates 12.3 SPECfp95 at 400 MHz PC755 15.7SPECint95, 9SPECfp95 at 350 MHz (PC745) 733 MIPS at 400 MHz (PC755) at 641 MIPS at 350 MHz (PC745) Selectable Bus Clock (12 CPU Bus Dividers up to 10x)

SIM60

Abstract: 8a 2113A atmel 748 MC68302 PA15 TS68040 TS68302 TS68EN360 smd marking 58a S43 SMD
Contextual Info: Features • CPU32+ Processor 4.5 MIPS at 25 MHz • • • • • • • • • • • • • • • – 32-bit Version of the CPU32 Core (Fully Compatible with the CPU32) – Background Debug Mode – Byte-misaligned Addressing Up to 32-bit Data Bus (Dynamic Bus Sizing for 8 and 16 Bits)

88915T

Contextual Info: TS88915T Low Skew CMOS PLL Clock Driver Tri-State 70 and 100 MHz Versions Datasheet Features • • • • • • • • • • • Vcc = 5V ± 5% Military Temperature Range Fully Compatible with the TS68040 Five Low Skew Outputs – Five Outputs Q0-Q4 with Output-to-Output Skew < 500 ps Each Being Phase End Frequency Locked to the SYNC Input

BERG CONNECTOR

Contextual Info: PC755/745 PowerPC 755/745 RISC Microprocessor Datasheet Features • • • • • • • • • • • • • • • 18.1SPECint95, Estimates 12.3 SPECfp95 at 400 MHz PC755 15.7SPECint95, 9SPECfp95 at 350 MHz (PC745) 733 MIPS at 400 MHz (PC755) at 641 MIPS at 350 MHz (PC745)

12AS1

Abstract: TS68020 5962-9760702 8a 2113A 5962-SMD-97607
Contextual Info: Features • CPU32+ Processor 4.5 MIPS at 25 MHz • • • • • • • • • • • • • • • – 32-bit Version of the CPU32 Core (Fully Compatible with the CPU32) – Background Debug Mode – Byte-Misaligned Addressing Up to 32-bit Data Bus (Dynamic Bus Sizing for 8 and 16 Bits)

Contextual Info: Features • • • • • • • • • • • • • • • 18.1SPECint95, Estimates 12.3 SPECfp95 at 400 MHz PC755 15.7SPECint95, 9SPECfp95 at 350 MHz (PC745) 733 MIPS at 400 MHz (PC755) at 641 MIPS at 350 MHz (PC745) Selectable Bus Clock (12 CPU Bus Dividers up to 10x)